CS3003 CIRRUS | Alldatasheet

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Technical content

Copyright © Cirrus Logic, Inc. 2007 (All Rights Reserved) Cirrus Logic, Inc. http://www.cirrus.com CS3003 Precision Low-voltage Amplifier Features & Description ‰ Low Offset: –1 0 µV Max. ‰ Low Drift: –0 . 0 5 µV/°C Max. ‰ Low Noise: – 17 nV/ √Hz ‰ Open-loop Voltage Gain: – 150 dB Typ. ‰ Rail-to-Rail Inputs ‰ Rail-to-Rail Output Swing – to within 10 mV of supply voltage ‰ 1.0 mA Supply Current ‰ Slew rate: –0 . 2 5 V /µs

Applications

‰ Thermocouple/Thermopile Amplifiers ‰ Load Cell and Bridge Transducer Amplifiers ‰ Precision Instrumentation ‰ Battery-powered Systems

Description

The CS3003 single amplifier is designed for precision amplification of low-level signals. This amplifier achieves excellent offset stability, hi gh open loop gain, and low noise. The devices also exhibit excellent CMRR and PSRR. The common mode input range includes the sup- ply rails. The amplifier operates with any supply voltage from 2.7 V to 5 V (±1.35 V to ±2.50 V). Pin Configurations NC -IN +IN NC Output NC Exposed Thermal Die Pad NC Output NC NC -IN +IN 1 1 8-Lead SOIC QFN-8 CS3003 (Top View) 1. Must not be connected. 2. Connect thermal die pad to V-. Exposed Thermal Die Pad2 100 1000 0.01 0.1 1 1 0 Frequency (Hz) -200 -150 -100 -50 100 150 200 0123456789 1 0 Time (sec) Noise vs. Frequency (Measured) 0.01 Hz to 10 Hz Noise Performance AUG ‘07 DS735F1

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  1. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ... 8

For all product questions and inquiries contact a Cirrus Logic Sales Representative. does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. or service marks of their respective owners.

  1. CHARACTERISTICS AND SPECIFICATIONS 1.1 5 V Electrical Characteristics V+ = +5 V, ±5%; V- = 0V; VCM = 2.5 V; Unless otherwise noted, TA = 25º C (See Note 1). Notes: 1. Symbol “ •” denotes specification applies over -40 to +125 ° C. 2. This parameter is guaranteed by design and/or laboratory characterization. 3. Guaranteed within the ou tput limits of (V+ – 0.2 V) to (V- + 0.2 V). 4. Specifies the worst case drive vo ltage relative to the supply rail under stated load conditions. Parameter Min Typ Max Unit Input Offset Voltage ( Note 2) • -± 2 ± 1 0 µ V Average Input Offset Drift ( Note 2) • - ±0.01 ±0.05 µV/ºC Input Bias Current ±170 ±250 ±1.5 pA nA Input Offset Current ±340 ±500 ±3.0 pA nA Input Noise Voltage Density R S = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz Input Noise Voltage 0.1 to 10 Hz - 350 - nV p-p Input Noise Current Density f 0 = 1 Hz - 100 - Input Noise Current 0.1 to 10 Hz - 1.9 pA p-p Input Voltage Range ( Note 2) • V- - V+ V Common Mode Rejection Ratio (dc) • 110 120 - dB Power Supply Rejection Ratio • 110 130 - dB Large Signal Voltage Gain (Note 3)R L = 2 kΩ to V+/2 • 120 150 150 dB dB Output Voltage Swing R L = 2 kΩ to V+/2 (Note 4)RL = 100 kΩ to V+/2
  • (V+ – 100) (V+ – 10) (V- + 100 ) (V- + 10) mV mV Slew Rate R L = 2 k, 100 pF 0.25 - V/µs Overload Recovery Time - 25 - µs Supply Current • -1 . 0 T B D m A Chopping Frequency - 150 - kHz Input Capacitance Differential Common Mode 1.5 pF pF nV/ Hz nV/ Hz fA/ Hz

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1.2 3 V Electrical Characteristics V+ = +3 V, ±10%; V- = 0V; VCM = 1.5 V; Unless otherwise noted, TA = 25º C (See Note 5). Notes: 5. Symbol “ •” denotes specification applies over -40 to +125 ° C. 6. This parameter is guaranteed by design and/or laboratory characterization. 7. Guaranteed within the ou tput limits of (V+ – 0.2 V) to (V- + 0.2 V). 8. Specifies the worst case drive vo ltage relative to the supply rail under stated load conditions. Parameter Min Typ Max Unit Input Offset Voltage ( Note 6) • -± 2 ± 1 0 µ V Average Input Offset Drift ( Note 6) • - ±0.01 ±0.05 µV/ºC Input Bias Current ±110 ±150 ±1.0 pA nA Input Offset Current ±220 ±300 ±2.0 pA nA Input Noise Voltage Density R S = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz Input Noise Voltage 0.1 to 10 Hz - 350 - nV p-p Input Noise Current Density f 0 = 1 Hz - 100 - Input Noise Current 0.1 to 10 Hz - 1.9 pA p-p Input Voltage Range ( Note 6) • V- - V+ V Common Mode Rejection Ratio (DC) • 110 120 - dB Power Supply Rejection Ratio • 110 130 - dB Large Signal Voltage Gain (Note 7)R L = 2 kΩ to V+/2 • 120 160 150 dB dB Output Voltage Swing R L = 2 kΩ to V+/2 (Note 8)RL = 100 kΩ to V+/2

  • (V+ – 100) (V+ – 10) (V- + 100 ) (V- + 10) mV mV Slew Rate R L = 2 k, 100 pF 0.25 - V/µs Overload Recovery Time - 25 - µs Supply Current • -2 . 0 2 . 5 m A Chopping Frequency - 150 - kHz Input Capacitance Differential Common Mode 1.5 pF pF nV/ Hz nV/ Hz fA/ Hz

1.3 Absolute Maximum Ratings

  1. TYPICAL PERFORMANCE PLOTS

Figure 1. Noise vs Frequency (Measured) Figure 3. Gain & Phase vs. Frequency (2.7 V) Figure 5. Supply Current vs. Supply Voltage Figure 2. 0.01 Hz to 10 Hz Noise Figure 4. Gain & Phase vs. Frequency (5 V) Figure 6. Supply Current vs. Temperature

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Figure 7. Voltage Swing vs. Output Current (2.7 V) Figure 8. Voltage Swing vs. Output Current (5 V)

8L QFN (4 mm X 4 mm) PACKAGE DRAWING

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  1. ORDERING INFORMATION 5. ENVIRONMENTAL, MANUFACTURI NG, & HANDLING INFORMATION * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. 6. REVISION HISTORY Part # Temperature Range Package Description CS3003-FS -40 °C to +125 °C 8-lead SOIC CS3003-FSZ -40 °C to +125 °C 8-lead SOIC, Lead Free CS3003-FNZ* -40 °C to +125 °C 8-lead QFN, Lead Free * Connect thermal die pad to V-. Model Number Peak Reflow Temp MSL Rating* Max Floor Life CS3003-FS 240 °C 23 6 5 D a y sCS3003-FSZ 260 °C CS3003-FNZ Revision Date Changes A0 JAN 2007 Initial Release. A1 FEB 2007 Corrected diagram on p1. F1 AUG 2007 Updated to “Final” per QPL process.