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Copyright Cirrus Logic, Inc. 2009 (All Rights Reserved) Cirrus Logic, Inc. http://www.cirrus.com CS3003 Precision Low-voltage Amplifier Features & Description Low Offset: –1 0 μV Max. Low Drift: –0 . 0 5 μV/°C Max. Low Noise: – 17 nV/ √Hz Open-loop Voltage Gain: – 150 dB Typ. Rail-to-Rail Inputs Rail-to-Rail Output Swing – to within 10 mV of supply voltage 1.0 mA Supply Current Slew rate: –0 . 2 5 V /μs
Applications
Thermocouple/Thermopile Amplifiers Load Cell and Bridge Transducer Amplifiers Precision Instrumentation Battery-powered Systems
Description
The CS3003 single amplifier is designed for precision amplification of low-level signals. This amplifier achieves excellent offset stability, hi gh open loop gain, and low noise. The devices also exhibit excellent CMRR and PSRR. The common mode input range includes the sup- ply rails. The amplifier operates with any supply voltage from 2.7 V to 5 V (±1.35 V to ±2.50 V). Pin Configuration 8-Lead SOIC CS3003 (Top View) 1. Must not be connected. NC -IN +IN NC Output NC 100 1000 0.01 0.1 1 1 0 Frequency (Hz) -200 -150 -100 -50 100 150 200 0123456789 1 0 Time (sec) Noise vs. Frequency (Measured) 0.01 Hz to 10 Hz Noise Performance OCT ‘09 DS735F3
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- ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ... 8
- CHARACTERISTICS AND SPECIFICATIONS 1.1 5 V Electrical Characteristics V+ = +5 V, ±5%; V- = 0V; VCM = 2.5 V; Unless otherwise noted, TA = 25º C (See Note 1). Notes: 1. Symbol “ •” denotes specification applies over -40 to +125 ° C. 2. This parameter is guaranteed by design and/or laboratory characterization. 3. Guaranteed within the ou tput limits of (V+ – 0.2 V) to (V- + 0.2 V). 4. Specifies the worst case drive vo ltage relative to the supply rail under stated load conditions. Parameter Min Typ Max Unit Input Offset Voltage ( Note 2) • -± 2 ± 1 0 µ V Average Input Offset Drift ( Note 2) • - ±0.01 ±0.05 µV/ºC Input Bias Current ±170 ±250 ±1.5 pA nA Input Offset Current ±340 ±500 ±3.0 pA nA Input Noise Voltage Density R S = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz Input Noise Voltage 0.1 to 10 Hz - 350 - nV p-p Input Noise Current Density f 0 = 1 Hz - 100 - Input Noise Current 0.1 to 10 Hz - 1.9 pA p-p Input Voltage Range ( Note 2) • V- - V+ V Common Mode Rejection Ratio (dc) • 110 120 - dB Power Supply Rejection Ratio • 110 130 - dB Large Signal Voltage Gain (Note 3)R L = 2 kΩ to V+/2 • 120 150 150 dB dB Output Voltage Swing R L = 2 kΩ to V+/2 (Note 4)RL = 100 kΩ to V+/2
- (V+ – 100) (V+ – 10) (V- + 100 ) (V- + 10) mV mV Slew Rate R L = 2 k, 100 pF 0.25 - V/µs Overload Recovery Time - 25 - µs Supply Current • -1 . 0 1 . 3 m A Chopping Frequency - 150 - kHz Input Capacitance Differential Common Mode 1.5 pF pF nV/ Hz nV/ Hz fA/ Hz
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1.2 3 V Electrical Characteristics V+ = +3 V, ±10%; V- = 0V; VCM = 1.5 V; Unless otherwise noted, TA = 25º C (See Note 5). Notes: 5. Symbol “ •” denotes specification applies over -40 to +125 ° C. 6. This parameter is guaranteed by design and/or laboratory characterization. 7. Guaranteed within the ou tput limits of (V+ – 0.2 V) to (V- + 0.2 V). 8. Specifies the worst case drive vo ltage relative to the supply rail under stated load conditions. Parameter Min Typ Max Unit Input Offset Voltage ( Note 6) • -± 2 ± 1 0 µ V Average Input Offset Drift ( Note 6) • - ±0.01 ±0.05 µV/ºC Input Bias Current ±110 ±150 ±1.0 pA nA Input Offset Current ±220 ±300 ±2.0 pA nA Input Noise Voltage Density R S = 100 Ω, f0 = 1 Hz RS = 100 Ω, f0 = 1 kHz Input Noise Voltage 0.1 to 10 Hz - 350 - nV p-p Input Noise Current Density f 0 = 1 Hz - 100 - Input Noise Current 0.1 to 10 Hz - 1.9 pA p-p Input Voltage Range ( Note 6) • V- - V+ V Common Mode Rejection Ratio (DC) • 110 120 - dB Power Supply Rejection Ratio • 110 130 - dB Large Signal Voltage Gain (Note 7)R L = 2 kΩ to V+/2 • 120 160 150 dB dB Output Voltage Swing R L = 2 kΩ to V+/2 (Note 8)RL = 100 kΩ to V+/2
- (V+ – 100) (V+ – 10) (V- + 100 ) (V- + 10) mV mV Slew Rate R L = 2 k, 100 pF 0.25 - V/µs Overload Recovery Time - 25 - µs Supply Current • -2 . 0 2 . 5 m A Chopping Frequency - 150 - kHz Input Capacitance Differential Common Mode 1.5 pF pF nV/ Hz nV/ Hz fA/ Hz
1.3 Absolute Maximum Ratings
- TYPICAL PERFORMANCE PLOTS
Figure 1. Noise vs Frequency (Measured) Figure 3. Gain & Phase vs. Frequency (2.7 V) Figure 5. Supply Current vs. Supply Voltage Figure 2. 0.01 Hz to 10 Hz Noise Figure 4. Gain & Phase vs. Frequency (5 V) Figure 6. Supply Current vs. Temperature
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Figure 7. Voltage Swing vs. Output Current (2.7 V) Figure 8. Voltage Swing vs. Output Current (5 V)
- PACKAGE DRAWINGS INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.053 0.069 1.35 1.75 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.19 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80 4.00 e 0.040 0.060 1.02 1.52 H 0.228 0.244 5.80 6.20 L 0.016 0.050 0.40 1.27 ∝ 0° 8° 0° 8° JEDEC # : MS-012 8L SOIC (150 MIL BODY) PACKAGE DRAWING D HE e b A c L ∝SEATING PLANE
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- ORDERING INFORMATION 5. ENVIRONMENTAL, MANUFACTURI NG, & HANDLING INFORMATION * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. Part # Temperature Range Package Description CS3003-FSZ -40 °C to +125 °C 8-lead SOIC, Lead Free Model Number Peak Reflow Temp MSL Rating* Max Floor Life CS3003-FSZ 260 °C 2 365 Days
- REVISION HISTORY Revision Date Changes A0 JAN 2007 Initial Release. A1 FEB 2007 Corrected diagram on p1. F1 AUG 2007 Updated to “Final” per QPL process. F2 JUL 2009 Removed lead-containing SOIC and QFN packages from ordering information. F3 OCT 2009 Update max. supply cu rrent specification to 1.3 mA.
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Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to http://www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con- sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP- ERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRIT- ICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUD- ING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.