CS3001 CIRRUS | Alldatasheet

Document overview

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Technical content

Features

/circle6 Low Offset: 10 µVM a x /circle6 Low Drift: 0.05 µV/°C Max /circle6 Low Noise –6n V /√Hz @0 . 5H z – 0.1 to 10 Hz = 125 nVp-p – 1/f corner @ 0.08 Hz /circle6 Open-Loop Voltage Gain – 1000 Trillion Typ – 10 Billion Min /circle6 Rail-to-Rail Output Swing /circle6 1.8 mA Supply Current /circle6 Slew rate: 5 V/µs

Applications

/circle6 Thermocouple/Thermopile Amplifiers /circle6 Load Cell and Bridge Transducer Amplifiers /circle6 Precision Instrumentation /circle6 Battery-Powered Systems

Description

The CS3001 single amplifier and the CS3002 dual am- plifier are designed for precision amplification of low level signals and are ideally suited to applications that require very high closed loop gains. These amplifiers achieve excellent offset stability, super high open loop gain, and low noise over time and temperature. The de- vices also exhibit excellent CMRR and PSRR. The common mode input range includes the negative supply rail. The amplifiers operate with any total supply voltage Pin Configurations PWDN -In +In NC Output NC CS3001 8-lead SOIC Out A -In A +In A Out B -In B +In B A B CS3002 8-lead SOIC Noise vs. Frequency (Measured) 100 0.001 0.01 0.1 1 10 Frequency (Hz) nV/√Hz CS3001 100 64.9k 0.015µµµµF Dexter Research Thermopile 1M Thermopile Amplifier with a Gain of 650 V/V OCT ‘02 DS490PP1

  1. CHARACTERISTICS AND SPECIFICATIONS

1.1 Electrical Characteristics

V +=+ 5V ,V -=0 V ,V C M=2 . 5V(Note 1) Notes: 1. Symbol “ ” denotes specification applies over -40 to +85 ° C. 2. This parameter is guaranteed by design and laboratory characterization. Thermocouple effects prohibit accurate measurement of these parameters in automatic test systems. 3. 1000-hour life test data @ 125 °C indicates randomly distributed variation approximately equal to measurement repeatability of 1 µV. 4. Measured within the specified common mode range limits. 5. Guaranteed within the output limits of (V+ -0.3 V) to (V- +0.3 V). Tested with proprietary production test method. 6. PWDN input has an internal pullup resistor to V+ of approximately 800 k Ω and is the major source of current consumption when PWDN is active low. 7. The device has a controlled start-up behavior due to its complex open loop gain characteristics. Start- up time applies when supply voltage is applied or when PDWN is released. Parameter CS3001/CS3002 UnitMin Typ Max Input Offset Voltage ( Note 2)  -- ± 1 0 µ V Average Input Offset Drift ( Note 2)  -± 0 . 0 1 ± 0 . 0 5 µ V / º C Long Term Input Offset Voltage Stability ( Note 3) Input Bias Current T A =2 5 ºC - ±100 ±200 ±1000 pA pA Input Offset Current T A =2 5 ºC - ±200 ±400 ±2000 pA pA Input Noise Voltage Density RS = 100 Ω,f 0 =1H z RS = 100 Ω,f 0 =1k H z Input Noise Voltage 0.1 to 10 Hz - 125 nV p-p Input Noise Current Density f0 =1H z - 2 Input Noise Current 0.1 to 10 Hz - 40 pA p-p Input Common Mode Voltage Range  -0.1 - (V+)-1.25 V Common Mode Rejection Ratio (dc) ( Note 4)  115 120 - dB Power Supply Rejection Ratio  120 136 - dB Large Signal Voltage Gain R L =2k Ω to V+/2 ( Note 5)  200 300 - dB Output Voltage Swing R L =2k Ω to V+/2 RL = 100 kΩ to V+/2  +4.7 - +4.99 V Slew Rate R L = 2 k, 100 pF 5 - V/µs Overload Recovery Time - 100 - µs Supply Current per Amplifier PWDN active (CS3001 Only) ( Note 6) -1 . 82 . 4 mA µA PWDN Threshold ( Note 6)  (V+) -1.0 - - V Start-up Time ( Note 7)  -91 2 m s nV/ Hz nV/ Hz pA/ Hz

1.2 Absolute Maximum Ratings

Figure 1. Noise vs Frequency (Measured) Figure 2. 0.01 Hz to 10 Hz Noise Figure 3. Noise vs Frequency Figure 4. Offset Voltage Stability (DC to 3.2 Hz)

open loop gain at frequencies of 10 kHz and below. band-limited to frequencies below 2 kHz.

3.1 Open Loop Gain and Phase

500 Hz and 60 kHz and transitions to –20 dB/de-

Figure 9. CS3001/CS3002 Open Loop Gain and Phase Response

3.2 Open Loop Gain and Stability

Figure 10. Non-Inverting Gain Configuration

Figure 11. Non-Inverting Gain Configuration with Compensation

location is also modified if R1 remains fixed. amplifier’s rising noise above 2 kHz.

3.3 Powerdown ( PDWN)

3.4 Applications

for applications that require high gain and low drift. Figure 12. Loop Gain Plot: Unity Gain and with Pole-Zero Compensation

converter. This circuit operates from +5 V. Figure 13. Thermopile Amplifier with a Gain of 650 V/V

Figure 14. Load Cell Bridge Amplifier and A/D Converter

  1. PACKAGE DRAWING INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.053 0.069 1.35 1.75 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.19 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80 4.00 e 0.040 0.060 1.02 1.52 H 0.228 0.244 5.80 6.20 L 0.016 0.050 0.40 1.27 ∝ 0° 8° 0° 8° JEDEC # : MS-012 8L SOIC (150 MIL BODY) PACKAGE DRAWING D HE e b A c L ∝SEATING PLANE
  1. ORDERING INFORMATION Part # Temperature Range Package Description CS3001-IS -40 °Ct o+ 8 5°C 8-lead SOIC CS3002-IS -40 °Ct o+ 8 5°C 8-lead SOIC Note: Add the letter R to the Part # to order reels. There are 2000 pieces per reel.
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