CEU13N65S CET-MOS | Alldatasheet
Document overview
- PDF pages: 5
Technical content
N-Channel Enhancement Mode Field Effect Transistor CED13N65S/CEU13N65S
FEATURES
700V@TJ max, 12.3A, RDS(ON) = 0.32W @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. TO-251 & TO-252 package. ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Pulsed a Maximum Power Dissipation @ TC = 25 C - Derate above 25 C VDS VGS ID PD IDM 650 125 49.2 7.8 ±30 V W A A V W/ C S G D CEU SERIES TO-252(D-PAK) CED SERIES TO-251(I-PAK) G G S S D D RoHS compliant. http://www.cet-mos.com Rev 1. 2022.Aug Drain Current-Continuous @ TC = 25 C @ TC = 100 C 12.3 A Single Pulsed Avalanche Energy e Single Pulsed Avalanche Current e EAS IAS 306 3.5 mJ A Details are subject to change without notice . Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Parameter Symbol Limit Units C/W C/W 1RqJC RqJA
Electrical Characteristics Tc = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 0.320.27 2.5 4.5 -100 100 W V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics c Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd VSD Typ Max 650 VDS = 650V, VGS = 0V VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 6A VDD = 400V, ID =6A, VGS = 10V, RGEN = 10W VDS = 400V, ID = 1A, VGS = 10V VDS = 150V, VGS = 0V, f = 1.0 MHz 910 12.3 1.2 pF pF pF ns ns ns ns nC nC nC A V IS VGS = 0V, IS = 6A Gate input resistance Rg f=1MHz,open Drain 8 W CED13N65S/CEU13N65S Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. e.L = 50mH, IAS = 3.5A, VDD = 50V, RG = 25W, Starting TJ = 25 C. Reverse Recovery Time Reverse Recovery Charge Peak Reverse Recovery Current Trr Qrr Irr ID = 6A,di/dt = 100A/us 240 2.35 ns uC 16.8 A
Figure 12. Normalized Thermal Transient Impedance Curve