CEU07N65A CET-MOS | Alldatasheet
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Technical content
N-Channel Enhancement Mode Field Effect Transistor CED07N65A/CEU07N65A
FEATURES
650V, 6A, RDS(ON) = 1.45W @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. TO-251 & TO-252 package. ABSOLUTE MAXIMUM RATINGS Tc = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous @ TC = 25 C @ TC = 100 C Drain Current-Pulsed a Maximum Power Dissipation @ TC = 25 C - Derate above 25 C VDS VGS ID PD IDM 650 0.85 107 ±30 V W A A V W/ C CEU SERIES TO-252(D-PAK) CED SERIES TO-251(I-PAK) G G S S D D Lead free product is acquired. http://www.cet-mos.com Rev 1. 2011.July Details are subject to change without notice . Single Pulsed Avalanche Current e Single Pulsed Avalanche Energy e Repetitive Avalanche Energy EAR EAS IAS mJ mJ A 0.38 216 3.7 A Operating and Store Temperature Range TJ,Tstg -55 to 175 C Thermal Characteristics Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Parameter Symbol Limit Units C/W C/W 1.4RqJC RqJA S G D
Electrical Characteristics Tc = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 1.451.22 2 4 -100 100 W V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics b Dynamic Characteristics c Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics c Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max 650 VDS = 650V, VGS = 0V VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 3A VDD = 300V, ID = 6A, VGS = 10V,RGEN = 25W VDS = 480V, ID = 6A, VGS = 10V VDS = 25V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 5A 1410 115 1.5 pF pF pF ns ns ns ns nC nC nC A V 5226 11658 17085 12663 RgGate input resistance f=1MHz,open Drain 1.5 W Effective output capacitance f energy related Effective output capacitance g time related Co(er) Co(tr) VGS = 0V, VDS = 0V to 480V pF pF 38.5 CED07N65A/CEU07N65A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Device Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. e.L = 12mH, IAS =6A, VDD = 50V, RG = 25W, Starting TJ = 25 C. f.Co(er) is a fixed capacitance that gives the same stored energy as Coss while Vds is rising from 0 to 80% Vdss. g.Co(tr) is a fixed capacitance that gives the same charging time as Coss while Vds is rising from 0 to 80% Vdss.