CES2363 CET-MOS | Alldatasheet
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P-Channel Enhancement Mode Field Effect Transistor CES2363
FEATURES
-60V, -2.5A, RDS(ON) = 125mW @VGS = -10V. RDS(ON) = 150mW @VGS = -4.5V. High dense cell design for extremely low RDS(ON). Rugged and reliable. SOT-23 package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM -60 1.25 -10 -2.5 ±20 V W A A V S G D G D S SOT-23 RoHS compliant. http://www.cet-mos.com Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W100RqJA Rev 1. 2022.March Details are subject to change without notice .
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 125100 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics c Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = -250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max -60 VDS = -60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = -250µA VGS = -10V, ID = -1A VGS = -4.5V, ID = -1A VDD = -30V,ID = -1A, VGS = -10V, RGEN = 6W VDS = -30V, ID = -2A, VGS = -4.5V VDS = -30V, VGS= 0V, f = 1.0 MHz VGS = 0V, IS = -1A 960 8.6 2.1 2.8 -1.2 150106 mW pF pF pF ns ns ns ns nC nC nC A V Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 5 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
Figure 12. Normalized Thermal Transient Impedance Curve