CEM6601A CET-MOS | Alldatasheet
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http://www.cet-mos.com Rev 1. 2022.Mar P-Channel Enhancement Mode Field Effect Transistor CEM6601A
FEATURES
-60V, -4A, RDS(ON) = 86mW @VGS = -10V. RDS(ON) = 125mW @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface mount Package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted SO-8 D D D D S S S G 1 2 3 4 8 7 6 5 RoHS compliant. Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM -60 2.5 -16 ±20 V W A A V Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Parameter Symbol Limit Units C/W50RqJA Details are subject to change without notice .
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 8665 -1 -3 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics c Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = -250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max -60 VDS = -60V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = -250µA VGS = -10V, ID = -4A VGS = -4.5V, ID = -2A VDD = -30V, ID = -1A, VGS = -10V, RGEN = 6W VDS = -30V, ID = -3.5A, VGS = -10V VDS = -30V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = -2A 1080 118 -1.2 12575 mW pF pF pF ns ns ns ns nC nC nC A V Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
Figure 1. Output Characteristics Figure 3. Capacitance Figure 4. On-Resistance Variation Figure 5. Gate Threshold Variation Figure 6. Body Diode Forward Voltage Figure 2. Transfer Characteristics
102 VGS=0V
Figure 12. Normalized Thermal Transient Impedance Curve