CEM3178 CET-MOS | Alldatasheet
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Technical content
Specification and data are subject to change without notice . Dual N-Channel Enhancement Mode Field Effect Transistor
FEATURES
30V, 7.6A, RDS(ON) = 22mW @VGS = 10V. RDS(ON) = 33mW @VGS = 4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface mount Package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM 2.0 7.6 ±20 V W A A V SO-8 D1 D1 D2 D2 S1 G1 S2 G2 8 7 6 5 1 2 3 4 RoHS compliant. CEM3178 http://www.cet-mos.com Rev 4. 2010.July Limit Units Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol C/W62.5RqJA
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 2217 1 3 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics c Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max VDS = 30V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 6.3A VGS = 4.5V, ID = 5.0A VDD = 15V, ID = 1A, VGS = 10V, RGEN = 6W VDS = 15V, ID = 7A, VGS = 10V VDS = 15V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 1.6A 590 125 3.5 1.6 1.2 3327 mW pF pF pF ns ns ns ns nC nC nC A V Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.