CEM1310SL CET-MOS | Alldatasheet
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Single N-Channel Enhancement Mode Field Effect Transistor CEM1310SL
FEATURES
100V, 14A, RDS(ON) = 8.2mW @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Surface mount Package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM 100 3.1 ±20 V W A A V RoHS compliant. http://www.cet-mos.com Rev 2. 2019.June Details are subject to change without notice . D D D D S S S G 1 2 3 4 8 7 6 5 SO-8 RDS(ON) = 11.5mW @VGS = 4.5V. Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W40RqJA
Electrical Characteristics Tc = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 11.59 1 3 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics b Dynamic Characteristics c Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics c Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max 100 VDS = 100V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 4.5V, ID = 5A VDD = 80V, ID = 10A, VGS = 10V, RGEN = 6W VDS = 80V, ID = 10A, VGS = 4.5V VDS = 50V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 2A 1995 395 pF pF pF ns ns ns ns nC nC nC A V 8.26.7 mWVGS = 10V, ID = 10A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing.
Figure 12. Normalized Thermal Transient Impedance Curve