CEH2331 CET-MOS | Alldatasheet
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Technical content
P-Channel Enhancement Mode Field Effect Transistor CEH2331
FEATURES
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM -20 2.0 -21 -5.2 ±12 V W A A V S(4) G(3) D(1,2,5,6,) TSOP-6 http://www.cet-mos.com Rev 3. 2010.Dec Details are subject to change without notice . -20V, -5.2A , RDS(ON) = 48mW @VGS = -4.5V. RDS(ON) = 60mW @VGS = -2.5V. RDS(ON) = 78mW @VGS = -1.8V. High dense cell design for extremely low RDS(ON). Rugged and reliable. TSOP-6 package. RoHS compliant. Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W62.5RqJA
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSS 6046 -0.4 ±100 mW V nA µA V On Characteristics Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = -250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max -20 VDS = -20V, VGS = 0V VGS = ±12V, VDS = 0V VGS = VDS, ID = 250µA VGS = -2.5V, ID = -2.8A VGS = -1.8V, ID = -2A VDD = -10V, ID = -4A, VGS = -4.5V, RGEN = 3W VDS = -10V, ID = -4A, VGS = -4.5V VDS = -10V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = -1A 880 210 160 1.1 3.9 -1.6 -1.2 7860 mW pF pF pF ns ns ns ns nC nC nC A V VGS = -4.5V, ID = -3.3A 36 48 mW Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 5 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.