CEH2316A CET-MOS | Alldatasheet
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N-Channel Enhancement Mode Field Effect Transistor CEH2316A
FEATURES
30V, 6.3A , RDS(ON) = 32mW @VGS = 10V. RDS(ON) = 44mW @VGS = 4.5V. High dense cell design for extremely low RDS(ON). Rugged and reliable. TSOP-6 package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM 25.2 6.3 ±20 V W A A V S(4) G(3) D(1,2,5,6,) RoHS compliant. TSOP-6 http://www.cet-mos.com Rev 1. 2022.Sep Details are subject to change without notice . Operating and Store Temperature Range TJ,Tstg -55 to 150 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W62.5RqJA
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 3225 1 3 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics c Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Typ Max VDS = 30V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 4A 4434 mWVGS = 4.5V, ID = 3A Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage c Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD VDD = 24V, ID = 5A, VGS = 10V, RGEN = 3W VDS = 24V, ID = 5A, VGS = 4.5V VDS = 15V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 2A 345 105 6.2 0.7 3.9 1.6 1.2 pF pF pF ns ns ns ns nC nC nC A V Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
Figure 12. Normalized Thermal Transient Impedance Curve