CEA2372 CET-MOS | Alldatasheet
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Technical content
N-Channel Enhancement Mode Field Effect Transistor CEA2372
FEATURES
100V, 2.5A, RDS(ON) = 280mW @VGS = 10V. RDS(ON) = 330mW @VGS = 4.5V. High dense cell design for extremely low RDS(ON). Rugged and reliable. SOT-89 package. ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted Parameter Symbol Limit Units Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Maximum Power Dissipation VDS VGS ID PD IDM 100 3.7 2.5 ±20 V W A A V S G D SOT-89 D D S G RoHS compliant. Operating and Store Temperature Range TJ,Tstg -55 to 175 C http://www.cet-mos.com Rev 2. 2016.Sep Thermal Characteristics Thermal Resistance, Junction-to-Ambient b Parameter Symbol Limit Units C/W42RqJA Details are subject to change without notice .
Electrical Characteristics TA = 25 C unless otherwise noted Parameter Symbol Min Units Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Threshold Voltage Static Drain-Source On-Resistance BVDSS IDSS IGSSR IGSSF 280190 1 3 -100 100 mW V nA nA µA V Gate Body Leakage Current, Reverse On Characteristics Dynamic Characteristics d Input Capacitance Reverse Transfer Capacitance Output Capacitance Switching Characteristics d Turn-On Delay Time Turn-Off Fall Time Turn-Off Delay Time Turn-On Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c Test Condition VGS = 0V, ID = 250µA VGS(th) RDS(on) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD Typ Max 100 VDS = 100V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 1.5A VGS = 4.5V, ID = 1A VDD = 80V, ID = 1A, VGS = 10V, RGEN = 6W VDS = 80V, ID = 1A, VGS = 10V VDS = 30V, VGS = 0V, f = 1.0 MHz VGS = 0V, IS = 2.5A 430 1.5 2.5 1.2 330200 mW pF pF pF ns ns ns ns nC nC nC A V CEA2372 Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
Figure 12. Normalized Thermal Transient Impedance Curve