CDB4334 CIRRUS | Alldatasheet

Document overview

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Technical content

Features

lDemonstrates recommended layout and grounding arrangements lCS8414 Receives AES/EBU, S/PDIF, & EIAJ-340 Compatible Digital Audio lDigital and Analog Patch Areas lRequires only a digital signal source and power supplies for a complete Digital-to- Analog-Converter system

Description

The CDB4334/8/9 evaluation board is an excellent means for quickly evaluating the CS4334/8/9 family of 24-bit, stereo D/A converters. Evaluation requires an an- alog signal analyzer, a digital signal source and a power supply. Analog outputs are provided via RCA connectors for both channels. The CS8414 digital audio receiver I.C. provides the sys- tem timing necessary to operate the Digital-to-Analog converters and will accept AES/EBU, S/PDIF, and EIAJ- 340 compatible audio data. The evaluation board may also be configured to accept external timing signals for operation in a user application during system development.

ORDERING INFORMATION

CDB4334, CDB4338, CDB4339 AnalogCS4334/38/39 CS8414 Digital Audio Interface I/O for Clocks and Data Filter AUG ‘98 DS248DB2

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CDB4334/8/9 SYSTEM OVERVIEW The CDB4334/8/9 evaluation board is an excellent means of quickly evaluating the CS4334/8/9. The CS8414 digital audio interface receiver provides an easy interface to digital audio signal sources in- cluding the majority of digital audio test equip- ment. The evaluation board also allows the user to supply clocks and data through a 10-pin header for system development. The CDB4334/8/9 schematic has been partitioned into 7 schematics shown in Figures 2 through 8. Each partitioned schematic is represented in the system diagram shown in Figure 1. Notice that the the system diagram also includes the interconnec- tions between the partitioned schematics. The CS8414 does not support a compatible data format for the CS4335, CS4336 or CS4337. As a result, an evaluation board is not available for these devices. However, the evaluation board does allow external generation of clocks and data, bypassing the CS8414, and will support the CS4335/36/37 in this configuration. CS4334/8/9 DIGITAL TO ANALOG CONVERTER A description of the CS4334/5/6/7/8/9 is included in the CS4334/5/6/7/8/9 data sheet. CS8414 DIGITAL AUDIO RECEIVER The system receives and decodes the standard S/PDIF data format using a CS8414 Digital Audio Receiver, Figure 5. The outputs of the CS8414 in- clude a serial bit clock, serial data, left-right clock (FSYNC), de-emphasis control and a 256 Fs mas- ter clock. The operation of the CS8414 and a dis- cussion of the digital audio interface are included in the CS8414 Datasheet. During normal operation, the CS8414 operates in the Channel Status mode where the LED' s display channel status information for the channel selected by the CSLR/FCK jumper. This allows the CS8414 to decode the de-emphasis bit from the digital au- dio interface for control of the CS4334/8/9 de-em- phasis filter. When the Error Information Switch is activated, the CS8414 operates in the Error and Frequency in- formation mode. The information displayed by the LED' s can be decoded by consulting the CS8414 data sheet. It is likely that the de-emphasis control for the CS4334/8/9 will be erroneous and produce an incorrect audio output if the Error Information Switch is activated and the CS4334/8/9 is in the in- ternal serial clock mode. Encoded sample frequency information can be dis- played provided a proper clock is being applied to the FCK pin of the CS8414. When an LED is lit, this indicates a "1" on the corresponding pin locat- ed on the CS8414. When an LED is off, this indi- cates a "0" on the corresponding pin. Neither the L or R option of CSLR/FCK should be selected if the FCK pin is being driven by a clock signal. The evaluation board has been designed such that the input can be either optical or coax, Figure 6. However, both inputs can not be driven simulta- neously. CS8414 DATA FORMAT The CS8414 data format can be set with jumpers M0, M1, M2, and M3, as described the CS8414 datasheet. The format selected must be compatible with the data format of the CS4334/8/9, shown in Figures 4-7 of the CS4334/8/9 datasheet. The de- fault settings for M0-M3 on the evaluation board are given in Tables 2-4. The compatible data for- mats we have chosen for the CS8414 and CS4334/8/9 are: CS8414 format 2 ; CS4334 CS8414 format 5 ; CS4338 CS8414 format 6 ; CS4339

passive filters and a pair of 3-pole active filters. Figure 10. The 74HC243 transceiver functions as the HDR1-HDR6 jumpers in the 8414 position. are located as close to the CS4334/8/9 as possible. yield large reductions in radiated noise effects.

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Table 1. System Connections Notes: The CS8414 data format requires the CS4334 to operate in the external serial clock mode. Table 2. CDB4334 Jumper Selectable Options

Notes: The CS8414 data format requires the CS4338 to operate in the external serial clock mode. Table 3. CDB4338 Jumper Selectable Options Table 4. CDB4339 Jumper Selectable Options

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Figure 1. System Block Diagram and Signal Flow Figure 2. CS4334/5/6/7/8/9

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Figure 5. CS8414 Digital Audio Receiver Connections

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Figure 8. Power Down Circuitry Figure 9. Power Supply

Figure 10. I/O for Clocks and Data

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Figure 11. Silkscreen Top

Figure 12. Top Side

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Figure 13. Bottom Side