CA0555 HARRIS | Alldatasheet
Document overview
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Technical content
Features
- Accurate Timing From Microseconds Through Hours
- Astable and Monostable Operation
- Adjustable Duty Cycle
- Output Capable of Sourcing or Sinking up to 200mA
- Output Capable of Driving TTL Devices
- Normally ON and OFF Outputs oC
- Directly Interchangeable with SE555, NE555, MC1555, and MC1455
Applications
- Precision Timing • Pulse Generation
- Sequential Timing • Pulse Detector
- Time Delay Generation • Pulse Width and Position Modulation
Description
The CA555 and CA555C are highly stable timers for use in precision timing and oscillator applications. As timers, these monolithic integrated circuits are capable of producing accu- rate time delays for periods ranging from microseconds through hours. These devices are also useful for astable oscillator operation and can maintain an accurately con- trolled free running frequency and duty cycle with only two external resistors and one capacitor. The circuits of the CA555 and CA555C may be triggered by the falling edge of the waveform signal, and the output of these circuits can source or sink up to a 200mA current or drive TTL circuits. These types are direct replacements for industry types in packages with similar terminal arrangements e.g. SE555 and NE555, MC1555 and MC1455, respectively. The CA555 type circuits are intended for applications requiring premium electrical performance. The CA555C type circuits are intended for applications requiring less stringent electrical characteristics.
Ordering Information
(BRAND) TEMP. RANGE ( oC) PACKAGE PKG. NO. CA0555E -55 to 125 8 Ld PDIP E8.3 CA0555M (555) -55 to 125 8 Ld SOIC M8.15 CA0555M96 (555) -55 to 125 8 Ld SOIC † M8.15 CA0555T -55 to 125 8 Pin Metal Can T8.C CA0555CE 0 to 70 8 Ld PDIP E8.3 CA0555CM (555C) 0 to 70 8 Ld SOIC M8.15 CA0555CM96 (555C) 0 to 70 8 Ld SOIC † M8.15 CA0555CT 0 to 70 8 Pin Metal Can T8.C LM555N -55 to 125 8 Ld PDIP E8.3 LM555CN 0 to 70 8 Ld PDIP E8.3 NE555N 0 to 70 8 Ld PDIP E8.3 NOTE: † Denotes Tape and Reel Pinouts CA555, CA555C (PDIP, SOIC) LM555, LM555C, NE555 (PDIP) TOP VIEW CA555, CA555C (METAL CAN) TOP VIEW Functional Block Diagram GND TRIGGER OUTPUT RESET DISCHARGE THRESHOLD CONTROL VOLTAGE THRESHOLDTRIGGER RESET GND OUTPUT DISCHARGE CONTROL TAB VOLTAGE THRESHOLD COMPAR THRESHOLD TRIGGER COMPAR 2CONTROL VOLTAGE TRIGGER FLIP-FLOP OUTPUT OUTPUT DISCHARGE RESET GND May 1997 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 CA555, CA555C, LM555, LM555C, NE555 Timers for Timing Delays and Oscillator Application in Commercial, Industrial and Military Equipment File Number 834.4
Absolute Maximum Ratings Thermal Information Operating Conditions Temperature Range Thermal Resistance (Typical, Note 1)θJA (oC/W) θJC (oC/W) oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsTA = 25oC, V+ = 5V to 15V Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS CA555, LM555 CA555C, LM555C, NE555 UNITSMIN TYP MAX MIN TYP MAX DC Supply Voltage V+ 4.5 - 18 4.5 - 16 V DC Supply Current (Low State), (Note 2) I+ V+ = 5V, R L =∞ -35- 3 6 m A V+ = 15V, RL =∞ - 10 12 - 10 15 mA Threshold Voltage V TH -( 2/3)V+ - - ( 2/3)V+ - V Trigger Voltage V+ = 5V 1.45 1.67 1.9 - 1.67 - V V+ = 15V 4.8 5 5.2 - 5 - V Trigger Current - 0.5 - - 0.5 - µA Threshold Current (Note 3) I TH - 0.1 0.25 - 0.1 0.25 µA Reset Current - 0.1 - - 0.1 - mA V+ = 15V 9.6 10 10.4 9 10 11 V Output Voltage V OL V+ = 5V, ISINK = 5mA - - - - 0.25 0.35 V Low State I SINK = 8mA - 0.1 0.25 - - - V V+ = 15V, ISINK = 10mA - 0.1 0.15 - 0.1 0.25 V ISINK = 50mA - 0.4 0.5 - 0.4 0.75 V ISINK = 100mA - 2.0 2.2 - 2.0 2.5 V ISINK = 200mA - 2.5 - - 2.5 - V Output Voltage V OH V+ = 5V, ISOURCE = 100mA 3.0 3.3 - 2.75 3.3 - V High State V+ = 15V, ISOURCE = 100mA 13.0 13.3 - 12.75 13.3 - V ISOURCE = 200mA - 12.5 - - 12.5 - V Timing Error (Monostable) R 1, R2 = 1kΩ to 100kΩ , C = 0.1µF Tested at V+ = 5V, V+ = 15V - 0.5 2 - 1 - % Frequency Drift with Temperature - 30 100 - 50 - ppm/ oC Drift with Supply Voltage - 0.05 0.2 - 0.1 - %/V CA555, CA555C, LM555, LM555C, NE555
Reset Timer (Monostable Operation) Figure 1 shows the CA555 connected as a reset timer. In this mode of operation capacitor CT is initially held discharged by a transistor on the integrated circuit. Upon closing the “start” switch, or applying a negative trigger pulse to terminal 2, the integral timer flip-flop is “set” and releases the short circuit across C T which drives the output voltage “high” (relay ener- gized). The action allows the voltage across the capacitor to increase exponentially with the constant t = R1C T. When the voltage across the capacitor equals 2/3 V+, the comparator resets the flip-flop which in turn discharges the capacitor rap- idly and drives the output to its low state. Output Rise Time t R - 100 - - 100 - ns Output Fall Time t F - 100 - - 100 - ns NOTES: 2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value. 3. The threshold current will determine the sum of the values of R 1 and R2 to be used in Figure 4 (astable operation); the maximum total R 1 + R2 = 20MΩ . Electrical SpecificationsTA = 25oC, V+ = 5V to 15V Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS CA555, LM555 CA555C, LM555C, NE555 UNITSMIN TYP MAX MIN TYP MAX THRESHOLD RESET DISCHARGE RESET DISCHARGE OUTPUT OUTPUTFLIP-FLOP TRIGGER COMPARATOR THRESHOLD COMPARATOR 4.7K 830 4.7K D 2D 1 Q 3 Q 4 Q 7 Q 5Q 2 Q 1 10K Q 8 Q 6 100 100K Q 9 Q 11 Q 12 Q 10 Q 13 Q 16 D 3 Q 14 Q 15 Q 17 3.9K Q 19 Q 20 Q 21 Q 18 CONTROL VOLTAGE 5K 6.8K 4.7K 220 4.7K TRIGGER D 4 NOTE: Resistance values are in ohms. CA555, CA555C, LM555, LM555C, NE555
FIGURE 5. TYPICAL WAVEFORMS FOR REPEAT CYCLE TIMER FIGURE 6. FREE RUNNING FREQUENCY OF REPEAT CYCLE NOTE: Where x is the decimal multiplier of the supply voltage. FIGURE 7. MINIMUM PULSE WIDTH vs MINIMUM TRIGGER FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 9. OUTPUT VOLTAGE DROP (HIGH STATE) vs FIGURE 10. OUTPUT VOLTAGE LOW STATE vs SINK