CA3169 HARRIS | Alldatasheet

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April 1992 (1/2 H Driver) Features Description * Chip Encapsulated in a 5-Lesd Plastic 0-220 The CA3169 ia a monolithic integrated circuit capable of driving Style Package (VERSA-VI) lamps and other devices that can be changed between two states * Output Short Circult Protection (on oF off). Transistors, SCR’'s, and triacs are some of the solid state devices that can be controlled by the CA3169. This device © Thermal Overtoad Protection can also control relays, solenoids (latching or nonlatching), motors * Solenoid Inductive “Kick” Protection with (OC - forward and reverse) and DC stepping motors. Internal-Clamp Diodes ‘The CA3169 contains a separate source driver circuit with internal * Output Sink and Source Capacity of 600mA Current limiting protection and a separate sink driver circuit. The Minimum Overtemperature sink driver contains an energy absorbing diode to protect the « Horizontal Vertical Mounting Ps device against any inductive “kick” during state changes. The Available ond ng CA3169 is protected against overvoltage conditions on the output drivers and overtemperature conditions (thermal-shutdown protec- * Separate Sink Circuit and Source Circult, Each tion), Individually Controlled ‘The input operating levels are TTL compatible. The source and Applications sink outputs are in their off condition (non-conducting) when their respective inputs are in a HI state, or open-circuited. The outputs * Latching Solenoid Driver (Single and Multiple) gra in their on state (conducting) when their respective inputs are uw + Non-Latching Solenoid Driver LO. The VERSA-VI package is available with two lead configura- 8 + Relay Driver tions. The CA3169 has a verticakmount lead form, and the 9 (CA3169M has a horizontal-mount lead form. & + Lamp Controller ira . Oo S Lamp Driver Ordering Information < see error eaewe wn Reverse) [_ranTuwaen [TEMPERATURE | PACKAGE] + Steppe Cont CASSI60 “A°C 10 285°C | S Lead Plastc SIP * On-Off Logic Controllers (TTL Logic) Staggered Vertical * Trlac, SCR, and Transistor Drivers Surface Mount SS OF lll. Pinout Functional Block Diagram

5 PIN PLASTIC TO-220 SIP UF

Genus § SOURCE INPUT CURRENT = = a] ss sin inpur ry ———! eevee, sounce w UNITING LJ = 2 SOURCE OUTPUT = He © SS source out PROTECTION ‘OUTPUT A SINK OUT 7 © De ourpuTe (OVER VOLTAGE © EK 25amax MOUNTING FLANGE @& (@ND) CAUTION: These devices are sensitive o slactostate discharge. Users should fokow proper IC. Handling Procedures. File Number 1277.2 Coowrioht © “aris Corporation 1982 43 ”

Sink CUFTONE eevee eee eens 1.9A Operating Temperature POLL a0 to +8586 Input Voltage: Lead Temperature (During Soldering): Maximum Forward Current - Diode D1... . eee 5A Maximum Forward Current - Diode D2... vee BA CAUTION: Stresses above those listed In “Absolute Maximum Ratings” may cause permanent damage to the device. This i a stress ony rating and operation of he device at these or any other conditions above those indeated inthe operational sections of tis specification isnot imped Electrical Specifications at T, = +25°C, Vcc = 10.5V to 18V Unless otherwise spacitied [PARAWeTER"[/svwsor [Test conpmions [Mig [ve max un] ‘Output Leakage Current, Pin 2 Tnpuls Open Veg = 4V to 18V. pA ‘See Figures ‘Source and Sink Loads = 200. Output Leakage Current, Pin 3 Inputs Open Vo¢ = 4V to 18V 40.5 See Figure 5 ‘Source and Sink Loads = 200 a Quiescent Current, Pin 1 Device “ON” Input Terminals: 70 See Figure 4 Shorted, Voc = 14V Quiescent Current, Pin 1 ‘Device “OFF” Input Terminals: 17 See Figure 3 Open, Voc = 14V Thamal Shown Tenpaatue || Rs stor Seat ae ee ‘Overvoltage Shutdown Circuit R= 2002 Fa Vv Upper Trip Point, Pin 1 Voltage See Figure7 ‘Overvoltage Shutdown - Crcut A= 200 Ey Lower Trip Point, Pin 1 Voltage ‘See Figure 7 Input Logic Levels; Source Input - Pin 5, Sink Input - Pin 4 Input Low Threshold Vi Veo = 14V (See Note 1) Vv Sink or Source Input High Threshold Vin Veo = 14V (See Note 2) ‘Sink or Source input Low Current Ta Vin 5 0.4V ™A ‘Sink or Source Tnput High Current Vin 55.5 Ex} ry ‘Sink or Source Output Vatage, Pin 2 Vos | Relerenced to Vec with v See Figure 6 Isqunce = 600mA, See Note 3 Short Circuit Current Limit, 26 Pin 2 to Ground Turn-On Delay to Output-On, ©, = 100pF, RL = 330 as Pin 2 ‘Turn-Off Delay to Output-Off, Cy = 100pF, RL = 330 Pin2 Sink Outputs ‘Output Saturation Voltage Vs Tok = 600mA VIN < 0.4V Vv See Figure 9 ‘See Note 3 ‘Output Saturation Voltage Vs Tanx = 1000MA VIN = 0.4V See Figure 9 ‘Seo Note 3 4-4

  1. leource OF laine © 600A, Vos < 1.5V, Vaux $ 0.75V.
  2. Igounce OF Ign S 1OOHA, Vsouace = GND. for Veiyx 200 to Vg

3, Measured over temperature range ol -40°C to +85°C. FIGURE 1. DETAILED SCHEMATIC OF THE INPUT CIRCUIT FOR Cast69,

FIGURE 3. QUIESCENT CURRENT DEVICE “OFF”. FIGURE 4, QUIESCENT CURRENT DEVICE “ON”. FIGURE 5. OUTPUT LEAKAGE CURRENTS. FIGURE 6. OUTPUT SOURCE VOLTAGE (REFERENCED TO

1000 Vu = 18¥ r ~

  1. Increase Veg until V12 2 2V.
  2. Measure Voc; this voltage is the high trip point. Pin 2 shouldbe ~— When Vog is turned on, IIN should be equal to or greater than 1A.
  3. Decrease Veg until pin 3 switches, ie.,< 18V. The supply voltage Mis test in the event that the thermal shutdown is not operating

will be the low trip point voltage. Properly. FIGURE 7. OVERVOLTAGE PROTECTION. FIGURE 8. THERMAL SHUTDOWN.

20 Vsar =

FIGURE 9. OUTPUT SATURATION VOLTAGE.