CA3228 HARRIS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
Features
- Low Power Dissipation
- I 2L Control Logic
- Power-On Reset
- On-Chip Oscillator for System Time Reference
- Single Input Line for Operator Commands
- Amplitude Encoded Control Signals
- Transient Compensated Input Commands
- Controlled Acceleration Mode
- Internal Redundant Brake and Low-Speed Disable
- Braking Disable
Applications
- Automotive Speed Control
- Residential and Industrial Heating and Cooling Controls
- Industrial AC and DC Motor Speed Control
- Applications Requiring Acceleration and Deceleration Control File Number 1436.3 June 1999 Pinout CA3228 (PDIP) TOP VIEW GND NC DRIVER COMMAND COMMAND DELAY OSCILLATOR V MEMORY CURRENT SENSE SPEED SENSOR INPUT F/V OUT F/V FILTER VS BRAKE INPUT GND VACUUM CONTROL VENT CONTROL CONTROL AMP+ CONTROL AMP OUTPUT ALIGN ACCELERATE CAPACITOR ACCELERATE RESISTOR VCC OUTPUT GATE CONTROL AMP- V ERROR
Ordering Information
NUMBER TEMPERATURE PACKAGE CA3228E -40 oC to +85oC 24 Lead Plastic DIP OBSOLETE PRODUCT NO RECOMMENDED REPLA CEMENT Call Central Applications 1-800-442-7747or email: centapp@harris.com
Specifications CA3228 Absolute Maximum Ratings Thermal Information Thermal Resistance θJA Power Dissipation Per Package CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Typical Switching Characteristics Driver Command Input Hold Times (Based on 0.68µF on Pin 4): Internal Oscillator Frequency, F (Based on 0.001µF at Pin 5) System Performance FOSC = 50kHz, fS/Speed Ratio = 2.22Hz/mph Speed Sensor Input Frequency Range, fS at Pin 8 . .62Hz to 222Hz Electrical SpecificationsTA = +25oC, VCC = 8.20V, Unless Otherwise Specified (Refer to Figures 2 and 3) PARAMETERS SYMBOLS TEST PIN TEST CONDITIONS MIN MAX UNITS Operating Voltage V CC 13 7.40 9.00 V VCC Supply Current I CC 13 7.50 30.0 mA Current Sense Voltage V 7 7 43k Ω to Ground 4.85 5.95 V Align Voltage V 17 17 41k Ω to Ground 4.00 4.20 V Command Idle Voltage V 3IDLE 3 S1, S2, S3, S4, S5 Open 7.6 7.9 V RESUME Command Voltage V 3RES 3 S2 Closed 5.95 6.56 V ACCEL Command Voltage V 3ACCEL 3 S3 Closed 3.95 4.91 V COAST Command Voltage V 3COAST 3 S4 Closed 1.22 2.23 V OFF Voltage V 3OFF 3 S5 Closed 0 0.77 V ON Voltage V 3ON T.P.A. S1 Closed 9.2 28 V Brake Input Voltage V BRAKE 12 S6 Closed 5.4 28 V OUTPUT VOTLAGE Gate V OL 23 4.7k Ω to VCC - 300 mV VOH 8-V VAC V OL 22 1.2k Ω to VCC - 400 mV VOH 8-V VENT V OL 21 1.2k Ω to VCC - 400 mV VOH 8-V
Specifications CA3228 Functional Block Diagram Memory Set Error V 6 - V10 6, 10 -77 67 mV Deadband Range (VAC and VENT Outputs Off) VDB 21, 22 Sweep Pin 19, Voltage at 1V/sec 0.96 1.43 V Control Amplifier Gain A CNTL 16, 19 A CNTL = V19/V16 74 - Ratio D/A Voltage Range V M 6 Set Mode 6 7.50 V Electrical SpecificationsTA = +25oC, VCC = 8.20V, Unless Otherwise Specified (Refer to Figures 2 and 3) (Continued) PARAMETERS SYMBOLS TEST PIN TEST CONDITIONS MIN MAX UNITS
241 GROUND
“A” “D” “B” MODE SW“C” ALIGN ACCELERATE CAPACITOR ACCELERATE RESISTORACCEL. RATE AMP “E” V ERROR CONTROL AMP. (-) CONTROL AMP. (+) CONTROL AMP. OUTPUT VACUUM CONTROL VENT CONTROL OUTPUT GATEGATE VENT VAC CONTROL AMP. ERROR AMP. 0.45V REDUNDANT BRAKE CONTROL LOGIC I2 L TOGL ON OFF COAST ACCEL RESUME COMMAND DECODER AND DELAY VCC OSC. BRAKE F/V CURRENT SENSOR CONVERTER SENSE MINIMUM SPEED SENSOR ANALOG TO DIGITAL TO ANALOG CONVERTER VS VM VM VS CURRENT SENSE V MEMORY F/V FILTER VS F/V OUT SPEED SENSOR INPUT BRAKE INPUT OSCILLATOR COMMAND DELAY DRIVER COMMAND VCC
40 ms? NOERASE MEMORY YES YESYES NO STANDBYIGNITION OFF? OFF > 40 ms? NO BRAKE? COAST? NO NO NO > 25MPH? NO YESYES YES YES > 25MPH? ACCEL? INPUT > 40ms? INPUT > 40ms? RELAX SERVO ACCEL AT CONTROLLED RATE YES YES STILL ACCEL? RELAX SERVO YES YES YES NO NO NO RESUME? ACCEL > 4 ms? COAST > 40ms? > 25MPH? NO > 25MPH STORED? INPUT > 245ms? SPEED = STORE? YES YES YES NO NO YES NO DISABLE RESUME MODE ENABLE SERVO NO STILL COAST? YES NO ENABLE SERVO > 2 MPH? STORE PRESENT SPEED CRUISE COAST >40ms? NO YES YESACCEL > 40ms? > 25MPH? YES YES NO Redundant BRAKE? BRAKE CLUTCH DISABLE? NO NO NO NO NO YES NO NO YES YES YES IGNITION OFF? SPEED < STORE? YES RELAX SERVO ACCEL AT CONTROLLED RATE ACCEL > 40ms? YESDISABLE RESUME MODE NO COAST > 40ms? YES YES BRAKE? CLUTCH DISABLE? YES NO NO NO DISABLE RESUME MODE OFF > 40ms? DISABLE RESUME MODE
FIGURE 2. TYPICAL AUTOMOTIVE SPEED CONTROL APPLICATION FIGURE 3. SOLENOID DRIVERS AND SERVO VACUUM CONTROL MECHANISM TYPICAL APPLICATION
2.22 Hz/MPH
- Open or Closed as Required to Maintain Set Speed Error
to be able to supply vacuum, the gate output must be low. If the output from the Control Amplifier exceeds 0.573VCC , vacuum is supplied to the servo unit. If the output of the Control Amplifier is between 0.573V CC and 0.427VCC the vacuum is held in the servo unit and vehicle speed is maintained. If the output from the Control Amplifier drops below 0.427V CC or if the gate output is high, the servo unit vacuum is vented. Overspeed Detector Comparator The Overspeed Detector circuit is used when the following sequence of events occur: A speed is set in memory, the vehicle is manually accelerated (foot pedal) to a higher speed and then the ACCEL switch is activated. During vehicle acceleration V S voltage is greater than the VM voltage into the memory update comparator. When the ACCEL command is given, the capacitor at pin 15 rapidly charges to within 60mV of V S before switching the compara- tor output low and starting the fixed acceleration rate from the present vehicle speed. The 60mV of offset is required to insure that the output of the overspeed detector is low under normal operating conditions. Hysteresis is also designed into the comparator to eliminate noise problems which may prevent the chip from going into the Acceleration mode. End of Resume Comparator The Resume Comparator is used when the following sequence of events occurs: A speed is set in memory, the brake applied, causing the vehicle to go to a lower speed, and the RESUME switch is activated. Activation of the RESUME switch causes a fixed accelera- tion rate from the lower speed until the capacitor voltage at pin 15 is equal to the V M voltage. A filter circuit contained in the output of the resume comparator insures that noise doesn’t reset the comparator until V PIN actually equals VM . Align Voltage Source (Pin 17) The Align Voltage Source is a X1 buffer with an output of 0.5VCC . Brake Input Comparator (Pin 12) When the Brake Input exceeds 0.55VCC , the chip will go into the Standby mode from Cruise. Minimum Speed Lockout Assures that the system remains in a Standby mode if vehicle speed VS is below 0.183VCC . It causes the system to revert to the Standby mode if VS drops below 0.183VCC in the Cruise mode. Digital Filter for Redundant Brake and Minimum Speed Lockout A 4 bit shift register with an all ‘1’s output decode is used to filter transients and electromagnetic interference. The filter prevents false signals from putting the system into Standby from Cruise. Ramp Oscillator (Pin 5) The Ramp Oscillator at pin 5 nominally varies between amplitudes of 4.1V and 6.1V. The discharge rate is approximately 4X the charge rate. With a capacitor of 0.001µF on pin 5, the nominal oscillator frequency is 50kHz.
FIGURE 6. FUNCTIONAL BLOCK DIAGRAM FOR SPEED CONTROL (Continued On Next Page)
0.879 I17
0.661 I25
0.376 I23
0.121 I21
4 BIT SRI42
0.55 VCC
FIGURE 6. FUNCTIONAL BLOCK DIAGRAM FOR SPEED CONTROL (Continued)