C2220C104J3GACTU

CBR02C330F9GAC KEMET | Alldatasheet

Document overview

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Technical content

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 One world. One KEMET Benefits

• -55°C to +125°C operating temperature range
• Lead (Pb)-Free, RoHS, and REACH compliant
• EIA 0201, 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220, and 2225 case sizes
• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, 200 V and 250 V
• Capacitance offerings ranging from 0.5 pF up to 0.47 μF
• Available capacitance tolerances of ±0.10 pF, ±0.25 pF, ±0.5
• No piezoelectric noise
• Extremely low ESR and ESL
• High thermal stability
• High ripple current capability Overview KEMET’s C0G dielectric features a 125°C maximum operating temperature and is considered “stable.” The Electronics Components, Assemblies & Materials Association (EIA) characterizes C0G dielectric as a Class I material. Components of this classification are temperature compensating and are suited for resonant circuit applications or those where Q and stability of capacitance characteristics are required. C0G exhibits no change in capacitance with respect to time and voltage and boasts a negligible change in capacitance with reference to ambient temperature. Capacitance change is limited to ±30 ppm/ºC from -55°C to +125°C. Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 200 VDC (Commercial Grade)

Ordering Information

(L" x W") Specification/ Series1 Capacitance Code (pF) Capacitance Tolerance2 Voltage Dielectric Failure Rate/ Design Termination Finish3 Packaging/Grade (C-Spec)4 0201 0402 0603 0805 1206 1210 1808 1812 1825 2220 2225 C = Standard 2 significant digits + number of zeros. Use 9 for 1.0 – 9.9 pF Use 8 for 0.5 – .99 pF e.g., 2.2 pF = 229 e.g., 0.5 pF = 508 B = ±0.10 pF C = ±0.25 pF D = ±0.5 pF F = ±1% G = ±2% J = ±5% K = ±10% M = ±20% 8 = 10 V 4 = 16 V 3 = 25 V 5 = 50 V 1 = 100 V 2 = 200 V A = 250 V G = C0G A = N/A C = 100% Matte Sn Blank = Bulk TU = 7" Reel Unmarked 1 Flexible termination option is available. Please see FT-CAP product bulletin C1062_C0G_FT-CAP_SMD 2 Additional capacitance tolerance offerings may be available. Contact KEMET for details. 3 Additional termination finish options may be available. Contact KEMET for details. 4 Additional reeling or packaging options may be available. Contact KEMET for details.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Dimensions – Millimeters (Inches) L B W S T EIA Size Code Metric Size Code L Length W Width T Thickness B Bandwidth S Separation Minimum Mounting Technique See Table 2 for Thickness Solder Reflow Only Solder Wave or N/A Solder Reflow Only Benefits cont'd

• Preferred capacitance solution at line frequencies and into the MHz range
• No capacitance change with respect to applied rated DC voltage
• Negligible capacitance change with respect to temperature from -55°C to +125°C
• No capacitance decay with time
• Non-polar device, minimizing installation concerns
• 100% pure matte tin-plated termination finish allowing for excellent solderability
• SnPb plated termination finish option available upon request (5% minimum)

Applications

Typical applications include critical timing, tuning, circuits requiring low loss, circuits with pulse, high current, decoupling, bypass, filtering, transient voltage suppression, blocking and energy storage.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Qualification/Certification Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in Table 4, Performance and Reliability. Environmental Compliance Lead (Pb)-Free, RoHS, and REACH compliant without exemptions. Electrical Parameters/Characteristics Item Parameters/Characteristics Operating Temperature Range -55°C to +125°C Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC) ±30 ppm/ºC Aging Rate (Maximum % Capacitance Loss/Decade Hour) 0% Dielectric Withstanding Voltage (DWV) 250% of rated voltage (5 ±1 seconds and charge/discharge not exceeding 50 mA) Dissipation Factor (DF) Maximum Limit @ 25ºC 0.1% Insulation Resistance (IR) Limit @ 25°C 1,000 megohm microfarads or 100 GΩ (Rated voltage applied for 120 ±5 seconds @ 25°C) To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits. Capacitance and Dissipation Factor (DF) measured under the following conditions: 1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF 1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as Automatic Level Control (ALC). The ALC feature should be switched to "ON." Post Environmental Limits High Temperature Life, Biased Humidity, Moisture Resistance Dielectric Rated DC Voltage Capacitance Value Dissipation Factor (Maximum %) Capacitance Shift Insulation Resistance C0G All All 0.5 0.3% or ±0.25 pF 10% of Initial Limit

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes) *Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91). xx¹ Available only in D, J, K,M tolerance xx² Available only in J, K, M tolerance. These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts. Cap Cap Code Case Size/ Series C0201C C0402C C0603C C0805 C C1206C Voltage Code 8 4 3 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 Capacitance Tolerance Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions 0.50 & 0.75 pF 508 & 758 B C D BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC 0.75 pF 758 B C D BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC 1.0– 9.1 pF* 109 – 919* B C D BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 10 pF 100 F G J K M AB¹ AB¹ AB¹ BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 11 pF 110 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 12 pF 120 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 13 pF 130 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 15 pF 150 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 16 pF 160 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 18 pF 180 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 20 pF 200 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 22 pF 220 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DJ DJ DJ DJ DC DC EB EB EB EB EB EB 24 pF 240 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 27 pF 270 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 30 pF 300 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 33 pF 330 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 36 pF 360 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 39 pF 390 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 43 pF 430 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 47 pF 470 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 51 pF 510 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 56 pF 560 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 62 pF 620 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 68 pF 680 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 75 pF 750 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 82 pF 820 F G J K M AB² AB² AB² BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 91 pF 910 F G J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 100 pF 101 F G J K M AB² AB² AB² BB BB BB BB BB BB BB CB CB CB CF CB CB DC DC DC DC DC DC EB EB EB EB EB EB 110 – 180 pF* 111 – 181* F G J K M BB BB BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 200 pF 201 F G J K M BB BB BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 220 pF 221 F G J K M BB BB BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 240 pF 241 F G J K M BB BB BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 270 pF 271 F G J K M BB BB BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 300 pF 301 F G J K M BB BB BB BB BB BD BD CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 330 pF 331 F G J K M BB BB BB BB BB BD BD CB CB CB CF CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 360 pF 361 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 390 pF 391 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 430 pF 431 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 470 pF 471 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DD EB EB EB EB EB EB 510 pF 511 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 560 pF 561 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 620 pF 621 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 680 pF 681 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 750 pF 751 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 820 pF 821 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC EB EB EB EB EB EB 910 pF 911 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DD DD EB EB EB EB EB EB 1,000 pF 102 F G J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DD DD EB EB EB EB EB EB 1,100 pF 112 F G J K M BB BB BB BB CB CB CB CB CB CH CH DC DC DC DC DC DC DC EB EB EB EB EB EB 1,200 pF 122 F G J K M BB BB BB BB CB CB CB CB CB CH CH DC DC DC DC DC DC DC EB EB EB EB EB EB 1,300 pF 132 F G J K M BB BB BB BB CB CB CB CB CB CH CH DD DD DD DD DD DC DC EB EB EB EB EC EC Cap Cap Code Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 Voltage Code 8 4 3 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A Case Size/Series C0201C C0402C C0603C C0805C C1206C

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes) cont'd *Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91). xx¹ Available only in D, J, K,M tolerance xx² Available only in J, K, M tolerance. These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts. Cap Cap Code Case Size/ Series C0201C C0402C C0603C C0805 C C1206C Voltage Code 8 4 3 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 Capacitance Tolerance Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions 1,500 pF 152 F G J K M BB BB BB BB CB CB CB CB CB CH CH DD DD DD DD DD DC DC EB EB EB EB ED EC 1,600 pF 162 F G J K M BB BB BB CB CB CB CB CB CH CH DD DD DD DD DD DC DC EB EB EB EB ED ED 1,800 pF 182 F G J K M BB BB BB CB CB CB CB CB CH CH DD DD DD DD DD DC DC EB EB EB EB ED ED 2,000 pF 202 F G J K M BB BB BB CB CB CB CB CB CH CH DC DC DC DC DC DC DC EB EB EB EB ED ED 2,200 pF 222 F G J K M BB BB BB CB CB CB CB CB CH CH DC DC DC DC DC DC DC EB EB EB EB EE EE 2,400 pF 242 F G J K M CB CB CB CB CB DC DC DC DC DC DC DC EB EB EB EB EC EC 2,700 pF 272 F G J K M CB CB CB CB CB DC DC DC DC DC DC DC EB EB EB EB EC EC 3,000 pF 302 F G J K M CB CB CB CB CB DD DD DD DD DC DC DC EC EC EC EC EC EB EB 3,300 pF 332 F G J K M CB CB CB CB CB DD DD DD DD DC DC DC EC EC EC EC EE EB EB 3,600 pF 362 F G J K M CB CB CB CB CB DD DD DD DD DC DD DD EC EC EC EC EE EB EB 3,900 pF 392 F G J K M CB CB CB CB CB DE DE DE DE DC DD DD EC EC EC EC EF EB EB 4,300 pF 432 F G J K M CB CB CB CB CB DE DE DE DE DC DD DD EC EC EC EC EC EB EB 4,700 pF 472 F G J K M CB CB CB CB CB DE DE DE DE DC DD DD EC EC EC EC EC EB EB 5,100 pF 512 F G J K M CB CB CB CB DE DE DE DE DC DD DD ED ED ED ED ED EB EB 5,600 pF 562 F G J K M CB CB CB CB DC DC DC DC DC DD DD ED ED ED ED ED EB EB 6,200 pF 622 F G J K M CB CB CB CB DC DC DC DC DC DG DG EB EB EB EB EB EB EB 6,800 pF 682 F G J K M CB CB CB CB DC DC DC DC DC DG DG EB EB EB EB EB EB EB 7,500 pF 752 F G J K M CB CB CB DC DC DC DC DC DG DG EB EB EB EB EB EB EB 8,200 pF 822 F G J K M CB CB CB DC DC DC DC DC DG DG EC EC EC EC EB EC EC 9,100 pF 912 F G J K M CB CB CB DC DC DC DC DC EC EC EC EC EB EC EC 10,000 pF 103 F G J K M CB CB CB DC DC DC DC DD ED ED ED ED EB EC EC 12,000 pF 123 F G J K M CB CB CB DC DC DC DC DE EB EB EB EB EB ED ED 15,000 pF 153 F G J K M CB CB CB DC DC DC DD DG EB EB EB EB EB EF EF 18,000 pF 183 F G J K M DC DC DC DD EB EB EB EB EB EH EH 22,000 pF 223 F G J K M DD DD DD DF EB EB EB EB EC EH EH 27,000 pF 273 F G J K M DF DF DF EB EB EB EB EE 33,000 pF 333 F G J K M DG DG DG EB EB EB EB EE 39,000 pF 393 F G J K M DG DG DG EC EC EC EE EH 47,000 pF 473 F G J K M DG DG DG EC EC EC EE EH 56,000 pF 563 F G J K M ED ED ED EF 68,000 pF 683 F G J K M EF EF EF EH 82,000 pF 823 F G J K M EH EH EH EH 0.10 µF 104 F G J K M EH EH EH Cap Cap Code Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 Voltage Code 8 4 3 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A 8 4 3 5 1 2 A Case Size/Series C0201C C0402C C0603C C0805C C1206C

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) *Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91). These products are protected under US Patents 7,172,985 & 7,670,981, other patents pending, and any foreign counterparts. Cap Cap Code Case Size/ Series C1210C C1808C C1812C C1825C C2220C C2225C Voltage Code 8 4 3 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 100 200 250 100 200 Capacitance Tolerance Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions 1.0 – 9.1 pF* 109 – 919* B C D FB FB FB FB FB FB 10 – 91 pF* 100 – 910* F G J K M FB FB FB FB FB FB 100 – 300 pF* 101 – 301* F G J K M FB FB FB FB FB FB 330 – 430 pF* 331 – 431* F G J K M FB FB FB FB FB FB LF LF LF 470 – 910 pF* 471 – 911* F G J K M FB FB FB FB FB FB LF LF LF GB GB GB 1,000 pF 102 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB 1,100 pF 112 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB 1,200 pF 122 F G J K M FB FB FB FB FB FB LF LF LF GB GB GB 1,300 pF 132 F G J K M FB FB FB FB FB FC LF LF LF GB GB GB 1,500 pF 152 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB 1,600 pF 162 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB 1,800 pF 182 F G J K M FB FB FB FB FB FE LF LF LF GB GB GB 2,000 pF 202 F G J K M FB FB FB FB FC FE LF LF LF GB GB GB 2,200 pF 222 F G J K M FB FB FB FB FC FG LF LF LF GB GB GB 2,400 pF 242 F G J K M FB FB FB FB FC FC LF LF LF 2,700 pF 272 F G J K M FB FB FB FB FC FC LF LF LF GB GB GB 3,000 pF 302 F G J K M FB FB FB FB FC FF LF LF 3,300 pF 332 F G J K M FB FB FB FB FF FF LF LF GB GB GB 3,600 pF 362 F G J K M FB FB FB FB FF FF LF LF 3,900 pF 392 F G J K M FB FB FB FB FF FF LF LF GB GB GB HB HB HB 4,300 pF 432 F G J K M FB FB FB FB FF FF LF LF 4,700 pF 472 F G J K M FF FF FF FF FG FG LF LF GB GB GD HB HB HB KE KE KE 5,100 pF 512 F G J K M FB FB FB FB FG FG KE KE KE 5,600 pF 562 F G J K M FB FB FB FB FG FG GB GB GH HB HB HB KE KE KE 6,200 pF 622 F G J K M FB FB FB FB FG FB FB KE KE KE 6,800 pF 682 F G J K M FB FB FB FB FG FB FB GB GB GJ HB HB HB JE JE JB JB KE KE KE 7,500 pF 752 F G J K M FC FC FC FC FC FB FB KE KE KE 8,200 pF 822 F G J K M FC FC FC FC FC FB FB GB GH GB GB HB HB HB JE JE JB JB KE KE KE 9,100 pF 912 F G J K M FE FE FE FE FE FB FB KE KE KE 10,000 pF 103 F G J K M FF FF FF FF FF FB FB GB GH GB GB HB HB HE JE JE JB JB KE KE KE 12,000 pF 123 F G J K M FG FG FG FG FB FB FB GB GG GB GB HB HB HE JE JE JB JB KE KE KE 15,000 pF 153 F G J K M FG FG FG FG FB FC FC GB GB GB GB HB HB JE JE JB JB KE KE KE 18,000 pF 183 F G J K M FB FB FB FB FB FC FC GB GB GB GB HB HE JE JE JB JB KE KE 22,000 pF 223 F G J K M FB FB FB FB FB FF FF GB GB GB GB HB HE JE JB JB JB KE KE 27,000 pF 273 F G J K M FB FB FB FB FB FG FG GB GB GB GB HB HG JE JB JB JB KE KE 33,000 pF 333 F G J K M FB FB FB FB FB FH FH GB GB GB GB JB JB JB JB KE 39,000 pF 393 F G J K M FB FB FB FB FE FH FH GB GB GB GB JB JB JB JB 47,000 pF 473 F G J K M FB FB FB FB FE FJ FJ GB GB GD GD JB JB JB JB 56,000 pF 563 F G J K M FB FB FB FB FF GB GB GD GD JB JB JB JB 68,000 pF 683 F G J K M FB FB FB FC FG GB GB GK GK JB JB JB JB 82,000 pF 823 F G J K M FC FC FC FF FH GB GB GM GM JB JB JB JB 0.10 µF 104 F G J K M FE FE FE FG FM GB GD GM GM JB JB JD JD 0.12 µF 124 F G J K M FG FG FG FH GB GH JB JB JD JD 0.15 µF 154 F G J K M FH FH FH FM GD GN JB JB JG JG 0.18 µF 184 F G J K M FJ FJ FJ GH JB JD JG JG 0.22 µF 224 F G J K M FK FK FK GK JB JD JL JL 0.27 µF 274 F G J K M JB JF 0.33 µF 334 F G J K M JD JG 0.39 µF 394 F G J K M JG 0.47 µF 474 F G J K M JG Cap Cap Code Rated Voltage (VDC) 100 200 250 100 200 250 100 200 250 100 200 250 100 200 250 100 200 Voltage Code 8 4 3 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 A 5 1 2 Case Size/ Series C1210C C1808C C1812C C1825C C2220C C2225C

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 2 – Chip Thickness/Packaging Quantities Thickness Code Case Size Thickness ± Range (mm) Paper Quantity Plastic Quantity 7" Reel 13" Reel 7" Reel 13" Reel AB 0201 0.30 ± 0.03 15,000 0 0 0 BB 0402 0.50 ± 0.05 10,000 50,000 0 0 BD 0402 0.55 ± 0.05 10,000 50,000 0 0 CB 0603 0.80 ± 0.07 4,000 10,000 0 0 CF 0603 0.80 ± 0.07* 4,000 15,000 0 0 CH 0603 0.85 ± 0.07 4,000 10,000 0 0 DJ 0805 0.70 ± 0.20 4,000 10,000 0 0 DC 0805 0.78 ± 0.10 4,000 10,000 0 0 DD 0805 0.90 ± 0.10 4,000 10,000 0 0 DE 0805 1.00 ± 0.10 0 0 2,500 10,000 DF 0805 1.10 ± 0.10 0 0 2,500 10,000 DG 0805 1.25 ± 0.15 0 0 2,500 10,000 EB 1206 0.78 ± 0.10 4,000 10,000 4,000 10,000 EC 1206 0.90 ± 0.10 0 0 4,000 10,000 ED 1206 1.00 ± 0.10 0 0 2,500 10,000 EE 1206 1.10 ± 0.10 0 0 2,500 10,000 EF 1206 1.20 ± 0.15 0 0 2,500 10,000 EH 1206 1.60 ± 0.20 0 0 2,000 8,000 FB 1210 0.78 ± 0.10 0 0 4,000 10,000 FC 1210 0.90 ± 0.10 0 0 4,000 10,000 FE 1210 1.00 ± 0.10 0 0 2,500 10,000 FF 1210 1.10 ± 0.10 0 0 2,500 10,000 FG 1210 1.25 ± 0.15 0 0 2,500 10,000 FH 1210 1.55 ± 0.15 0 0 2,000 8,000 FM 1210 1.70 ± 0.20 0 0 2,000 8,000 FJ 1210 1.85 ± 0.20 0 0 2,000 8,000 FK 1210 2.10 ± 0.20 0 0 2,000 8,000 NC 1706 1.00 ± 0.15 0 0 4,000 10,000 LF 1808 1.00 ± 0.15 0 0 2,500 10,000 GB 1812 1.00 ± 0.10 0 0 1,000 4,000 GD 1812 1.25 ± 0.15 0 0 1,000 4,000 GH 1812 1.40 ± 0.15 0 0 1,000 4,000 GG 1812 1.55 ± 0.10 0 0 1,000 4,000 GK 1812 1.60 ± 0.20 0 0 1,000 4,000 GJ 1812 1.70 ± 0.15 0 0 1,000 4,000 GN 1812 1.70 ± 0.20 0 0 1,000 4,000 GM 1812 2.00 ± 0.20 0 0 500 2,000 HB 1825 1.10 ± 0.15 0 0 1,000 4,000 HE 1825 1.40 ± 0.15 0 0 1,000 4,000 HG 1825 1.60 ± 0.20 0 0 1,000 4,000 JB 2220 1.00 ± 0.15 0 0 1,000 4,000 JD 2220 1.30 ± 0.15 0 0 1,000 4,000 JE 2220 1.40 ± 0.15 0 0 1,000 4,000 JF 2220 1.50 ± 0.15 0 0 1,000 4,000 JG 2220 1.70 ± 0.15 0 0 1,000 4,000 JL 2220 2.00 ± 0.20 0 0 500 2,000 KE 2225 1.40 ± 0.15 0 0 1,000 4,000 Thickness Code Case Size Thickness ± Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel Paper Quantity Plastic Quantity Package quantity based on finished chip thickness specifications.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351 EIA Size Code Metric Size Code Density Level A: Maximum (Most) Land Protrusion (mm) Density Level B: Median (Nominal) Land Protrusion (mm) Density Level C: Minimum (Least) Land Protrusion (mm) C Y X V1 V2 C Y X V1 V2 C Y X V1 V2

1 Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow solder processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes. Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes. Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification testing based on the conditions outlined in IPC Standard 7351 (IPC–7351). Image below based on Density Level B for an EIA 1210 case size. Y C C X X Grid Placement Courtyard Y

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Soldering Process Recommended Soldering Technique:

• Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206
• All other EIA case sizes are limited to solder reflow only Recommended Reflow Soldering Profile: KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection, IR or vapor phase reflow techniques. Preheating of these components is recommended to avoid extreme thermal stress. KEMET’s recommended profile conditions for convection and IR reflow reflect the profile conditions of the IPC/J-STD-020 standard for moisture sensitivity testing. These devices can safely withstand a maximum of three reflow passes at these conditions. Profile Feature Termination Finish SnPb 100% Matte Sn Preheat/Soak Temperature Minimum (TSmin) 100°C 150°C Temperature Maximum (TSmax) 150°C 200°C Time (tS) from TSmin to TSmax 60 – 120 seconds 60 – 120 seconds Ramp-Up Rate (TL to TP) 3°C/second maximum 3°C/second maximum Liquidous Temperature (TL) 183°C 217°C Time Above Liquidous (tL) 60 – 150 seconds 60 – 150 seconds Peak Temperature (TP) 235°C 260°C Time Within 5°C of Maximum Peak Temperature (tP) 20 seconds maximum 30 seconds maximum Ramp-Down Rate (TP to TL) 6°C/second maximum 6°C/second maximum Time 25°C to Peak Temperature 6 minutes maximum 8 minutes maximum Note 1: All temperatures refer to the center of the package, measured on the capacitor body surface that is facing up during assembly reflow. Time Temperature Tsmin 25° C to Peak tL tS tP Tsmax TL TP Maximum Ramp Up Rate = 3°C/sec Maximum Ramp Down Rate = 6°C/sec

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Table 4 – Performance & Reliability: Test Methods and Conditions Stress Reference Test or Inspection Method Terminal Strength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds. Board Flex JIS–C–6429 Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G. Flexible termination system – 3.0 mm (minimum). Solderability J–STD–002 Magnification 50 X. Conditions: a) Method B, 4 hours @ 155°C, dry heat @ 235°C b) Method B @ 215°C category 3 c) Method D, category 3 @ 260°C Temperature Cycling JESD22 Method JA–104 1,000 Cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion. Biased Humidity MIL–STD–202 Method 103 Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement at 24 hours +/- 2 hours after test conclusion. Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor. Measurement at 24 hours +/- 2 hours after test conclusion. Moisture Resistance MIL–STD–202 Method 106 t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered. Measurement at 24 hours +/- 2 hours after test conclusion. Thermal Shock MIL–STD–202 Method 107 -55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20 seconds, dwell time – 15 minutes. Air – Air. High Temperature Life MIL–STD–202 Method 108 /EIA–198 1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied. Storage Life MIL–STD–202 Method 108 150°C, 0 VDC for 1,000 hours. Vibration MIL–STD–202 Method 204 5 g's for 20 min., 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7 secure points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2" from any secure point. Test from 10 – 2,000 Hz Mechanical Shock MIL–STD–202 Method 213 Figure 1 of Method 213, Condition F. Resistance to Solvents MIL–STD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent. Storage and Handling Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of receipt.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Construction Dielectric Material (CaZrO3) Detailed Cross Section Barrier Layer (Ni) Base Metal (Cu) Inner Electrodes (Ni) Termination Finish (100% Matte Sn) Barrier Layer (Ni) Base Metal (Cu) Termination Finish (100% Matte Sn) Inner Electrodes (Ni) Dielectric Material (CaZrO3) Capacitor Marking (Optional): Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices
• EIA 0402 case size devices
• EIA 0603 case size devices with Flexible Termination option.
• KPS Commercial and Automotive grade stacked devices. These capacitors are supplied unmarked only.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Tape & Reel Packaging Information KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips. 8 mm, 12 mm or 16 mm Carrier Tape 178 mm (7.00") or 330 mm (13.00") Anti-Static Reel Embossed Plastic* or Punched Paper Carrier. Embossment or Punched Cavity Anti-Static Cover Tape (.10 mm (.004") Maximum Thickness) Chip and KPS Orientation in Pocket (except 1825 Commercial, and 1825 and 2225 Military) *EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only. KEMET Bar Code Label Sprocket Holes Table 5 – Carrier Tape Confi guration – Embossed Plastic & Punched Paper (mm) EIA Case Size Tape Size (W)* Pitch (P1)* 01005 – 0402 8 2 0603 – 1210 8 4 1805 – 1808 12 4 ≥ 1812 12 8 KPS 1210 12 8 KPS 1812 & 2220 16 12 Array 0508 & 0612 8 4 *Refer to Figures 1 & 2 for W and P1 carrier tape reference locations. *Refer to Tables 6 & 7 for tolerance specifi cations.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Figure 1 – Embossed (Plastic) Carrier Tape Dimensions Po T F W Center Lines of Cavity Ao Bo User Direction of Unreeling Cover Tape Ko B1 is for tape feeder reference only, including draft concentric about B o. ØD1 ØDo Embossment For cavity size, see Note 1 Table 4 [10 pitches cumulative tolerance on tape ± 0.2 mm] Table 6 – Embossed (Plastic) Carrier Tape Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size D0 D1 Minimum Note 1 E1 P0 P2 R Reference Note 2 S1 Minimum Note 3 T Maximum Maximum 8 mm 1.5 +0.10/-0.0 1.0 (0.039) 1.75 ±0.10 (0.069 ±0.004) 4.0 ±0.10 (0.157 ±0.004) 2.0 ±0.05 (0.079 ±0.002) 25.0 (0.984) 0.600 (0.024) 0.600 (0.024) 0.100 (0.004)12 mm 1.5 (0.059) (1.181)16 mm Variable Dimensions — Millimeters (Inches) Tape Size Pitch B1 Maximum Note 4 Minimum F P1 T2 Maximum W Maximum A0,B0 & K0 8 mm Single (4 mm) 4.35 (0.171) 6.25 (0.246) 3.5 ±0.05 (0.138 ±0.002) 4.0 ±0.10 (0.157 ±0.004) 2.5 (0.098) 8.3 (0.327) Note 512 mm Single (4 mm) & Double (8 mm) 8.2 (0.323) 10.25 (0.404) 5.5 ±0.05 (0.217 ±0.002) 8.0 ±0.10 (0.315 ±0.004) 4.6 (0.181) 12.3 (0.484) 16 mm Triple (12 mm) 12.1 (0.476) 14.25 (0.561) 7.5 ±0.05 (0.138 ±0.002) 12.0 ±0.10 (0.157 ±0.004) 4.6 (0.181) 16.3 (0.642) 1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and hole location shall be applied independent of each other. 2. The tape with or without components shall pass around R without damage (see Figure 6). 3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b). 4. B1 dimension is a reference dimension for tape feeder clearance only. 5. The cavity defi ned by A0, B0 and K0 shall surround the component with suffi cient clearance that: (a) the component does not protrude above the top surface of the carrier tape. (b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. (c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3). (d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4). (e) for KPS Series product, A 0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket. (f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Figure 2 – Punched (Paper) Carrier Tape Dimensions User Direction of Unreeling Top Cover Tape T Center Lines of Cavity ØDo Po F W G Cavity Size, See Note 1, Table 7 Bottom Cover Tape Bottom Cover Tape [10 pitches cumulative tolerance on tape ± 0.2 mm] Table 7 – Punched (Paper) Carrier Tape Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size D0 E1 P0 P2 T1 Maximum G Minimum R Reference Note 2 1.75 ±0.10 (0.069 ±0.004) 4.0 ±0.10 (0.157 ±0.004) 2.0 ±0.05 (0.079 ±0.002) 0.10 (0.004) Maximum 0.75 (0.030) (0.984) Variable Dimensions — Millimeters (Inches) Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0 8 mm Half (2 mm) 6.25 (0.246) 3.5 ±0.05 (0.138 ±0.002) 2.0 ±0.05 (0.079 ±0.002) 1.1 (0.098) 8.3 (0.327) Note 1 8 mm Single (4 mm) 4.0 ±0.10 (0.157 ±0.004) 8.3 (0.327) 1. The cavity defi ned by A0, B0 and T shall surround the component with suffi cient clearance that: a) the component does not protrude beyond either surface of the carrier tape. b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. c) rotation of the component is limited to 20° maximum (see Figure 3). d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4). e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements. 2. The tape with or without components shall pass around R without damage (see Figure 6).

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Figure 6 – Reel Dimensions A D (See Note) Full Radius, See Note B (see Note) Access Hole at Slot Location (Ø 40 mm minimum) If present, tape slot in core for tape start: 2.5 mm minimum width x 10.0 mm minimum depth W3 (Includes flange distortion at outer edge) W2 (Measured at hub) W1 (Measured at hub) C (Arbor hole diameter) Note: Drive spokes optional; if used, dimensions B and D shall apply. N Table 8 – Reel Dimensions Metric will govern Constant Dimensions — Millimeters (Inches) Tape Size A B Minimum C D Minimum 8 mm 178 ±0.20 (7.008 ±0.008) or 330 ±0.20 (13.000 ±0.008) 1.5 (0.059) 13.0 +0.5/-0.2 20.2 (0.795)12 mm 16 mm Variable Dimensions — Millimeters (Inches) Tape Size N Minimum W1 W2 Maximum W3 8 mm (1.969) 8.4 +1.5/-0.0 14.4 (0.567) Shall accommodate tape width without interference12 mm 12.4 +2.0/-0.0 18.4 (0.724) 22.4 (0.882)

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) KEMET Corporation World Headquarters

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Simpsonville, SC 29681 Mailing Address: P.O. Box 5928 Greenville, SC 29606 www.kemet.com Tel: 864-963-6300 Fax: 864-963-6521 Corporate Offi ces Fort Lauderdale, FL Tel: 954-766-2800 North America Southeast Lake Mary, FL Tel: 407-855-8886 Northeast Wilmington, MA Tel: 978-658-1663 Central Novi, MI Tel: 248-306-9353 West Milpitas, CA Tel: 408-433-9950 Mexico Guadalajara, Jalisco Tel: 52-33-3123-2141 Europe Southern Europe Paris, France Tel: 33-1-4646-1006 Sasso Marconi, Italy Tel: 39-051-939111 Central Europe Landsberg, Germany Tel: 49-8191-3350800 Kamen, Germany Tel: 49-2307-438110 Northern Europe Bishop’s Stortford, United Kingdom Tel: 44-1279-460122 Espoo, Finland Tel: 358-9-5406-5000 Asia Northeast Asia Hong Kong Tel: 852-2305-1168 Shenzhen, China Tel: 86-755-2518-1306 Beijing, China Tel: 86-10-5829-1711 Shanghai, China Tel: 86-21-6447-0707 Taipei, Taiwan Tel: 886-2-27528585 Southeast Asia Singapore Tel: 65-6586-1900 Penang, Malaysia Tel: 60-4-6430200 Bangalore, India Tel: 91-806-53-76817 Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of KEMET Electronics Corporation.

© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1003_C0G • 4/30/2014 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – C0G Dielectric, 10 – 200 VDC (Commercial Grade) Disclaimer All product specifi cations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed. All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied. Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are not intended to constitute – and KEMET specifi cally disclaims – any warranty concerning suitability for a specifi c customer application or use. The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained. Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage. Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not be required.