B140XTN02.A

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Document overview

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• PDF pages: 33

Technical content

Datasheet sections

• 2.1 General Specification
• 2.2 Optical Characteristics
• 4.1 Absolute Ratings of TFT LCD Module
• 4.2 Absolute Ratings of Environment
• 5.1 TFT LCD Module
• 5.2 Backlight Unit
• 6.1 Pixel Format Image
• 6.2 Integration Interface Requirement
• 6.3 Interface Timing
• 6.4 Power ON/OFF Sequence
• 7.1 Vibration Test
• 7.2 Shock Test
• 7.3 Reliability Test
• 8.1 LCM Outline Dimension
• 9.1 Shipping Label Format
• 9.2 Carton Package
• 9.3 Shipping Package of Palletizing Sequence

B140XTN02.A Document Version : 1.1 ( ) Preliminary Specifications ( V ) Final Specifications Module 14.0”(13.97”) HD 16:9 Color TFT-LCD with LED Backlight design Model Name B140XTN02.A (H/W:5A) Note ( ) LED Backlight with driving circuit design Customer Date DELL 2014/08/20 Checked & Approved by Date Note: This Specification is subject to change without notice. Approved by Date Jonken Fan 2014/08/20 Prepared by Date Wade Chou 2014/08/20 NBBU Marketing Division AU Optronics corporation

B140XTN02.A Document Version : 1.1 Record of Revision Version and Date Page Old description New Description Remark 0.1 2014/05/20 All First Edition for Customer 1.0 2014/08/06 28 Update shipping label format 1.1 2014/08/20 28, 30 Update shipping label format & EDID

B140XTN02.A Document Version : 1.1 1. Handling Precautions 1) Since front polarizer is easily damaged, pay att ention not to scratch it. 2) Be sure to turn off power supply when inserting or disconnecting from input connector. 3) Wipe off water drop immediately. Long contact wi th water may cause discoloration or spots. 4) When the panel surface is soiled, wipe it with a bsorbent cotton or other soft cloth. 5) Since the panel is made of glass, it may break o r crack if dropped or bumped on hard surface. 6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when handling. 7) Do not open nor modify the Module Assembly. 8) Do not press the reflector sheet at the back of the module to any directions. 9) At the insertion or removal of the Signal Interf ace Connector, be sure not to rotate nor tilt the Interface Connector of the TFT Module. 11) After installation of the TFT Module into an en closure (Notebook PC Bezel, for example), do not twist nor bend the TFT Module even momentary . At designing the enclosure, it should be taken into consideration that no bending/ twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module may be damaged. 12) Small amount of materials having no flammabilit y grade is used in the LCD module. The LCD module should be supplied by power complied wit h requirements of Limited Power Source (IEC60950 or UL1950), or be applied exemption. 13) Disconnecting power supply before handling LCD modules, it can prevent electric shock, DO NOT TOUCH the electrode parts, cables, connector s and LED circuit part of TFT module that a LED light bar build in as a light sou rce of back light unit. It can prevent electrostatic breakdown.

B140XTN02.A Document Version : 1.1 2. General Description B140XTN02.A is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The scr een format is intended to support the 16:9 HD, 1366(H) x768(V) screen and 262k colors (RGB 6-b its data driver) with LED backlight driving circuit. All input signals are eDP interfac e compatible. B140XTN02.A is designed for a display unit of noteb ook style personal computer and industrial machine.

2.1 General Specification

The following items are characteristics summary on the table at 25 ℃ condition: Items Unit Specifications Screen Diagonal [mm] 354.95 Active Area [mm] 309.399 x 173.952 Pixels H x V 1366 x 3(RGB) x 768 Pixel Pitch [mm] 0.2265 x 0.2265 Pixel Format R.G.B. Vertical Stripe Display Mode Normally White White Luminance (I LED =21mA) (Note: ILED is LED current) [cd/m 2] 220 typ. (5 points average) 187 min. (5 points average) Luminance Uniformity 1.25 max. (5 points) Contrast Ratio 400 typ Response Time [ms] 8 typ / 16 Max Nominal Input Voltage VDD [Volt] +3.3 typ. Power Consumption [Watt] 2.9W max. (Include Logic a nd Blu power) Weight [Grams] 270 max. Min. Typ. Max. Length 319.9 320.4 320.9 Width 204.6 205.1 205.6 Physical Size Include bracket [mm] Thickness - - 3.0 Electrical Interface 1 Lane eDP Glass Thickness [mm] 0.4 Surface Treatment Anti-Glare, Hardness 3H Support Color 262K colors ( RGB 6-bit )

B140XTN02.A Document Version : 1.1 Temperature Range Operating Storage (Non-Operating) oC] [oC] 0 to +50 -20 to +60 RoHS Compliance RoHS Compliance

2.2 Optical Characteristics

The optical characteristics are measured under stable conditions at 25 ℃ (Room Temperature) : Item Symbol Conditions Min. Typ. Max. Unit Note White Luminance ILED =20mA 5 points average 187 220 - cd/m 2 1, 4, 5. θR θL Horizontal (Right) CR = 10 (Left) degree Viewing Angle ψH ψL Vertical (Upper) CR = 10 (Lower) 4, 9 Luminance Uniformity δ5P 5 Points - - 1.25 1, 3, 4 Luminance Uniformity δ13P 13 Points - - 1.60 2, 3, 4 Contrast Ratio CR 300 400 - 4, 6 Cross talk % - - 4 4, 7 Response Time T RT Rising + Falling - 8 16 msec 4, 8 Rx 0.550 0.580 0.610 Red Ry 0.305 0.335 0.365 Gx 0.300 0.330 0.360 Green Gy 0.535 0.565 0.595 Wx 0.283 0.313 0.343 Color / Chromaticity Coodinates White Wy 0.299 0.329 0.359 NTSC % CIE 1931 - 45 -

B140XTN02.A Document Version : 1.1 Note 1 : 5 points position (Ref: Active area) 1 2 4 5 H /4 H /4 H /4 H /4 H W W /4 W /4 W /4 W /4 Note 2 : 13 points position (Ref: Active area) W /4 W W /4 H H /4 H /4 H /4 H /4 9 1 0 W /4 W /4 1 0 1 0 1 0 1 0 2 3 1 3 1 2 4 5 1 1 Note 3 : The luminance uniformity of 5 or13 points is defi ned by dividing the maximum luminance values by the minimum test point luminance δ W13 = Maximum Brightness of thirteen points Minimum Brightness of thirteen points Maximum Brightness of five points δ W5 = Minimum Brightness of five points

B140XTN02.A Document Version : 1.1 Note 4 : Measurement method The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminan ce, the measurement should be executed after lighti ng Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen. Note 5 ： Definition of Average Luminance of White (Y L): Measure the luminance of gray level 63 at 5 points ， YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5 L (x) is corresponding to the luminance of the point X at Figure in Note (1). Note 6 ： Definition of contrast ratio: Contrast ratio is calculated with the following for mula. Note 7 ： Definition of Cross Talk (CT) Where YA = Luminance of measured location without gray level 0 pattern (cd/m 2) Center of the screen TFT -LCD Module 50 cm Photo detector LCD Panel Field=2 ° Contrast ratio (CR)= Brightness on the “White” state Brightness on the “Black” state

B140XTN02.A Document Version : 1.1 YB = Luminance of measured location with gray level 0 pattern (cd/m 2) Note 8 : Definition of response time: The output signals of BM-7 or equivalent are measur ed when the input signals are changed from “Black” to “White” (falling time) and from “White” to “Black” (rising time), respectively. The response time inte rval between the 10% and 90% of amplitudes. Refer to figure as below. Signal(Relative value) "Black" Tr Tf "White" "White" 10% 90% 100%

B140XTN02.A Document Version : 1.1 Note 9. Definition of viewing angle Viewing angle is the measurement of contrast ratio ≧ 10, at the screen center, over a 180° horizontal an d 180° vertical range (off-normal viewing angles). Th e 180° viewing angle range is broken down as follow s; 90° (θ) horizontal left and right and 90° ( Φ) vertical, high (up) and low (down). The measureme nt direction is typically perpendicular to the display surface with the screen rotated about its center to develop the desired measurement viewing angle.

B140XTN02.A Document Version : 1.1 3. Functional Block Diagram The following diagram shows the functional block of the 14.0 inches wide Color TFT/LCD 30 Pin one channel Module

B140XTN02.A Document Version : 1.1 4. Absolute Maximum Ratings An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions Logic/LCD Drive Voltage Vin -0.3 +4.0 [Volt] Note 1,2

4.2 Absolute Ratings of Environment

Item Symbol Min Max Unit Conditions Operating Temperature TOP 0 +50 [ oC] Note 4 Operation Humidity HOP 5 95 [%RH] Note 4 Storage Temperature TST -20 +60 [ oC] Note 4 Storage Humidity HST 5 95 [%RH] Note 4 Note 1: At Ta (25 ℃ ) Note 2: Permanent damage to the device may occur if exceed maximum values Note 3: LED specification refer to section 5.2 Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard). Twb=39°C Operating Range Storage Range

B140XTN02.A Document Version : 1.1 5. Electrical Characteristics

5.1 TFT LCD Module

5.1.1 Power Specification

Input power specifications are as follows; The power specification are measured under 25 ℃ and frame frenquency under 60Hz Symble Parameter Min Typ Max Units Note VDD Logic/LCD Drive Voltage 3.0 3.3 3.6 [Volt] PDD VDD Power - 0.7 [Watt] Note 1 IDD IDD Current - 212 [mA] Note 1 IRush Inrush Current - - 2000 [mA] Note 2 VDDrp Allowable Logic/LCD Drive Ripple Voltage - - 100 [mV] p-p Note 1 : Maximum Measurement Condition ： Black Pattern at 3.3V driving voltage. (P max =V 3.3 x I black ) Typical Measurement Condition : Mosaic Patte rn Note 2 ： Measure Condition 90% 10% Vin rising time 3.3V 0.5ms

B140XTN02.A Document Version : 1.1

5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off. Signal electrical characteristics are as follows; Display Port main link signal: Display port main link Min Typ Max unit VCM RX input DC Common Mode Voltage 0 V VDiff P-P Peak-to-peak Voltage at a receiving Device 100 1320 mV Fallow as VESA display port standard V1.1a

B140XTN02.A Document Version : 1.1 Display Port AUX_CH signal: Display port AUX_CH Min Typ Max unit VCM AUX DC Common Mode Voltage 0 V VDiff P-P AUX Peak-to-peak Voltage at a receiving Device 0.4 0.6 0.8 V Fallow as VESA display port standard V1.1a. Display Port V HPD signal: Display port V HPD Min Typ Max unit VHPD HPD Voltage 2.25 3.6 V Fallow as VESA display port standard V1.1a.

B140XTN02.A Document Version : 1.1

5.2 Backlight Unit

5.2.1 LED characteristics

Parameter Symbol Min Typ Max Units Condition Backlight Power Consumption PLED - - 2.2 [Watt] (Ta=25 ℃ ), Note 1 Vin =12V LED Life-Time N/A 15,000 - - Hour (Ta=25 ℃ ), Note 2 IF=24 mA Note 1: Calculator value for reference P LED = VF (Normal Distribution) * IF (Normal Distribution) / Efficiency Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.

5.2.2 Backlight input signal characteristics

Parameter Symbol Min Typ Max Units Remark LED Power Supply VLED 7.0 12.0 21.0 [Volt] LED Enable Input High Level 2.2 - 5.5 [Volt] LED Enable Input Low Level VLED_EN - - 0.8 [Volt] PWM Logic Input High Level 2.5 - 5.5 [Volt] PWM Logic Input Low Level VPWM_E N - - 0.8 [Volt] PWM Input Frequency FPWM 150 1K 10K Hz PWM Duty Ratio Duty 5 -- 100 % Define as Connector Interface (Ta=25 ℃) Note 1 : Recommend system pull up/down resistor no bigger than 10kohm

B140XTN02.A Document Version : 1.1 6. Signal Interface Characteristic

6.1 Pixel Format Image

Following figure shows the relationship of the input signals and LCD pixel format. R G B R G B R G B R G B R G B R G B R G B R G B 1 1366 1st Line 768th Line

B140XTN02.A Document Version : 1.1

6.2 Integration Interface Requirement

6.2.1 Connector Description

Physical interface is described as for the connector on module. These connectors are capable of accommodating the f ollowing signals and will be following components. Connector Name / Designation For Signal Connector Manufacturer I-PEX Type / Part Number IPEX 20455-030E-12 Mating Housing/Part Number IPEX 20453-030T-1

B140XTN02.A Document Version : 1.1

6.2.2 Pin Assignment (1 Lane)

eDP lane is a differential signal technology for LCD interface and high speed data transfer device. PIN NO Symbol Function

1 NC No Connect

2 H_GND High Speed Ground

3 Lane1_N Comp Signal Link Lane 1

4 Lane1_P True Signal Link Lane 1

5 H_GND High Speed Ground

6 Lane0_N Comp Signal Link Lane 0

7 Lane0_P True Signal Link Lane 0

8 H_GND High Speed Ground

9 AUX_CH_P True Signal Auxiliary Ch. 10 AUX_CH_N Comp Signal Auxiliary Ch.

11 H_GND High Speed Ground

12 LCD_VCC LCD logic and driver power

13 LCD_VCC LCD logic and driver power

14 LCD_Self_Test LCD Panel Self Test Enable

15 LCD GND LCD logic and driver ground

16 LCD GND LCD logic and driver ground

17 HPD HPD signale pin

18 BL_GND Backlight_ground

19 BL_GND Backlight_ground

20 BL_GND Backlight_ground

21 BL_GND Backlight_ground

22 BL_Enable Backlight On / Off

23 BL PWM DIM System PWM signal Input

24 NC Reverse for AUO TEST only

25 NC Reverse for AUO TEST only

26 BL_PWR Backlight power (7V~21V)

27 BL_PWR Backlight power (7V~21V)

28 BL_PWR Backlight power (7V~21V)

29 BL_PWR Backlight power (7V~21V)

30 NC No Connect

B140XTN02.A Document Version : 1.1 Note1: Start from right side. Note2: Input signals shall be low or High-impedance state when VDD is off. Internal circuit of eDP inputs are as following. Pin 30 Connector Pin 1

B140XTN02.A Document Version : 1.1

6.3 Interface Timing

6.3.1 Timing Characteristics

Basically, interface timings should match the 1366x768 /60Hz manufacturing guide line timing. Parameter Symbol Min. Typ. Max. Unit Frame Rate - - 60 - Hz Clock frequency 1/ T Clock 66.9 76.3 80 MHz Period T V 788 798 768+A Active T VD 768 Vertical Section Blanking T VB 20 30 A TLine Period T H 1416 1592 1366+B Active T HD 1366 Horizontal Section Blanking T HB 50 226 B TClock Note 1 : The above is as optimized setting Note 2 : The maximum clock frequency = (1366+B)*(768+A)*60<80MHz

B140XTN02.A Document Version : 1.1

6.4 Power ON/OFF Sequence

Display Port panel power sequence: Display Port AUX_CH transaction only:

B140XTN02.A Document Version : 1.1 Display Port panel power sequence timing parameter: Note1: The sink must include the ability to generate black video autonomously. The sink must automatically en able black video under the following conditions: -upon LCDVDD power on (with in T2 max)-when the "No videostream_Flag" (VB-ID Bit 3) is received from th e source (at the end of T9). -when no main link data, or invalid video data, is received from the source. Black video must be displ ayed within 64ms (typ) from the start of either condition. Video dat a can be deemed invalid based on MSA and timing inf ormation, for example. Note 2: The sink may implement the ability to disable the b lack video function, as described in Note 1, above, for system development and debugging purpose. Note 3: The sink must support AUX_CH polling by the source immediately following LCDVDD power on without causing damage to the sink device (the source can r e-try if the sink is not ready). The sink must be a ble to respond to an AUX_CH transaction with the time specified within T3 max.

B140XTN02.A Document Version : 1.1 Display Port panel B/L power sequence timing parameter: Note 1 : If T14,T15,T16,T17<10ms ， The display garbage may occur. We suggest T14,T15,T16,T17>10ms to avoid the display garbage. Note 2 ： If T13 or T18<0.5ms ， the inrush current may cause the damage of fuse. If T13 or T18<0.5ms ， the inrush current I 2t is under typical melt of fuse Spec. ， there is no mentioned problem.

B140XTN02.A Document Version : 1.1 7. Panel Reliability Test

7.1 Vibration Test

Test Spec: /circle6 Test method: Non-Operation /circle6 Acceleration: 1.5 G /circle6 Frequency: 10 - 500Hz Random /circle6 Sweep: 30 Minutes each Axis (X, Y, Z)

7.2 Shock Test

Test Spec: /circle6 Test method: Non-Operation /circle6 Acceleration: 220 G , Half sine wave /circle6 Active time: 2 ms /circle6 Pulse: X,Y,Z .one time for each side

7.3 Reliability Test

Items Required Condition Note Temperature Humidity Bias Ta= 40 ℃℃℃℃, 90%RH, 300h High Temperature Operation Ta= 50 ℃℃℃℃, Dry, 300h Low Temperature Operation Ta= 0 ℃℃℃℃, 300h High Temperature Storage Ta= 60 ℃℃℃℃, 35%RH, 300h Low Temperature Storage Ta= -20 ℃℃℃℃, 50%RH, 250h Thermal Shock Test Ta=-20 ℃℃℃℃to 60 ℃℃℃℃, Duration at 30 min, 100 cycles ESD Contact : ±8 KV Air : ±15 KV Note 1 Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. Self-recoverable. No data lost, No hardware failures. Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

B140XTN02.A Document Version : 1.1 8. Mechanical Characteristics

8.1 LCM Outline Dimension

請 請 請 請 勿 觸 碰Don't Touch! 請 請 請 請 勿 觸 碰Don't Touch! Note: Prevention IC damage, IC positions not allowed any overlap over these areas.

B140XTN02.A Document Version : 1.1

B140XTN02.A Document Version : 1.1 9. Shipping and Package

9.1 Shipping Label Format

B140XTN02.A Document Version : 1.1

9.2 Carton Package

9.3 Shipping Package of Palletizing Sequence

B140XTN02.A Document Version : 1.1 10. Appendix: EDID Description Byte Value (hex) Field Name and Comments (hex)

0 Header 00

1 Header FF

2 Header FF

3 Header FF

4 Header FF

5 Header FF

6 Header FF

7 Header 00

8 EISA manufacture code = 3 Character ID 06

9 EISA manufacture code (Compressed ASCII) AF

0A Panel Supplier Reserved – Product Code 3C 0B Panel Supplier Reserved – Product Code 2A 0C LCD module Serial No - Preferred but Optional ( “0” if not used) 00 0D LCD module Serial No - Preferred but Optional (“0” if not used) 00 0E LCD module Serial No - Preferred but Optional ( “0” if not used) 00 0F LCD module Serial No - Preferred but Optional (“0” if not used) 00

10 Week of manufacture 00

11 Year of manufacture 17

12 EDID structure version # = 1 01

13 EDID revision # = 4 04

14 Video I/P definition 95

15 Max H image size = ?? cm (Rounded to cm) 1F 16 Max V image size = ?? cm (Rounded to cm) 11 Display gamma = (gamma ×100)-100 = Example: ( 2. 2×100 ) – 100 = 120 78

18 Feature support 02

19 Red/Green Low bit (RxRy/GxGy) BB

1A Blue/White Low bit (BxBy/WxWy) F5 1B Red X Rx = 0. ??? 94 1C Red Y Ry = 0. ??? 55 1D Green X Rx = 0. ??? 54 1E Green Y Ry = 0. ??? 90 1F Blue X Rx = 0. ??? 27 20 Blue Y Ry = 0. ??? 23 21 White X Rx = 0. ??? 50 22 White Y Ry = 0. ??? 54

B140XTN02.A Document Version : 1.1

23 Established timings 1 (00h if not used) 00

24 Established timings 2 (00h if not used) 00

25 Manufacturer’s timings (00h if not used) 00

26 Standard timing ID1 (01h if not used) 01

27 Standard timing ID1 (01h if not used) 01

28 Standard timing ID2 (01h if not used) 01

29 Standard timing ID2 (01h if not used) 01

2A Standard timing ID3 (01h if not used) 01 2B Standard timing ID3 (01h if not used) 01 2C Standard timing ID4 (01h if not used) 01 2D Standard timing ID4 (01h if not used) 01 2E Standard timing ID5 (01h if not used) 01 2F Standard timing ID5 (01h if not used) 01

30 Standard timing ID6 (01h if not used) 01

31 Standard timing ID6 (01h if not used) 01

32 Standard timing ID7 (01h if not used) 01

33 Standard timing ID7 (01h if not used) 01

34 Standard timing ID8 (01h if not used) 01

35 Standard timing ID8 (01h if not used) 01

Pixel Clock/10,000 (LSB) EC Pixel Clock/10,000 (MSB) 1D Horizontal Active = ???? pixels (lower 8 bits) 56

39 Horizontal Blanking (Thbp) = 320 pixels (lower 8 bits) E8

3A Horizontal Active/Horizontal blanking (Thbp) (upper4:4 bits) 50 3B Vertical Active = ??? lines 00 Vertical Blanking (Tvbp) = ?? lines (DE Blanking typ. for DE only panels) 1E 3D Vertical Active : Vertical Blanking (Tvbp) (upper4:4 bits) 30 3E Horizontal Sync, Offset (Thfp) = ?? pixels 26 3F Horizontal Sync, Pulse Width = ??? pixels 16 40 Vertical Sync, Offset (Tvfp) = ? lines Sync Width = ? lines 36

41 Horizontal Vertical Sync Offset/Width upper 2 bits 00

42 Horizontal Image Size = ??? mm 35 43 Vertical image Size = ??? mm AD

44 Horizontal Image Size / Vertical image size 10

45 Horizontal Border = 0 (Zero for Notebook LCD) 00

46 Vertical Border = 0 (Zero for Notebook LCD ) 00

B140XTN02.A Document Version : 1.1 Bit[7] 0: Non-interlace, 1: Interlace Bit[6:5] 00: Normal display, no strero, see VESA E DID Spec 1.3 Bit[4:3] 00: Analog composite, 01: Bipol ar analog composite, 10: Digital composite, 11: Digital separate Bit[2:1] : The int 1A Pixel Clock/10,000 (LSB) EC Pixel Clock/10,000 (MSB) 1D Horizontal Active = xxxx pixels (lower 8 bits) 56 4B Horizontal Blanking (Thbp) = xxxx pixels (lower 8 bits) 86 4C Horizontal Active/Horizontal blanking (Thbp) (upper4:4 bits) 51 4D Vertical Active = xxxx lines 00 Vertical Blanking (Tvbp) = xxxx lines (DE Blanking typ. for DE only panels) 8C 4F Vertical Active : Vertical Blanking (Tvbp) (upper4:4 bits) 30

50 Horizontal Sync, Offset (Thfp) = xxxx pixels 26

51 Horizontal Sync, Pulse Width = xxxx pixels 16

52 Vertical Sync, Offset (Tvfp) = xx lines Syn c Width = xx lines 36

53 Horizontal Vertical Sync Offset/Width upper 2 bits 00

54 Horizontal Image Size =xxx mm 35

55 Vertical image Size = xxx mm AD

56 Horizontal Image Size / Vertical image size 10

57 Horizontal Border = 0 (Zero for Notebook LCD) 00

58 Vertical Border = 0 (Zero for Notebook LCD ) 00

Bit[7] 0: Non-interlace, 1: Interlace Bit[6:5] 00: Normal display, no strero, see VESA E DID Spec 1.3 Bit[4:3] 00: Analog composite, 01: Bipolar analog composite, 10: Digital composite, 11: Digital separate Bit[2:1] : The int 1A 5A Flag 00 5B Flag 00 5C Flag 00 5D Data Type Tag: Alphanumeric Data String (ASCII) == > fix=FE FE 5E Flag 00 5F Dell P/N 1 st Character 34

60 Dell P/N 2 nd Character 59

61 Dell P/N 3 rd Character 35

62 Dell P/N 4 th Character 59

B140XTN02.A Document Version : 1.1

63 Dell P/N 5 th Character 48

Bit[6:0] See charts below Bit[7] 0: X-rev, 1: A-rev 80

65 Manufacturer P/N 42

66 Manufacturer P/N 31

67 Manufacturer P/N 34

68 Manufacturer P/N 30

69 Manufacturer P/N 58

Manufacturer P/N (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 4E 6C Flag 00 6D Flag 00 6E Flag 00 6F Data Type Tag: Manufacturer Specified Data 00 ==>f ix=00 00

70 Flag 00

71 Color Management 00

72 Panel Structure 41

73 Frame Rate 21

74 Light Controller Interface and Luminance 96

75 Outdoor Features 00

76 Multi-Media Features 11

77 Multi-Media Features 00

78 Special Features #1 00

79 Special Features #2 09

7A Special Features #3 01 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 0A (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 Extension flag (# of optional 128 EDID extension b locks to follow, Typ = 0) 00 Checksum (The 1-byte sum of all 128 bytes in this EDID block shall = 0) 33