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- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 31
Technical content
Datasheet sections
- 2.1 General Specification
- 2.2 Optical Characteristics
- 4.1 Absolute Ratings of TFT LCD Module
- 4.2 Absolute Ratings of Environment
- 5.1 TFT LCD Module
- 5.2 Backlight Unit
- 6.1 Pixel Format Image
- 6.2 The Input Data Format
- 6.3 Integration Interface Requirement
- 6.4 Interface Timing
- 7.1 Vibration Test
- 7.2 Shock Test
- 7.3 Reliability Test
- 8.1 LCM Outline Dimension
- 9.1 Shipping /Carton Label Format
- 9.2 Carton Package
- 9.3 Shipping Package of Palletizing Sequence
B140RW02 V2 Document Version : 1.0 V ) Preliminary Specifications ( V ) Final Specifications Module 14.0” (13.98”) HD+ 16:9 Color TFT-LCD with LED Backlight design Model Name B140RW02 V2 (H/W:0A) Note ( ) LED Backlight with driving circuit design Customer Date Checked & Approved by Date Note: This Specification is subject to change without notice. Approved by Date Bonnie Chen 10/04/2010 Prepared by Date HsinYin Yu 10/04/2010 NBBU Marketing Division AU Optronics corporation
B140RW02 V2 Document Version : 1.0 Record of Revision Version and Date Page Old description New Description Remark 0.1 2010/07/09 All First Edition for Customer
21 Old clock frequency New colck frequency
26 Old outline drawing Update outline drawing. 27 Old label information. New label information. 0.2 2010/09/17 29-31 EDID TBD EDID information. All Preliminary SPEC Final SPEC 1.0 2010/10/04 29-31 Old EDID information New EDID information
B140RW02 V2 Document Version : 1.0 1. Handling Precautions 1) Since front polarizer is easily damaged, pay att ention not to scratch it. 2) Be sure to turn off power supply when inserting or disconnecting from input connector. 3) Wipe off water drop immediately. Long contact wi th water may cause discoloration or spots. 4) When the panel surface is soiled, wipe it with a bsorbent cotton or other soft cloth. 5) Since the panel is made of glass, it may break o r crack if dropped or bumped on hard surface. 6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when handling. 7) Do not open nor modify the Module Assembly. 8) Do not press the reflector sheet at the back of the module to any directions. 9) At the insertion or removal of the Signal Interf ace Connector, be sure not to rotate nor tilt the Interface Connector of the TFT Module. 11) After installation of the TFT Module into an en closure (Notebook PC Bezel, for example), do not twist nor bend the TFT Module even momentary. At designing the enclosure, it should be taken into consideration th at no bending/twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module may be damaged. 12) Small amount of materials having no flammability grade is used in the LCD module. The LCD module should be supplied by power complied with requirements of Limited Power Source (IEC60950 or UL1950), or be applied exemption. 13) Disconnecting power supply before handling LCD modules, it can prevent electric shock, DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT module that a LED light bar build in as a light source of back light unit. It can prevent electrostic breakdown.
B140RW02 V2 Document Version : 1.0 2. General Description B140RW02 V2 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The screen format is intended to support the 16:9 HD, 1600(H) x900(V) screen and 262k colors (RGB 6-bits data driver) with LED backlight driving circuit. All input signals are LV DS interface compatible. B140RW02 V2 is designed for a display unit of noteb ook style personal computer and industrial machine.
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition: Items Unit Specifications Screen Diagonal [mm] 354.95 Active Area [mm] 309.60 X 174.15 Pixels H x V 1600x3(RGB) x 900 Pixel Pitch [mm] 0.1935X0.1935 Pixel Format R.G.B. Vertical Stripe Display Mode Normally White White Luminance (I LED =20mA) (Note: ILED is LED current) [cd/m 2] 200 typ. (5 points average) Luminance Uniformity 1.25 max. (5 points) Contrast Ratio 400(typ) Response Time [ms] 8 typ / 16 Max Nominal Input Voltage VDD [Volt] +3.3 typ. Power Consumption [Watt] 4.0 max. (Include Logic an d Blu power) Weight [Grams] 325 max. Min. Typ. Max. Length 320.9 Width 205.6 Physical Size Include bracket [mm] Thickness 3.6 Electrical Interface 2 channel LVDS Glass Thickness [mm] 0.5 Surface Treatment Anti-Glare, Hardness 3H, Support Color 262K colors ( RGB 6-bit )
B140RW02 V2 Document Version : 1.0 Temperature Range Operating Storage (Non-Operating) [oC] [oC] 0 to +50 -20 to +60 RoHS Compliance RoHS Compliance
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 ℃ (Room Temperature) : Item Symbol Conditions Min. Typ. Max. Unit Note White Luminance ILED =20mA 5 points average 170 200 - cd/m 2 1, 4, 5. θR θL Horizontal (Right) CR = 10 (Left) degree Viewing Angle ψH ψL Vertical (Upper) CR = 10 (Lower) 4, 9 Luminance Uniformity δ5P 5 Points - - 1.25 1, 3, 4 Luminance Uniformity δ13P 13 Points - - 1.50 2, 3, 4 Contrast Ratio CR 300 400 - 4, 6 Cross talk % 4 4, 7 Tr Rising - Tf Falling - Response Time TRT Rising + Falling - 8 16 msec 4, 8 Rx 0.580 0.610 0.640 Red Ry 0.320 0.350 0.380 Gx 0.290 0.320 0.350 Green Gy 0.530 0.560 0.590 Wx 0.283 0.313 0.343 Color / Chromaticity Coodinates White Wy 0.299 0.329 0.359 NTSC % CIE 1931
B140RW02 V2 Document Version : 1.0 Note 1 : 5 points position (Ref: Active area) 1 2 4 5 H /4 H /4 H /4 H /4 H W W /4 W /4 W /4 W /4 Note 2 : 13 points position (Ref: Active area) W /4 W W /4 H H /4 H /4 H /4 H /4 9 1 0 W /4 W /4 1 0 1 0 1 0 1 0 2 3 1 3 1 2 4 5 1 1 Note 3 : The luminance uniformity of 5 or13 points is defi ned by dividing the maximum luminance values by the minimum test point luminance Note 4 : Measurement method The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting δ W13 = Maximum Brightness of thirteen points Minimum Brightness of thirteen points Maximum Brightness of five points δ W5 = Minimum Brightness of five points
B140RW02 V2 Document Version : 1.0 Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen. Note 5 /uniFF1A Definition of Average Luminance of White (Y L): Measure the luminance of gray level 63 at 5 points /uniFF0C YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5 L (x) is corresponding to the luminance of the point X at Figure in Note (1). Note 6 /uniFF1A Definition of contrast ratio: Contrast ratio is calculated with the following for mula. Note 7 /uniFF1A Definition of Cross Talk (CT) Where YA = Luminance of measured location without gray level 0 pattern (cd/m2) YB = Luminance of measured location with gray level 0 pattern (cd/m 2) Center of the screen TFT -LCD Module 50 cm Photo detector LCD Panel Field =2 ° Contrast ratio (CR)= Brightness on the “White” state Brightness on the “Black” state
B140RW02 V2 Document Version : 1.0 Note 8 : Definition of response time: The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to “White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between the 10% and 90% of amplitudes. Refer to figure as below. Signal(Relative value) "Black" Tr Tf "White" "White" 10% 90% 100%
B140RW02 V2 Document Version : 1.0 Note 9 . Definition of viewing angle Viewing angle is the measurement of contrast ratio ≧ 10, at the screen center, over a 180° horizontal and 180° vertical range (off-normal viewing angles). Th e 180° viewing angle range is broken down as follows; 90° (θ) horizontal left and right and 90° ( Φ) vertical, high (up) and low (down). The measureme nt direction is typically perpendicular to the display surface with the screen rotated about its center to develop the desired measurement viewing angle.
B140RW02 V2 Document Version : 1.0 3. Functional Block Diagram The following diagram shows the functional block of the 14.0 inches wide Color TFT/LCD 40 Pin one channel Module
B140RW02 V2 Document Version : 1.0 4. Absolute Maximum Ratings An absolute maximum rating of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions Logic/LCD Drive Voltage Vin -0.3 +4.0 [Volt] Note 1,2
4.2 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions Operating Temperature TOP 0 +50 [ oC] Note 4 Operation Humidity HOP 5 95 [%RH] Note 4 Storage Temperature TST -20 +60 [ oC] Note 4 Storage Humidity HST 5 95 [%RH] Note 4 Note 1: At Ta (25 ℃ ) Note 2: Permanent damage to the device may occur if exceed maximum values Note 3: LED specification refer to section 5.2 Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard). Twb=39°C Operating Range Storage Range
B140RW02 V2 Document Version : 1.0 5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows; The power specification are measured under 25 ℃ and frame frenquency under 60Hz Symble Parameter Min Typ Max Units Note VDD Logic/LCD Drive Voltage 3.0 3.3 3.6 [Volt] PDD VDD Power - - 1.5 [Watt] Note 1 IDD IDD Current - - 454 [mA] Note 1 IRush Inrush Current - - 2000 [mA] Note 2 VDDrp Allowable Logic/LCD Drive Ripple Voltage - - 100 [mV] p-p Note 1 : Maximum Measurement Condition /uniFF1A Black Pattern at 3.3V driving voltage. (P max =V 3.3 x I black ) Note 2/uniFF1A Measure Condition 90% 10% Vin rising time 3.3V 0.5ms
B140RW02 V2 Document Version : 1.0
5.1.2 Signal Electrical Characteristics
Signal electrical characteristics are as follows; Parameter Condition Min Max Unit VTH Differential Input High Threshold (Vcm=+1.2V) 100 [mV] VTL Differential Input Low Threshold (Vcm=+1.2V) -100 - [mV] VCM Differential Input Common Mode Voltage 1.125 1.375 [V] Note: LVDS Signal Waveform
B140RW02 V2 Document Version : 1.0
5.2 Backlight Unit
5.2.1 LED characteristics
Parameter Symbol Min Typ Max Units Condition Backlight Power Consumption PLED - - 2.5 [Watt] (Ta=25 ℃ ), Note 1 Vin =12V LED Life-Time N/A 10000 - - Hour (Ta=25 ℃ ), Note 2 IF=20 mA Note 1: Calculator value for reference P LED = V F (Normal Distribution) * I F (Normal Distribution) / Efficiency Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.
5.2.2 Backlight input signal characteristics
Parameter Symbol Min Typ Max Units Remark LED Power Supply VLED 6.0 12.0 21.0 [Volt] LED Enable Input High Level 2.5 - 5.5 [Volt] LED Enable Input Low Level VLED_EN - - 0.8 [Volt] PWM Logic Input High Level 2.5 - 5.5 [Volt] PWM Logic Input Low Level VPWM_EN - - 0.8 [Volt] PWM Input Frequency FPWM 200 - 20K Hz PWM Duty Ratio Duty 5 -- 100 % Define as Connector Interface (Ta=25 ℃ )
B140RW02 V2 Document Version : 1.0 6. Signal Interface Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format. R G B R G B R G B R G B R G B R G B R G B R G B 1 1600 1st Line 900th Line
B140RW02 V2 Document Version : 1.0
6.2 The Input Data Format
B140RW02 V2 Document Version : 1.0 Signal Name Description Red Data 5 (MSB) Red Data 4 Red Data 3 Red Data 2 Red Data 1 Red Data 0 (LSB) Red-pixel Data Red-pixel Data Each red pixel's brightness data consists of these 6 bits pixel data. Green Data 5 (MSB) Green Data 4 Green Data 3 Green Data 2 Green Data 1 Green Data 0 (LSB) Green-pixel Data Green-pixel Data Each green pixel's brightness data consists of these 6 bits pixel data. Blue Data 5 (MSB) Blue Data 4 Blue Data 3 Blue Data 2 Blue Data 1 Blue Data 0 (LSB) Blue-pixel Data Blue-pixel Data Each blue pixel's brightness data consists of these 6 bits pixel data. RxCLKIN Data Clock The signal is used to strobe the pixel data and DE signals. All pixel data shall be valid at the falling edge when the DE signal is high. DE Display Timing This signal is strobed at the fal ling edge of RxCLKIN. When the signal is high, the pixel data shall be valid to be displayed. VS Vertical Sync The signal is synchronized to RxCL KIN . HS Horizontal Sync The signal is synchronized to Rx CLKIN . Note: Output signals from any system shall be low or High-impedance state when VDD is off.
B140RW02 V2 Document Version : 1.0
6.3 Integration Interface Requirement
6.3.1 Connector Description
Physical interface is described as for the connector on module. These connectors are capable of accommodating the f ollowing signals and will be following components. Connector Name / Designation For Signal Connector Manufacturer IPEX or Compatiable Type / Part Number IPEX 20455-040E-12R or Compatiable Mating Housing/Part Number IPEX 20453-040T-11 or Compatiable
6.3.2 Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device. PIN # SIGNAL NAME DESCRIPTION
1 NC NC
2 VDD + 3.3V Power Supply 3 VDD + 3.3V Power Supply 4 VEDID + 3.3V EDID Power 5 N.C No Connect.
6 CLKEDID EDID Clock Input
7 DATAEDID EDID Data Input
8 Odd_Rin0- -LVDS Differential Data Input
9 Odd_Rin0+ +LVDS Differential Data Input
10 VSS Power Ground
11 Odd_Rin1- -LVDS Differential Data Input
12 Odd_Rin1+ +LVDS Differential Data Input
13 VSS Power Ground
14 Odd_Rin2- -LVDS Differential Data Input
15 Odd_Rin2+ +LVDS Differential Data Input
16 VSS Power Ground
17 Odd_ClkIN- -LVDS Differential Clock Input
18 Odd_ClkIN+ +LVDS Differential Clock Input
19 VSS Ground
20 Even_Rin0- -LVDS Differential Data Input
21 Even_Rin0+ +LVDS Differential Data Input
B140RW02 V2 Document Version : 1.0
22 VSS Power Ground
23 Even_Rin1- -LVDS Differential Data Input
24 Even_Rin1+ +LVDS Differential Data Input
25 VSS Power Ground
26 Even_Rin2- -LVDS Differential Data Input
27 Even_Rin2+ +LVDS Differential Data Input
28 VSS Power Ground
29 Even_ClkIN- -LVDS Differential Clock Input
30 Even_ClkIN+ +LVDS Differential Clock Input
31 VLED_GND LED_GND
32 VLED_GND LED_GND
33 VLED_GND LED_GND
34 NC NC
35 S-PWM
36 LED_EN
37 NC NC
38 VLED LED_Positive (6~21)
39 VLED LED_Positive(6~21)
40 VLED LED_Positive(6~21)
B140RW02 V2 Document Version : 1.0 Note1: Input signals shall be low or High-impedance state when VDD is off.
6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1600x900 /60Hz manufacturing guide line timing. Parameter Symbol Min. Typ. Max. Unit Frame Rate - 50 60 - Hz Clock frequency 1/ T Clock 53.9 MHz Period T V 908 912 2047 Active T VD 900 Vertical Section Blanking T VB 8 12 - TLine Period T H 840 1006 2047 Active T HD 800 Horizontal Section Blanking T HB 40 206 TClock Note : DE mode only Pin 40 VLE NC Pin 1 Connector
B140RW02 V2 Document Version : 1.0
6.4.2 Timing diagram
Input Timing Definition ( DE Mode) TCLOCK Input Data Pixel Pixel Pixel Pixel N-1 Pixel N Invaild Data Invaild Data Pixel
B140RW02 V2 Document Version : 1.0
6.5 Power ON/OFF Sequence
VDD power on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off Power Sequence Timing Value Parameter Min. Max. Units T1 0.5 10 T2 0 50 T3 250 - T4 200 - T5 0 50 T6 0 10 T7 500 - T8 10 - T9 10 180 T10 10 180 T11 10 - T12 0.5 10 ms
B140RW02 V2 Document Version : 1.0 7. Panel Reliability Test
7.1 Vibration Test
Test Spec: /circle6 Test method: Non-Operation /circle6 Acceleration: 1.5 G /circle6 Frequency: 10 - 500Hz Random /circle6 Sweep: 30 Minutes each Axis (X, Y, Z)
7.2 Shock Test
Test Spec: /circle6 Test method: Non-Operation /circle6 Acceleration: 220 G , Half sine wave /circle6 Active time: 2 ms /circle6 Pulse: X,Y,Z .one time for each side
7.3 Reliability Test
Items Required Condition Note Temperature Humidity Bias Ta= 40 ℃℃℃℃, 90%RH, 300h High Temperature Operation Ta= 50 ℃℃℃℃, Dry, 300h Low Temperature Operation Ta= 0℃℃℃℃, 300h High Temperature Storage Ta= 60 ℃℃℃℃, 35%RH, 300h Low Temperature Storage Ta= -20 ℃℃℃℃, 50%RH, 250h Thermal Shock Test Ta=-20 ℃℃℃℃to 60 ℃℃℃℃, Duration at 30 min, 100 cycles ESD Contact : ±8 KV Air : ±15 KV Note 1 Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost . Self-recoverable. No hardware failures. Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%
25 of 31 B140RW02 V2 Document Version : 1.0 8. Mechanical Characteristics
8.1 LCM Outline Dimension
26 of 31 B140RW02 V2 Document Version : 1.0 Note: Prevention IC damage, IC positions not allowed any overlap over these areas.
27 of 31 B140RW02 V2 Document Version : 1.0 9. Shipping and Package
9.1 Shipping /Carton Label Format
28 of 31 B140RW02 V2 Document Version : 1.0
9.2 Carton Package
The outside dimension of carton is 455 (L)mm x 380 (W)mm x 355 (H)mm
9.3 Shipping Package of Palletizing Sequence
29 of 31 B140RW02 V2 Document Version : 1.0 10. Appendix: EDID Description Address FUNCTION Value Value Value Note HEX HEX BIN DEC
00 Header 00 00000000 0
01 FF 11111111 255
02 FF 11111111 255
03 FF 11111111 255
04 FF 11111111 255
05 FF 11111111 255
06 FF 11111111 255
08 EISA Manuf. Code LSB 06 00000110 6
09 Compressed ASCII AF 10101111 175
0A Product Code 3E 00111110 62 0B hex, LSB first 22 00100010 34 0C 32-bit ser # 00 00000000 0 0D 00 00000000 0 0E 00 00000000 0 0F 00 00000000 0
10 Week of manufacture 22 00100010 34
11 Year of manufacture 14 00010100 20
12 EDID Structure Ver. 01 00000001 1
13 EDID revision # 03 00000011 3
14 Video input def. (digital I/P, non-TMDS, CRGB) 80 10000000 128
15 Max H image size (rounded to cm) 1F 00011111 31
16 Max V image size (rounded to cm) 11 00010001 17
17 Display Gamma (=(gamma*100)-100) 78 01111000 120
Feature support (no DPMS, Active OFF, RGB, tmg Blk#1) 0A 00001010 10
19 Red/green low bits (Lower 2:2:2:2 bits) 61 01100001 97
1A Blue/white low bits (Lower 2:2:2:2 bits) 95 10010101 149 1B Red x (Upper 8 bits) 9C 10011100 156 1C Red y/ highER 8 bits 59 01011001 89 1D Green x 52 01010010 82 1E Green y 8F 10001111 143 1F Blue x 26 00100110 38
20 Blue y 21 00100001 33
21 White x 50 01010000 80
22 White y 54 01010100 84
23 Established timing 1 00 00000000 0
24 Established timing 2 00 00000000 0
25 Established timing 3 00 00000000 0
26 Standard timing #1 01 00000001 1
28 Standard timing #2 01 00000001 1
2A Standard timing #3 01 00000001 1 2B 01 00000001 1 2C Standard timing #4 01 00000001 1
30 of 31 B140RW02 V2 Document Version : 1.0 2D 01 00000001 1 2E Standard timing #5 01 00000001 1 2F 01 00000001 1
30 Standard timing #6 01 00000001 1
32 Standard timing #7 01 00000001 1
34 Standard timing #8 01 00000001 1
36 Pixel Clock/10000 LSB 1C 00011100 28
37 Pixel Clock/10000 USB 2A 00101010 42
38 Horz active Lower 8bits 40 01000000 64
39 Horz blanking Lower 8bits 72 01110010 114
3A HorzAct:HorzBlnk Upper 4:4 bits 61 01100001 97 3B Vertical Active Lower 8bits 84 10000100 132 3C Vertical Blanking Lower 8bits 0C 00001100 12 3D Vert Act : Vertical Blanking (upper 4:4 bit) 30 00110000 48 3E HorzSync. Offset 40 01000000 64 3F HorzSync.Width 2A 00101010 42 40 VertSync.Offset : VertSync.Width 33 00110011 51
41 Horz&Vert Sync Offset/Width Upper 2bits 00 00000000 0
42 Horizontal Image Size Lower 8bits 35 00110101 53
43 Vertical Image Size Lower 8bits AE 10101110 174
44 Horizontal & Vertical Image Size (upper 4:4 bits) 10 00010000 16
45 Horizontal Border (zero for internal LCD) 00 00000000 0
46 Vertical Border (zero for internal LCD) 00 00000000 0
47 Signal (non-intr, norm, no stero, sep sync, neg pol) 18 00011000 24
48 Pixel Clock/10,000 (LSB) 13 00010011 19
49 Pixel Clock/10,000 (MSB) 1C 00011100 28 40Hz frame rate
4A Horizontal Addressable Pixels, lower 8 bits 40 01000000 64 4B Horizontal Blanking Pixels, lower 8 bits 72 01110010 114 4C H Pixels, upper nibble : H Blanking, upper nibble 61 01100001 97 4D Vertical Addressable Lines, lower 8 bits 84 10000100 132 4E Vertical Blanking Lines, lower 8 bits 0C 00001100 12 4F V lines, upper nibble : V blanking, upper nibble 30 00110000 48
50 Horizontal Front Porch, lower 8 bits 40 01000000 64
51 Horizontal Sync Pulse, lower 8 bits 2A 00101010 42
52 V Front Porch, lower nibble : V Sync Pulse, lower nibble 33 00110011 51
53 VFP, 2 bits: VSP 2 bits: HFP 2 bits: HFP 2 bits 00 00000000 0
54 Horizontal Image Size in mm, lower 8 bits 35 00110101 53
55 Vertical Image Size in mm, lower 8 bits AE 10101110 174
56 H Image Size, upper nibble : V Image Size, upper nibble 10 00010000 16
57 Horizontal Border 00 00000000 0
58 Vertical Border 00 00000000 0
59 Bit Encode Sync Information 18 00011000 24
31 of 31 B140RW02 V2 Document Version : 1.0 5E HFP 00 00000000 0 5F HFPe 00 00000000 0
60 HBP 00 00000000 0
61 HB 00 00000000 0
62 HSO 00 00000000 0
63 HS 00 00000000 0
64 VTOTAL 00 00000000 0
65 VA 00 00000000 0
66 VBL 00 00000000 0
67 VFP 00 00000000 0
68 VBP 00 00000000 0
69 VB 00 00000000 0
6C Detail Timing Description #4 00 00000000 0 6D Flag 00 00000000 0 6E Reserved 00 00000000 0 6F For Brightness Table and Power Consumption 02 00000010 2
70 Flag 00 00000000 0 Header
71 PWM % [7:0] @ Step 0 0B 00001011 11
72 PWM % [7:0] @ Step 5 48 01001000 72
73 PWM % [7:0] @ Step 10 F5 11110101 245
74 Nits [7:0] @ Step 0 0A 00001010 10
75 Nits [7:0] @ Step 5 3C 00111100 60
76 Nits [7:0] @ Step 10 64 01100100 100
77 Panel Electronics Power @ 32x32 Chess Pattern = 14 00010100 20
78 Backlight Power @ 60 nits = 0E 00001110 14
79 Backlight Power @ Step 10 = 1A 00011010 26
7A Nits @ 100% PWM Duty = 68 01101000 104 Power Consumption 7B Flag 20 00100000 32 7C Flag 20 00100000 32 7D Flag 20 00100000 32 7E Extension Flag 00 00000000 0 7F Checksum 5B 01011011 91