AS5C1008 AUSTIN | Alldatasheet

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Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

FEATURES

  • Access times of 15, 20 and 25 ns
  • Fast output enable (t AOE ) for cache applications
  • Low active power
  • Low standby power
  • Fully static operation, no clock or refresh required
  • TTL Compatible Inputs and Outputs
  • Single +5V power supply
  • Package in Industry-standard 32-pin SOJ 128K x 8 SRAM RUGGEDIZED PLASTIC HIGH SPEED SRAM PIN ASSIGNMENT (Top View) 32-Pin Plastic SOJ (DJ) GENERAL DESCRIPTION The ASI AS5C1008 is a high speed, low power, 128K by 8-bit ruggedized plastic (COTS) CMOS Static RAM. It is fabri- cated using high performance, CMOS technology. This highly reliable process coupled with innovative circuit design tech- niques, yields access times as fast as 15ns (Max) over the military and industrial temperature ranges. When Chip Enable (CE\\) is HIGH, the device assumes a standby mode at which the power dissipation can be reduced down to 125mW (max) at CMOS input levels. Easy memory expansion is provided by using asserted LOW CE\\ and asserted HIGH CE2, and asserted LOW write enable (WE\\) controls both writing and reading of the memory. TheAS5C1008 is pin-compatible with other 128K x 8 SRAM's in the SOJ package. *For ceramic versions of this product, please see the MT5C1008 datasheet. OPTIONS MARKING
  • Timing 15ns access -15 20ns access -20 25ns access -25
  • Package Plastic SOJ* DJ No. 905
  • Operating Temperature Ranges -Military (-55 oC to +125oC) XT -Industrial (-40oC to +85oC) IT For more products and information please visit our web site at www.austinsemiconductor.com PIN FUNCTIONS A0 - A16 Address Inputs WE\\ Write Enable CE\\1, CE2 Chip Enable OE\\ Output Enable I/O0 - I/O7 Data Inputs/Outputs VCC Power VSS Ground NC No Connection NC A16 A15 A14 A13 I/O0 I/O1 I/02 Vss Vcc CE WE\\ A10 A11 OE\\ A12 CE\\ I/O7 I/O6 I/O5 I/O4 I/O3

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ABSOLUTE MAXIMUM RATINGS* oC to +125oC *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTIONAL BLOCK DIAGRAM Address A16 I/O0 Data I/O7 CE\\1 CE2 WE\\ OE\\ Decoder Input Data Control Memory Matrix Column I/O

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. PARAMETER CONDITIONS SYMBOL MIN MAX MIN MAX MIN MAX UNITS Dynamic Operating Current Vcc=MAX, IOUT = 0mA, CE 1 = VIL and CE2 = VIH, f = fmax ICC1 180 150 140 mA TTL Standby Current - TTL Inputs Vcc=MAX, VIN = VIH or VIL, CE\\1> VIH and CE2 > VIL, f = fmax ISB1 90 75 70 mA CMOS Standby Current - CMOS Inputs Vcc=MAX, CE\\1 > Vcc -0.2V, or CE2 < 0.2V, VIN > Vcc -0.2V and VIN < 0.2V, f = 0 ISB2 10 10 10 mA Input Leakage Current GND < VIN < Vcc I LI -10 10 -10 10 -10 10 µA Output Leakage CurrentGND < VOUT < Vcc Output Disabled ILO -10 10 -10 10 -10 10 µA Output High Voltage Vcc = MIN, IOH = -4.0 mA V OH 2.4 2.4 2.4 V Output Low Voltage Vcc = MIN, IOL = 8.0 mA V OL 0.4 0.4 0.4 V Input High Voltage V IH 2.2 Vcc +0.5 2.2 Vcc +0.5 2.2 Vcc +0.5 V -15 -20 -25 ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC <TA<+125oC or -40oC to +85oC; Vcc = 5V+10%) PIN DESCRIPTIONS A0 - A16: Address Inputs These 17 address inputs select one of the 131,072 8-bit words in the RAM. CE\\1: Chip Enable 1 Input CE\\1 is asserted LOW to read from or write to the device. If Chip Enable 1 is deasserted, the device is deselected and is in standby power mode. The I/O pins will be in the high-impedance state when the device is deselected. CE 2: Chip Enable 2 Input CE 2 is asserted HIGH to read from or write to the device. If Chip Enable 2 is deasserted, the device is deselected and is in standby power mode. The I/O pins will be in the high-impedance state when the device is deselected. OE\\: Output Enable Input The Output Enable Input is asserted LOW. If asserted LOW while CE\\ 1 is asserted (LOW) and CE2 is asserted (HIGH) and WE\\ is deasserted (HIGH), data from the SRAM will be present on the I/O pins. The I/O pins will be in the high-impedance state when OE\\ is deasserted. WE\\: Write Enable Input The Write Enable input is asserted LOW and controls read and write operations. When CE\\ 1 and WE\\ are both asserted (LOW) and CE2 is asserted (HIGH) input data present on the I/O pins will be written into the selected memory location.

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (-55oC <TA<+125oC or -40oC to +85oC; Vcc = 5V+10%) DESCRIPTION SYMBOL 1 MIN MAX MIN MAX MIN MAX UNIT READ CYCLE Read Cycle Time tRC 15 20 25 ns Address Access Time tAA 15 20 25 ns Chip Enable Access Time tACE 15 20 25 ns Output Hold from Address Change tOH 333n s Chip Enable to Output in Low-Z tLZCE 333n s Chip Disable to Output in High-Z tHZCE 78 1 0 n s Output Enable Access Time tAOE 77 1 0 n s Output Enable to Output in Low-Z tLZOE 000n s Output Disable to Output in High-Z tHZOE 78 1 0 n s WRITE CYCLE Write Cycle Time tWC 15 20 25 ns Chip Enable to End of Write tCW 12 15 20 ns Address Valid to End of Write tAW 12 15 20 ns Address Set-up Time tAS 000n s Address Hold from End of Write tAH 000n s Write Pulse Width (OE\\ > VIH)t WP 12 15 20 ns Data Set-up Time tDS 81 0 1 5n s Data Hold Time tDH 000n s Write Disable to Output in Low-Z tLZWE 555n s Write Enable to Output in High-Z tHZWE 79 1 0 n s -15 -20 -25 NOTE: 1. tLZCE , tLZWE , tHZCE , tLZOE , and tHZOE are simulated values.

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AC TEST CONDITIONS Fig. 1 OUTPUT LOAD EQUIVALENT +5V Q 255Ω 30 pF 480Ω +5V Q 255Ω 5 pF 480Ω for tLZCE , tHZCE , tLZWE , tHZWE , tLZOE , and tHZOE CAPACITANCE (TA = +25oC, f = 1.0 MHz) PARAMETER CONDITION SYMBOL MAX UNIT Input Capacitance VIN = 0V C IN 6p F Output Capacitance VOUT = 0V C OUT 8p F

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. READ CYCLE TIMING 1 (1) NOTE: 1. CE\\ is HIGH for READ cycle. READ CYCLE TIMING 2 (1) tRC tAAtOH ADDR D OUT DATA V ALIDPREVIOUS DA TA V ALID NOTES: 1. CE\\ is HIGH for READ cycle. 2. At any given temperature and voltage condition, tHZCE is less than tLZCE . DATA V ALID tRC tACE tAOE tLZCE tLZOE High-Z tHZCE tHZCE (2) CE\\1 CE 2 OE\\ D OUT WRITE CYCLE TIMING (WE\\ CONTROLLED, OE\\ = LOW) 12345678 12345678 12345678 12345678 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 123456789 123456789 123456789 123456789 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 12345678 12345678 12345678 12345678 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 123456789 123456789 123456789 123456789 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 12345 12345 12345 12345 DATA V ALID High-Z tWC tAW tCW tAH tAS tWP2 tDS tDH tLZWE tHZWE 1234 1 23 4 1 23 4 1234 UNDEFINED DON’T CARE ADDR CE\\1 CE 2 WE\\ D IN D OUT

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. WRITE CYCLE TIMING (CE\\1 CONTROLLED, OE\\ = LOW) 1234 1 23 4 1 23 4 1234 UNDEFINED DON’T CARE DATA V ALID High-Z tAW tCW tAH tDH ADDR CE\\1 CE 2 WE\\ D IN D OUT WRITE CYCLE TIMING (CE 2 CONTROLLED, OE\\ = LOW) 12345678 12345678 12345678 12345678 12345678 1234567890123456789 1 23456789012345678 9 1 23456789012345678 9 1 23456789012345678 9 1234567890123456789 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 12345678 12345678 12345678 12345678 12345678 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 12345678 12345678 12345678 12345678 1234567890123456789 1 23456789012345678 9 1 23456789012345678 9 1234567890123456789 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 12345678 12345678 12345678 12345678 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 123456 123456 123456 123456 DATA V ALID High-Z tWC tAW tCW tAH tAS tWP1 tDS tDH ADDR CE\\1 CE 2 WE\\ D IN D OUT tWC 12345678 12345678 12345678 12345678 12345678 123456789012345678901234567 1 2345678901234567890123456 7 1 2345678901234567890123456 7 1 2345678901234567890123456 7 123456789012345678901234567 1234567890123456789012345678 1 23456789012345678901234567 8 1 23456789012345678901234567 8 1 23456789012345678901234567 8 1234567890123456789012345678 12345678 12345678 12345678 12345678 12345678 12345678901234567890 1 234567890123456789 0 1 234567890123456789 0 1 234567890123456789 0 12345678901234567890 123456789012345678901 1 2345678901234567890 1 1 2345678901234567890 1 1 2345678901234567890 1 123456789012345678901 tAS tWP1 tDS

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI Case #905 (Package Designator DJ) MECHANICAL DEFINITION* * All measurements are in inches. D E A A1 A2 e1 e e2b C B MIN MAX A A1 0.105 0.115 Β 0.082 --- b C D 0.820 0.880 E 0.430 0.445 E1 0.395 0.405 E2 0.360 0.380 e 0.025 0.032 e2 --- 0.045

0.050 TYP

0.140 BSC

0.018 TYP

0.010 TYP

0.027 TYP

Austin Semiconductor, Inc. AS5C1008 Rev. 3.5 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

ORDERING INFORMATION

*AVAILABLE PROCESSES IT = Industrial Temperature Range -40 oC to +85oC XT = Extended Temperature Range -55 oC to +125oC Device Number Package Type Speed ns Process AS5C1008 DJ -15 /* AS5C1008 DJ -20 /* AS5C1008 DJ -25 /* EXAMPLE: AS5C1008DJ-25/XT