AS58C1001

AS58C1001 AUSTIN | Alldatasheet

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Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. For more products and information please visit our web site at www.austinsemiconductor.com 128K x 8 EEPROM EEPROM Memory AVAILABLE AS MILITARY SPECIFICATIONS l SMD 5962-38267 l MIL-STD-883

FEATURES

l High speed: 150, 200, and 250ns l Data Retention: 10 Years l Low power dissipation, active current (20mW/MHz (TYP)), standby current (100µW(MAX)) l Single +5V (+10%) power supply l Data Polling and Ready/Busy Signals l Erase/Write Endurance (10,000 cycles in a page mode) l Software Data protection Algorithm l Data Protection Circuitry during power on/off l Hardware Data Protection with RES pin l Automatic Programming: Automatic Page Write: 10ms (MAX)

128 Byte page size

Ceramic Flat Pack F No. 306 Radiation Shielded Ceramic FP* SF No. 305 Ceramic SOJ DCJ No. 508 l Operating Temperature Ranges -Military (-55oC to +125oC) XT -Industrial (-40oC to +85oC) IT *NOTE: Package lid is connected to ground (Vss). GENERAL DESCRIPTION The Austin Semiconductor, Inc. AS58C1001 is a 1 Megabit CMOS Electrically Erasable Programmable Read Only Memory (EEPROM) organized as 131, 072 x 8 bits. The AS58C1001 is capable or in system electrical Byte and Page reprogrammability. The AS58C1001 achieves high speed access, low power consump- tion, and a high level of reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology and CMOS process and circuitry technology. This device has a 128-Byte Page Programming function to make its erase and write operations faster. The AS58C1001 features Data Polling and a Ready/Busy signal to indicate completion of erase and programming operations. This EEPROM provides several levels of data protection. Hard- ware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit during power on and off. Software data protection is implemented using JEDEC Optional Stan- dard algorithm. The AS58C1001 is designed for high reliability in the most de- manding applications. Data retention is specified for 10 years and erase/write endurance is guaranteed to a minimum of 10,000 cycles in the Page Mode. PIN ASSIGNMENT (Top View) 32-Pin CFP (F & SF), 32-Pin CSOJ (DCJ) RDY/BUSY\\ A16 A14 A12 I/O 0 I/O 1 I/O 2 Vss Vcc A15 RES\\ WE\\ A13 A11 OE\\ A10 CE\\ I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 PIN NAME FUNCTION A0 to A16 Address input I/O0 to I/O7 Data input/output OE\\ Output enable CE\\ Chip enable WE\\ Write enable Vcc Power supply Vss Ground RDY/Busy\\ Ready busy RES\\ Reset

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. Vcc I/O0 I/O7 Ready/Busy Vss OE\\ CE\\ WE\\ RES\\ A16 High Voltage Generator Control Logic and Timing Address Buffer and Latch Y Decoder X Decoder I/O Buffer and Input Latch Y Gating Memory Array Data Latch FUNCTIONAL BLOCK DIAGRAM MODE SELECTION MODE CE\\ OE\\ WE\\ RES\\ RDY/BUSY\\ 1 I/O READ VIL VIL VIH VH High-Z D OUT STANDBY VIH X X X High-Z High-Z WRITE VIL VIH VIL VH High-Z to VOL D IN DESELECT VIL VIH VIH VH High-Z High-Z XX VIH X --- --- X VIL X X --- --- DATA POLLING VIL VIL VIH VH VOL Data Out (I/O7) PROGRAM XXX VIL High-Z High-Z WRITE INHIBIT Notes: 1. RDY/Busy\\ output has only active LOW VOL and HIGH impedance state. It can not go to HIGH (VOH ) state.

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. FUNCTIONAL DESCRIPTION AUTOMATIC PAGE WRITE The Page Write feature allows 1 to 128 Bytes of data to be written into the EEPROM in a single cycle and allows the undefined data within 128 Bytes to be written corresponding to the undefined address (A 0 to A6). Loading the first Byte of data, the data load window of 30µs opens for the second. In the same manner each additional Byte of data can be loaded within 30µs. In case CE\\ and WE\\ are kept high for 100µs after data input, the EEPROM enters erase and write automatically and only the input data can be written into the EEPROM. In Page mode the data can be written and accessed 4 times per page, and in Byte mode 103 times per Byte. DATA\\ POLLING Data\\ Polling allows the status of the EEPROM to be determined. If the EEPROM is set to Read mode during a Write cycle, and inversion of the last Byte of data to be loaded outputs from I/O, to indicate that the EEPROM is performing a Write operation. WRITE PROTECTION (1) Noise protection: Noise on a write cycle will not act as a trigger with a WE\\ pulse of less than 20ns. (2) Write inhibit: Holding OE\\ low, WE\\ high or CE\\ high, inhibits a write cycle during power on/off. WE\\ AND CE\\ PIN OPERATION During a write cycle, addresses are latched by the falling edge of WE\\ or CE\\, and data is latched by the rising edge of WE\\ or CE\\. WRITE/ERASE ENDURANCE AND DATA RETENTION The endurance with page programming is 104 cycles (1% cumulative failure rate) and the data retention time is more than 10 years when a device is programmed less than 104 cycles. RDY/Busy\\ SIGNAL RDY/Busy\\ signal also allows status of the EEPROM to be determined. The RDY/Busy\\ signal has high impedance except in write cycle and is lowered to VOL after the first write signal. At the end of the write cycle, the RDY/Busy\\ signal changes state to high impedance. This allows many 58C1001 devices RDY/Busy\\ signal lines to be wired-OR together. PROGRAMMING/ERASE The 58C1001 does NOT employ a BULK-erase function. The memory cells can be programmed ‘0’ or ‘1’. A write cycle performs the function of erase & write on every cycle with the erase being transparent to the user. The internal erase data state is considered to be ‘1’. To program the memory array with background of ALL 0’s or All 1’s, the user would program this data using the page mode write operation to program all 1024 128-byte pages. DATA PROTECTION To protect the data during operation and power on/off, the AS58C1001 has: 1. Data protection against Noise on Control Pins (CE\\, OE\\, WE\\) during Operation. During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenom- enon, the AS58C1001 has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. (EXAMPLE) Vcc RES\\ *unprogrammable*unprogrammable FUNCTIONAL DESCRIPTION (continued) DATA PROTECTION (continued) 2. Data protection at Vcc on/off. When RES\\ is low, the EEPROM cannot be erased and programmed. Therefore, data can be protected by keeping RES\\ low when Vcc is switched. RES\\ should be high during programming because it does not provide a latch function. When Vcc is turned on or off, noise on the control pins generated by external circuits (CPU, etc.) may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable, standby or readout state by using a CPU reset signal to RES\\ pin. In addition, when RES\\ is kept high at Vcc on/off timing, the input level of control pins (CE\\, OE\\, WE\\) must be held as CE\\=Vcc or OE\\=LOW or WE\\=Vcc level. 3. Software Data Protection To protect against unintentional programming caused by noise generated by external circuits, AS58C1001 has a Software data protection function. To initate Software data protection mode, 3 bytes of data must be input, followed by a dummy write cycle of any address and any data byte. This exact sequence switches the device into protection mode. This 4th cycle during write is required to initiate the SDP and physically writes the address and data. While in SDP the entire array is protected in which writes can only occur if the exact SDP sequence is re-executed or the unprotect sequence is executed. The Software data protection mode can be cancelled by inputting the following 6 Bytes. This changes the AS58C1001 to the Non-Protection mode, for normal operation. Address Data 5555 AA 2AAA 55 5555 80 5555 AA 2AAA 55 5555 20 Write Data Write Address (Normal Data Input) 5555 AA 2AAA 55 5555 A0

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ABSOLUTE MAXIMUM RATINGS* *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55 oC < TA < 125oC; Vcc = 5V +10%) PARAMETER CONDITION SYMBOL MIN MAX UNITS NOTES Input High (Logic 1) Voltage VIH 2.2 VCC + 0.3V V9 Input Low (Logic 0) Voltage3 VIL -0.3 0.8 V 2 Input Voltage (RES\\ Pin) VH Vcc-0.5 VCC +1.0 V Input Leakage Current4 OV < VIN < Vcc I LI -2 2 µΑ 4 Output Leakage Current Output(s) disabled, OV < VOUT < Vcc ILO -2 2 µΑ Output High Voltage IOH = -400 µA VOH 2.4 V Output Low Voltage IOL = 2.1 mA VOL 0.4 V CONDITIONS SYM -15 -20 -25 UNITS NOTES IOUT=OmA, Vcc = 5.5V Cycle=1µS, Duty=100% 20 20 20 IOUT=OmA, Vcc = 5.5V Cycle=MIN, Duty=100% 65 55 50 CE\\=Vcc, Vcc = 5.5V I CC1 350 350 350 µA CE\\=VIH, Vcc = 5.5V I CC2 333 m A PARAMETER MAX Power Supply Current: Operating Power Supply Current: Standby ICC3 mA CAPACITANCE PARAMETER CONDITIONS SYMBOL MAX UNITS NOTES Input Capacitance C IN 6p F Output Capactiance Co 12 pF TA = 25oC, f = 1MHz VIN = 0

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION (-55 oC < TC < 125oC; Vcc = 5V +10%) Test Conditions l Input Pulse Levels: 0.0V to 3.0V l Input rise and fall times: < 20ns l Output Load: 1 TTL Gate +100pF (including scope and jig) l Reference levels for measuring timing:1.5V , 1.5V /G01/G02/G03 /G01/G04/G05 /G01/G02/G03 /G01/G04/G05 /G01/G02/G03 /G01/G04/G05 /G01/G02/G02/G03/G04/G05/G05 /G01/G07/G07/G04/G05/G05 /G08/G09/G0A/G04 /G0B/G0C/G0D/G0E/G0F/G0C/G0D/G0E/G10 /G01/G02 /G11/G0C/G0D/G0E/G10 /G01/G03 /G12 /G01/G02/G02 /G13/G13/G13 /G14/G15/G16 /G13/G13/G13 /G17/G16/G16 /G13/G13/G13 /G17/G15/G16 /G18/G05 /G0B/G19/G09/G1A /G0C/G18/G1B/G1C/G1D/G04 /G01/G07/G07/G04/G05/G05 /G08/G09/G0A/G04 /G0F/G0C/G0D/G0E/G10 /G03/G04 /G11/G0C/G0D/G0E/G10 /G03/G05 /G12 /G02/G06 /G06/G06/G06 /G14/G15/G16 /G06/G06/G06 /G17/G16/G16 /G06/G06/G06 /G17/G15/G16 /G18/G05 /G0F/G1E/G12/G1A/G1E/G12 /G0C/G18/G1B/G1C/G1D/G04 /G01/G07/G04/G05/G05 /G08/G09/G0A/G04 /G0B/G0C/G0D/G0E/G10 /G03/G04 /G11/G0C/G0D/G0E/G10 /G03/G05 /G12 /G07/G06 /G14/G16 /G1F/G15 /G14/G16 /G1F/G15 /G14/G16 /G1F/G15 /G18/G05 /G0F/G1E/G12/G1A/G1E/G12 /G20/G21/G1D/G02 /G12/G21 /G01/G02/G02/G03/G04/G05/G05 /G0B/G19/G1B/G18/G22/G04 /G0B/G0C/G0D/G0E/G0F/G0C/G0D/G0E/G10 /G01/G02 /G11/G0C/G0D/G0E/G10 /G01/G03 /G12 /G07/G05 /G16 /G06/G06/G06 /G16 /G13/G13/G13 /G16 /G13/G13/G13 /G18/G05 /G0B/G0C/G0D/G0E/G10 /G03/G04 /G11/G0C/G0D/G0E/G10 /G03/G05 /G12 /G08/G09 /G16 /G15/G16 /G16 /G15/G16 /G16 /G15/G16 /G18/G05 /G0B/G0C/G0D/G0E/G0F/G0C/G0D/G0E/G10 /G01/G02 /G11/G0C/G0D/G0E/G10 /G01/G03 /G12 /G08/G09/G0A /G16 /G23/G15/G16 /G16 /G23/G15/G16 /G16 /G23/G15/G16 /G18/G05 /G24/G0C/G25/G0D /G12/G21 /G0F/G1E/G12/G1A/G1E/G12 /G26/G04/G1D/G1B/G27 /G0B/G0C/G0D/G0E/G0F/G0C/G0D/G0E/G10 /G01/G02 /G11/G0C/G0D/G0E/G10 /G01/G03 /G12 /G0A/G0A /G16 /G28/G15/G16 /G16 /G28/G15/G16 /G16 /G28/G15/G16 /G18/G05 /G02/G07/G08/G01 /G0A/G08/G0B/G0C/G0D/G02/G0E/G07/G02/G0F/G03 /G0F/G1E/G12/G1A/G1E/G12 /G26/G09/G05/G1B/G1C/G1D/G04 /G12/G21 /G20/G09/G22/G19/G13/G29 /G10/G03/G02/G07/G0B/G0B/G11/G01/G12/G0F/G13/G07/G08/G0B/G07 /G0C/G0F/G03/G0A/G02/G07/G02/G0F/G03 /G06/G14/G15/G06/G16/G17 /G06/G14/G17 AC ELECTRICAL CHARACTERISTICS FOR SOFTWARE DATA PROTECTION CYCLE OPERATION AC ELECTRICAL CHARACTERISTICS FOR DATA\\ POLLING OPERATION SYMBOL MIN MAX UNITS tBLC 0.55 30 µS tWC 10 --- mS Byte Load Cycle Time Write Cycle Time PARAMETER SYMBOL MIN MAX UNITS tOEH 0 --- ns tOES 0 --- ns tDW 150 --- ns tWC --- 10 ms Output Enable Hold Time Output Enable to Write Setup Time Write Start Time Write Cycle Time PARAMETER

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AC ELECTRICAL CHARACTERISTICS FOR PAGE ERASE AND PAGE WRITE OPERATIONS /G01/G02/G03/G04/G05/G06 /G03/G07/G08 /G03/G09/G0A /G0B/G08/G07/G0C/G01 /G01 /G01/G02 /G02 /G03/G03/G03 /G04/G05 /G01 /G03/G02 /G04 /G02 /G03/G03/G03 /G04/G05 /G01 /G05/G02 /G06 /G02 /G03/G03/G03 /G04/G05 /G01 /G03/G07 /G06 /G06/G07/G02 /G03/G03/G03 /G04/G05 /G01 /G05/G03 /G08 /G06/G07/G02 /G03/G03/G03 /G04/G05 /G01 /G01/G09 /G08/G07/G02 /G03/G03/G03 /G04/G05 /G01 /G0A/G02 /G08/G02/G02 /G03/G03/G03 /G04/G05 /G01 /G0A/G09 /G08/G02 /G03/G03/G03 /G04/G05 /G01 /G03/G09 /G04 /G02 /G03/G03/G03 /G04/G05 /G01 /G05/G09 /G06 /G02 /G03/G03/G03 /G04/G05 /G01 /G0B/G0C/G02 /G02 /G03/G03/G03 /G04/G05 /G01 /G0B/G0C/G09 /G02 /G03/G03/G03 /G04/G05 /G01 /G0A/G0D /G06/G02/G02 /G03/G03/G03 /G04/G05 /G01 /G03/G05 /G08/G02 /G03/G03/G03 /G09/G05 /G01 /G0E/G0D /G08/G02/G02 /G03/G03/G03 µ/G05 /G01 /G0E/G0D/G05 /G02/G0A/G07/G07 /G0B/G02 µ/G05 /G01 /G0A/G0E /G08/G06/G02 /G03/G03/G03 /G04/G05 /G01 /G0F/G07 /G08/G02/G02 /G03/G03/G03 µ/G05 /G01 /G0F/G0C/G02 /G10/G10 /G08 /G03/G03/G03 µ/G05/G0C/G0D/G0D /G01/G0F /G10/G11/G12/G13 /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G19/G1A/G01/G14 /G1B/G0F/G1C/G1D /G1E/G1A/G0D/G1F/G14 /G17/G18/G09/G14 /G01/G0F /G20/G14/G21/G18/G0D/G14 /G19/G15/G05/G1A /G10/G11/G12/G13 /G01/G0F /G22/G23/G18/G01/G14 /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G22/G23/G18/G01/G14 /G24/G15/G1F/G05/G14 /G22/G18/G1D/G01/G25 /G26/G15/G01/G16/G15/G01 /G11/G04/G1C/G27/G1F/G14 /G28/G0F/G1F/G1D /G17/G18/G09/G14 /G20/G1C/G01/G1C /G1B/G1C/G01/G0D/G25 /G17/G18/G09/G14 /G22/G23/G18/G01/G14 /G1E/G1A/G0D/G1F/G14 /G17/G18/G09/G14 /G19/G1A/G01/G14 /G1B/G0F/G1C/G1D /G22/G18/G04/G1D/G0F/G29 /G20/G1C/G01/G1C /G28/G0F/G1F/G1D /G17/G18/G09/G14 /G22/G23/G18/G01/G14 /G11/G04/G1C/G27/G1F/G14 /G28/G0F/G1F/G1D /G17/G18/G09/G14 /G1E/G25/G18/G16 /G11/G04/G1C/G27/G1F/G14 /G28/G0F/G1F/G1D /G17/G18/G09/G14 /G26/G15/G01 /G11/G04/G1C/G27/G1F/G14 /G01/G0F /G22/G23/G18/G01/G14 /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G2A/G1D/G1D/G23/G14/G05/G05 /G28/G0F/G1F/G1D /G17/G18/G09/G14 /G20/G1C/G01/G1C /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G0D/G09/G0E/G09/G03/G0F/G0C/G0F/G0E /G2A/G1D/G1D/G23/G14/G05/G05 /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G22/G23/G18/G01/G14 /G11/G04/G1C/G27/G1F/G14 /G01/G0F /G22/G23/G18/G01/G14 /G12/G14/G01/G15/G16 /G17/G18/G09/G14 /G1E/G25/G18/G16 /G11/G04/G1C/G27/G1F/G14 /G01/G0F /G22/G23/G18/G01/G14 /G12/G14/G01/G15/G16 /G17/G18/G09/G14

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE WRITE OPERATIONS SYMBOL MIN MAX UNITS tAS 0 --- ns tCS 7 0 --- ns tCW 8 250 --- ns tWP 7 250 --- ns tAH 150 --- ns tDS 100 --- ns tDH 10 --- ns tCH 7 0 --- ns tOES 0 --- ns tOEH 0 --- ns tWC 10 --- ms tBL 100 --- µs tDB 120 --- ns tRP 100 --- µs tRES 10 1 --- µs Address Hold Time Data Setup Time Vcc to RES\\ Setup Time Time to Device Busy RES\\ to Write Setup Time PARAMETER Address Setup Time Chip Enable to Write Setup Time Byte Load Window Data Hold Time Chip Enable Hold Time Out Enable to Write Setup Time Write Pulse Width Output Enable Hold Time Write Cycle Time AC TEST CONDITIONS Q 100pF 1 TTL GATE EQ. Figure 1 OUTPUT LOAD EQUIVALENT NOTES: 1. Relative to Vss 2. VIN min = -3.0V for pulse widths <50ns 3. VIL min = -1.0V for pulse widths <50ns 4. IIL on RES\\ = 100ua MAX 5. tOF is defined as the time at which E the output becomes and open circuit and data is no longer driven. 6. Use this device in longer cycle than this value 7. WE\\ controlled operation 8. CE\\ controlled operation 9. RES\\ pin V IH is VH 10. Reference only, not tested

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. READ TIMING WAVEFORM SOFTWARE DATA PROTECTION TIMING WAVEFORM (protection mode) SOFTWARE DATA PROTECTION TIMING WAVEFORM (non-protection mode) tWC 5555 AAAA or 2AAA 5555 AA Address Data Vcc CE\\ WE\\ Normal active mode 5555 AA 5555 AAAA or 2AAA Address Data Out Valid V IH tACC tCE tOE tOH tDF tRR tDFR CE\\ OE\\ WE\\ Data Out RES\\ High-Z tWCtBLC {Write Address* Write Data5555 AAAA or 2AAA 5555 AA Address Data Vcc CE\\ WE\\ tBLC tBLC * During this write cycle, data is physically written to address provided.

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. DATA\\ POLLING TIMING WAVEFORM 1234 1 23 4 1234 AnAn D OUT XD OUT X\\D IN X tOEH tCE tOE tOES tDW tWC Address CE\\ WE\\ OE\\ I/O7 TOGGLE BIT WAVEFORM D IN tOEH tCE tOE tOES tDWtWC Address CE\\ WE\\ OE\\ I/O7 D OUT D OUT D OUT D OUT Next Mode In transition from HI to LOW or LOW to HI.

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. PAGE WRITE TIMING WAVEFORM (WE\\ CONTROLLED) In transition from HI to LOW or LOW to HI. 123 123 123 123 1234 1 23 4 1 23 4 1234 123 123 123 123 123 123 123 123 1234 1 23 4 1 23 4 1234 123 123 123 123 123 123 123 123 1234 1 23 4 1 23 4 1234 123 123 123 123 tAS tAH tWP tDL tCS tCH tOES tBLC tBL tWC tOEH tDW High-ZHigh-Z tDS tDH tDB tRP tRES WE\\ CE\\ OE\\ D IN RDY/Busy\\ A7 - A16 A0 - A6 RES\\ V CC V OL

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. PAGE WRITE TIMING WAVEFORM (CE\\ CONTROLLED) In transition from HI to LOW or LOW to HI. tAS tAH tCW tDL tWS tWH tOES tBLC tBL tWC tOEH tDW High-ZHigh-Z tDS tDH tDB tRP tRES WE\\ CE\\ OE\\ D IN RDY/Busy\\ Address A0 to A16 RES\\ V CC V OL

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. BYTE WRITE TIMING WAVEFORM (WE\\ CONTROLLED) In transition from HI to LOW or LOW to HI. tWC tCH tCS tAH tOES tAS tWP tBL tOEH tDS tDH tDB tDW High-ZHigh-Z tRP tRES Address CE\\ WE\\ OE\\ D IN RDY/Busy\\ RES\\ V CC V OL

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. BYTE WRITE TIMING WAVEFORM (CE\\ CONTROLLED) In transition from HI to LOW or LOW to HI. tWH tWS tAH tOES tAS tCW tBL tOEH tDS tDH tDB tDW High-ZHigh-Z tRP tRES Address CE\\ WE\\ OE\\ D IN RDY/Busy\\ RES\\ V CC tWC V OL

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI Case #305 (Package Designator SF) SMD 5962-38267, Case Outline N MIN MAX A 0.125 0.150 A1 0.090 0.110 b 0.015 0.019 c 0.003 0.007 D 0.810 0.830 D1 0.775 0.785 D2 0.745 0.755 E 0.425 0.445 E1 0.290 0.310 e 0.045 0.055 H 1.000 1.100 L 0.290 0.310 Q 0.026 0.037 SYMBOL SMD SPECIFICATIONS MECHANICAL DEFINITIONS* *All measurements are in inches. D EL e b Top View H c A Q

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. *All measurements are in inches. ASI Case #306 (Package Designator F) SMD 5962-38267, Case Outline M MECHANICAL DEFINITIONS* MIN MAX A 0.097 0.123 A1 0.090 0.110 b 0.015 0.019 c 0.003 0.007 D 0.810 0.830 D2 0.745 0.755 E 0.425 0.445 E1 0.330 0.356 e 0.045 0.055 H 1.000 1.100 L 0.290 0.310 Q 0.026 0.037 SYMBOL SMD SPECIFICATIONS NOTE: All drawings are per the SMD. ASI's package dimensional limits may differ , but they will be within the SMD limits. D EL e b Top View H c A QD2

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI Case #508 (Package Designator DCJ) MECHANICAL DEFINITIONS* *All measurements are in inches. D E A e b E2B MIN MAX A 0.132 0.142 A1 0.076 0.086 A2 0.018 0.028 B 0.018 0.032 b 0.015 0.019 D 0.816 0.834 D1 0.745 0.755 E 0.430 0.440 E1 0.465 0.485 E2 0.415 0.425 e 0.045 0.055 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

ORDERING INFORMATION

ns Process Device Number Package Type Speed ns Process AS58C1001 F -15 /* AS58C1001 SF -15 /* AS58C1001 F -20 /* AS58C1001 SF -20 /* AS58C1001 F -25 /* AS58C1001 SF -25 /* EXAMPLE: AS58C1001DCJ-20/IT Device Number Package Type Speed ns Process AS58C1001 DCJ -15 /* AS58C1001 DCJ -20 /* AS58C1001 DCJ -25 /* EXAMPLE: AS58C1001F-25/XT EXAMPLE: AS58C1001SF-15/IT *AVAILABLE PROCESSES IT = Industrial Temperature Range -40oC to +85oC XT = Extended Temperature Range -55oC to +125oC 883C = Full Military Processing -55oC to +125oC

Austin Semiconductor, Inc. AS58C1001 Rev. 4.0 3/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI TO DSCC PART NUMBER CROSS REFERENCE* Package Designator F ASI Part # SMD Part# AS58C1001F-25/883C 5962-3826716QMA AS58C1001F-20/883C 5962-3826717QMA AS58C1001F-15/883C 5962-3826718QMA Package Designator SF ASI Part # SMD Part# AS58C1001SF-25/883C 5962-3826716QNA AS58C1001SF-20/883C 5962-3826717QNA AS58C1001SF-15/883C 5962-3826718QNA Package Designator DCJ not currenly available on the SMD. * ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.