AS5600L AMSCO | Alldatasheet
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[v1-12] 2020-May-14 Document Feedback AS5600L 12-Bit Programmable On-Axis Magnetic Rotary Position Sensor The AS5600L is an easy to program magnetic rotary position sensor with a high-resolution 12-bit I²C or PWM output. This contactless system measures the absolute angle of a diametric magnetized on-axis magnet. This AS5600L is designed for contactless potentiometer applic ations and its robust design eliminates the influence of any homogenous external stray magnetic fields. The industry-standard I²C interface supports simple user programming of non-volatile parameters without requiring a dedicated programmer. By default the output represents a range from 0 to 360 degrees. It is also possible to define a smaller range to the output by programming a zero angle (start position) and a maximum angle (stop position). The AS5600L is also equipped with a smart low power mode feature to automatically reduce the power consumption. An input pin (DIR) selects the pola rity of the output with regard to rotation direction. If DIR is connected to ground, the output value increases with clockwise rotation. If DIR is connected to VDD, the output value increases with counterclockwise rotation. The AS5600L is available in a st andard SOIC-8 package and in a WL-CSP for applications requirin g small-sized sensing solutions with a size of 2.07mm x 2.63mm x 0.6mm. Both variants are qualified for a temperature range from -40°C to 125°C. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS5600L, 12-bit Programmable Contactless Potentiometer are listed below: Figure 1: Added Value of Using AS5600L Benefits Features
- Highest reliability and durability • Contactless magnetic angle measurement
- Simple programming • Easy programming of start and stop positions in 3-wire mode (no programmer needed) or over the I²C interface
- Multiple sensors on one I²C bus • User programmable I²C address General Description
Document Feedback [v1-12] 2020-May-14 AS5600L − General Description
Applications
The AS5600L is ideally suited for contactless potentiometers, contactless knobs, pedals, RC servos and other angular position measurement solutions. Block Diagram The functional blocks of this device are shown below: Figure 2: Functional Blocks of AS5600L
- Great flexibility on angular excursion • Maximum angle programmable from 18° up to 360°
- High-resolution output signal • 12-bit output resolution available on I²C and PWM output
- Low-power consumption • Automatic entry into low-power mode
- Easy setup • Automatic magnet detection
- Very small form factor • WL-CSP (2.07mm x 2.63mm) or SOIC-8 package
- Robust environmental tolerance • Wide temperature range: -40°C to 125°C Benefits Features AFE Automatic Gain Control (AGC) 12-bit A/D Driver Register Setting One-Time Programmable (OTP) Memory I²C AS5600L PWM VDD3V3 VDD5V GND SCLSDA PWM DIR Analog Front-EndHall Sensors ATAN (CORDIC) Automatic Digital Processing and Filtering Low-Dropout (LDO) Regulator (internal load only) Magnetic Core I2C Address Automatic low power mode OUT
[v1-12] 2020-May-14 Document Feedback AS5600L − Pin Assignments Figure 3: SOIC-8 Pin Diagram Figure 4: SOIC-8 Pin Description Note(s): 1. In case of 5V operation the VDD3V3 output is intended for in ternal use only. It must not be loaded with an external load. Pin Number Name Type Description
1 VDD5V Supply Positive voltage supply in 5V mode (requires 100 nF
decoupling capacitor) 2 VDD3V3 Supply Positive voltage supply in 3.3V mode (requires an external 1-μF decoupling capacitor in 5V mode) 3 OUT Digital output PWM output. Fixed to VDD default. Enable in CONF register. 4G N D S u p p l y G r o u n d 5P G O D i g i t a l i n p u t Program option (internal pull-up, connected to GND = Programming Option B)
6 SDA Digital input/output I²C Data (consider external pull-up)
7 SCL Digital input I²C Clock (consider external pull-up)
8D I R D i g i t a l i n p u t Direction polarity (GND = values increase clockwise, VDD = values increase counterclockwise) Pin Assignments 4 5 VDD3V3 OUT GND VDD5V PGO SDA SCL DIR AS5600/
[v1-12] 2020-May-14 Document Feedback AS5600L − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Operating Conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 7: Absolute Maximum Ratings Symbol Parameter Min Max Units Comments Electrical Parameters VDD5V DC supply voltage at VDD5V pin -0.3 6.1 V VDD3V3 DC supply voltage at VDD3V3 pin -0.3 4.0 V VIO DC supply voltage at all digital or analog pins -0.3 VDD+0.3 V ISCR Input current (latch-up immunity) -100 100 mA JESD78 Continuous Power Dissipation (TA = 70°C) PT Continuous power dissipation 50 mW Electrostatic Discharge ESDHBM Electrostatic discharge HBM ±1 kV AEC-Q100-002E Absolute Maximum Ratings
Document Feedback [v1-12] 2020-May-14 AS5600L − Absolute Maximum Ratings Temperature Ranges and Storage Conditions TSTRG Storage temperature range -55 125 °C SOIC-8: ICP/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices.” The lead finish for Pb-free leaded packages is “Matte Tin” (100% Sn) WL-CSP: ICP/JEDEC J-STD-020 The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices.” RH NC Relative humidity (non-condensing) 58 5 % MSL Moisture sensitivity level
3 SOIC-8: ICP/JEDEC J-STD-033
1 WL-CSP: ICP/JEDEC J-STD-033
Symbol Parameter Min Max Units Comments
[v1-12] 2020-May-14 Document Feedback AS5600L − Electrical Characteristics All limits are guaranteed. The parameters with minimum and maximum values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Operating Conditions Figure 8: System Electrical Characteristics and Temperature Range Note(s): 1. For typical magnetic field (60mT) excluding current delivered to the external load and tolerance on polling times. 2. For OTP burn procedure the supply line source resistance should not exceed 1Ohm. Symbol Parameter Conditions Min Typ Max Units VDD5V Positive supply voltage in 5.0V mode 5.0V operation mode 4.5 5.0 5.5 V During OTP burn procedure (2) VDD3V3 Positive supply voltage in 3.3V mode 3.3V operation mode 3.0 3.3 3.6 V During OTP burn procedure (2) 3.3 3.4 3.5 V IDD Supply current in NOM (1) PM = 00 Always on 6.4 mA lDD_LPM1 Supply current in LPM1 (1) PM = 01 Polling time = 5ms 3.3 mA lDD_ LPM2 Supply current in LPM2 (1) PM = 10 Polling time = 20ms 1.8 mA lDD_ LPM3 Supply current in LPM3 (1) PM = 11 Polling time = 100ms 1.5 mA IDD_BURN Supply current per bit for burn procedure Initial peak, 1 μs 100 mA Steady burning,<30 μs 40 mA TA Operating temperature -40 125 °C TP Programming temperature 20 30 °C
Electrical Characteristics
Document Feedback [v1-12] 2020-May-14 AS5600L − System Characteristics Figure 13: System Specifications Symbol Parameter Conditions Min Typ Max Units RES Resolution 12 bit INL_BL System INL Deviation from best line fit; 360° maximum angle, no magnet displacement, no zero-programming performed (PWM, I²C) ±1 degree ON_SLOW RMS output noise (1 sigma) Orthogonal component for the magnetic field within the specified range (Bz), after 2.2 ms; SF = 00 0.015 degree ON_FAST RMS output noise (1 sigma) Orthogonal component for the magnetic field within the specified range (Bz), after 286 μs, SF=11 0.043 degree System Characteristics
[v1-12] 2020-May-14 Document Feedback AS5600L − Detailed Description The AS5600L is a Hall-based rotary magnetic position sensor using planar sensors that convert the magnetic field component perpendicular to the surface of the chip into a voltage. The signals coming from the Hall sensors are first amplified and filtered before being converted by the analog-to-digital converter (ADC). The output of the ADC is processed by the hardwired CORDIC block (Coordinate Rotation Digital Computer) to compute the angle and magnitude of the magnetic field vector. The intensity of the magnetic field is used by the automatic gain control (A GC) to adjust the amplification level to compensate for temperature and magnetic field variations. The angle value provided by the CORDIC algorithm is used by the output stage. The PWM output provides a digital output which represents the angle as the pulse width. The AS5600L is programmed through an industry-standard I²C interface to write an on-chip non-volatile memory. This interface can be used to program a zero angle (start position) and a maximum angle (stop position) which maps the full resolution of the output to a subs et of the entire 0 to 360 degree range. IC Power Management The AS5600L be powered from a 5.0V supply using the on-chip LDO regulator, or it can be powered directly from a 3.3V supply. The internal LDO is not intended to power other external ICs and needs a 1 μF capacitor to ground, as shown in Figure 14 . In 3.3V operation, the VDD5V an d VDD3V3 pins must be tied together. VDD is the voltage level present at the VDD5V pin. Figure 14: 5.0V and 3.3V Power Supply Options Detailed Description 1µF100nF 4.5 - 5.5V VDD3V3 GND VDD5V 5.0V Operation LDO AS56 00 100nF 3.0 – 3.6V* VDD3V3 GND VDD5V 3.3V Operation LDO AS56 00 10µF Required for OTP programming only * 3.3-3.5V for OTP programming L L
Document Feedback [v1-12] 2020-May-14 AS5600L − Detailed Description I²C Interface The AS5600L supports the 2-wire Fast-mode Plus I²C-slave protocol in device mode, in compliance with the NXP Semiconductors (formerly Philips Semiconductors) specification UM10204. A device that sends data onto the bus is a transmitter and a device receiving data is a receiver. The device that controls the message is called a master. The devices that are controlled by the master are called slaves. A master device generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions that control the bus. The AS5600L always operates as a slave on the I²C bus. Connections to the bus are made through the open-drain I/O lines SDA and the input SCL. Cloc k stretching is not included. The host MCU (master) initiates data transfers. The 7-bit slave address of the AS5600L is 0x40 (1000000 in binary). Supported Modes
- Random/Sequential read
- Byte/Page write
- Automatic increment (ANGLE register)
- Standard-mode
- Fast-mode
- Fast–mode Plus The SDA signal is the bidirectional data line. The SCL signal is the clock generated by the I²C bus master to synchronize sampling data from SDA. The maximum SCL frequency is 1 MHz. Data is sampled on the rising edge of SCL. I²C Interface Operation Figure 15: I²C Timing Diagram SDA SCL StartStop tbuf tLOW tR tHD.STA tHIGH tF tSU.DAT tSU.STA tHD.STA tSU.STORepeated Start tHD.DAT
[v1-12] 2020-May-14 Document Feedback AS5600L − Detailed Description I²C Electrical Specification Figure 16: I²C Electrical Specifications Note(s): 1. In Fast-mode Plus, fall time is specifie d the same for both output stage and bus ti ming. If series resistors are used this h as to be considered for bus timing. 2. Input filters on the SDA and SCL inputs suppress noise spikes of less than 50 ns. 3. I/O pins of Fast-mode and Fast-mode Pl us devices must not load or drive the SDA and SCL lines if VDD is switched OFF. 4. Special-purpose devices such as multiplexers and switches may exceed this capacitance because they connect multiple paths together. Symbol Parameter Conditions Min Typ Max Unit VIL Logic low input voltage -0.3 0.3 x VDD V VIH Logic high input voltage 0.7 x VDD VDD + 0.3 V VHYS Hysteresis of Schmitt trigger inputs VDD > 2.5V 0.05 x VDD V VOL Logic low output voltage (open-drain or open-collector) at 3 mA sink current VDD > 2.5V 0.4 V IOL Logic low output current VOL = 0.4V 20 mA t OF Output fall time from VIHmax to VILmax 10 120 (1) ns tSP Pulse width of spikes that must be suppressed by the input filter 50 (2) ns II Input current at each I/O Pin Input Voltage between 0.1 x VDD and 0.9 x VDD -10 +10 (3) μA CB Total capacitive load for each bus line 550 pF CI/O I/O capacitance (SDA, SCL) (4) 10 pF
Document Feedback [v1-12] 2020-May-14 AS5600L − Detailed Description I²C Timing Figure 17: I²C Timing Note(s): 1. After this time, the first clock is generated. 2. A device must internally provide a minimum hold time of 120 ns (Fast-mode Plus) for the SDA signal (referred to the V IHmin of SCL) to bridge the undefined region of the falling edge of SCL. 3. A Fast-mode device can be used in a standard-mode system, but the requirement t SU;DAT = 250 ns must be met. This is automatically if the device does not stretch the low phase of SCL. If such a device does stretch the low phase of SCL, it must drive the next data bit on SDA (t Rmax + t SU;DAT = 1000 + 250 = 1250 ns) before SCL is released. 4. In Fast-mode Plus, fall time is specifie d the same for both output stage and bus ti ming. If series resistors are used, this has to be considered for bus timing. Symbol Parameter Min Max Unit fSCLK SCL clock frequency 1.0 MHz tBUF Bus free time (time between the STOP and START conditions) 0.5 μs tHD;STA Hold time; (Repeated) START condition (1) 0.26 μs tLOW Low phase of SCL clock 0.5 μs tHIGH High phase of SCL clock 0.26 μs tSU;STA Setup time for a Repeated START condition 0.26 μs tHD;DAT Data hold time (2) 0.45 μs tSU;DAT Data setup time (3) 50 ns tR Rise time of SDA and SCL signals 120 ns tF Fall time of SDA and SCL signals 10 120 (4) ns tSU;STO Setup time for STOP condition 0.26 μs
[v1-12] 2020-May-14 Document Feedback AS5600L − Detailed Description I²C Modes Invalid Addresses There are two addresses used to access an AS5600L register. The first is the slave address used to select the AS5600L. All I²C bus transactions include a slave address. The slave address of the AS5600L is 0x40 (1000000 in binary) The second address is a word address sent in the first byte transferred in a write transaction. The word address sele cts a register on the AS5600L. The word address is loaded into the address pointer on the AS5600L. During subsequent read transactions and subsequent bytes in the write transaction, the address pointer provides the address of the selected register. The address pointer is incremented after each byte is transferred, except for certain read transactions to special registers. If the user sets the address pointer to an invalid word address, the address byte is not acknowledged (the A bit is high). Nevertheless, a read or write cycle is possible. The address pointer is increased after each byte. Reading When reading from an invalid address, the AS5600L returns all zeros in the data bytes. The addr ess pointer is incremented after each byte. Sequential reads over the whole address range are possible including address overflow. Automatic Increment of the Address Pointer for ANGLE, RAW ANGLE and MAGNITUDE Registers These are special registers which suppress the automatic increment of the address pointer on reads, so a re-read of these registers requires no I²C write command to reload the address pointer. This special treatment of the pointer is effective only if the address pointer is set to the high byte of the register. Writing A write to an invalid address is not acknowledged by the AS5600L, although the address pointer is incremented. When the address pointer points to a va lid address again, a successful write accessed is acknowledged. Page write over the whole address range is possible including address overflow. Supported Bus Protocol Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever SCL is high. Changes in the data line while SCL is high are interpreted as START or STOP conditions.
Document Feedback [v1-12] 2020-May-14 AS5600L − Detailed Description Accordingly, the following bus conditions have been defined: Bus Not Busy Both SDA and SCL remain high. Start Data Transfer A change in the state of SDA from high to low while SCL is high defines the START condition. Stop Data Transfer A change in the state of SDA from low to high while SCL is high defines the STOP condition. Data Valid The state of the data line represents valid data when, after a START condition, SDA is stable for the duration of the high phase of SCL. The data on SDA must be changed during the low phase of SCL. There is one clock period per bit of data. Each I²C bus transaction is init iated with a START condition and terminated with a STOP conditio n. The number of data bytes transferred between START and STOP conditions is not limited, and is determined by the I²C bus master. The information is transferred byte-wise and each receiver acknowledges with a ninth bit. Acknowledge Each I²C slave device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The I²C bus master device must generate an extra clock period for this acknowledge bit. A slave that acknowledges must pull down SDA during the acknowledge clock period in such a way that SDA is stable low during the high phase of the acknowledge clock period. Of course, setup and hold times mu st be taken into account. A master must signal an end of a read transaction by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave SDA high to enable the master to generate the STOP condition.
[v1-12] 2020-May-14 Document Feedback AS5600L − Detailed Description Figure 18: Data Read Depending on the state of the R/W bit, two types of data transfer are possible: Data Transfer from a Master Transmitter to a Slave Receiver The first byte transmitted by th e master is the slave address, followed by R/W = 0. Next follows a number of data bytes. The slave returns an acknowledge bit after each received byte. If the slave does not understand the co mmand or data it sends a not acknowledge (NACK). Data is transferred with the most significant bit (MSB) first. Data Transfer from a Slave Transmitter to a Master Receiver The master transmits the first byte (the slave address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a NACK is returned. The master generates all of the SCL clock periods and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START condition. Because a repeated START condition is also the beginning of the next serial transfer, the bus is not released. Data is tran sferred with the most significant bit (MSB) first. SDA SCL Start Condition Stop Condition or Repeated Start Condition MSB R/W ACK LSB ACK Slave Address Repeated if more Bytes are transferred
Document Feedback [v1-12] 2020-May-14 AS5600L − Detailed Description AS5600L Slave Modes Slave Receiver Mode (Write Mode) Serial data and clock are receiv ed through SDA and SCL. Each byte is followed by an acknowledge bit or by a not acknowledge depending on whether the address-pointer selects a valid address. START and STOP conditions are recognized as the beginning and end of a bus transa ction. The slave address byte is the first byte received afte r the START condition. The 7-bit AS5600L address is 0x40 (1000000 in binary). The 7-bit slave address is followed by the direction bit (R/W), which, for a write, is 0 (low). After receiving and decoding the slave address byte the slave device drives an acknowledge on SDA. After the AS5600L acknow ledges the slave address and write bit, the master transmits a register address (word address) to the AS5600L. This is loaded into the address pointer on the AS5600L. If the address is a vali d readable addres s, the AS5600L answers by sending an acknowledge (A bit low). If the address pointer selects an invalid address, a not acknowledge is sent (A bit high). The master may then transmit zero or more bytes of data. If the address pointer selects an invalid address, the received data are not stored. The address pointer will increment after each byte transferred whether or not the address is valid. If the address-pointer reaches a valid position again, the AS5600L answers with an acknowledge and stores the data. The master generates a STOP condition to terminate the write transaction. Figure 19: Data Write (Slave Receiver Mode) Slave Transmitter Mode (Read Mode) The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit indicates that the AS5600L will drive data on SDA. START and STOP conditions are recognized as the beginning and end of a bus transaction. The slave address byte is the first byte received after the master generates a START condition. The slave address byte contains the 7-bit AS5600L address. The 7-bit slave address is followed by the direction bit (R/W), wh ich, for a read, is 1 (high). S 0110110 0 A XXXXXXXX A XXXXXXXX A XXXXXXXX A S – Start A – Acknowledge (ACK) Data transferred: X+1 Bytes + Acknowledge P – Stop P <Slave address> <Word address (n)> <Data(n)> <Data(n+X)> <RW> XXXXXXXX A <Data(n+1)> 1000000
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description The following registers are accessible over the serial I²C interface. The 7-bit slave address of the slave is 0x40 (1000000 in binary). To permanently program a configuration, a non-volatile memory (OTP) is provided. Figure 22: Register Map Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Configuration Registers (1), (2) 0x00 ZMCO RZ M C O ( 1 : 0 ) 0x01 ZPOS R/W/P ZPOS(11:8) 0x02 ZPOS(7:0) 0x03 MPOS R/W/P MPOS(11:8) 0x04 MPOS(7:0) 0x05 MANG R/W/P MANG(11:8) 0x06 MANG(7:0) 0x07 CONF R/W/P WD FTH(2:0) SF(1:0) 0x08 PWMF(1:0) OUTS(1:0) HYST(1:0) PM(1:0) 0x20 I2CADDR R/W/P I2CADDR(6:0) (3) 0x21 I2CUPDT R/W I2CSTRB(6:0) Output Registers 0x0C RAW ANGLE RR A W A N G L E ( 1 1 : 8 ) 0x0D R RAW ANGLE(7:0) 0x0E ANGLE R ANGLE(11:8) 0x0F R ANGLE(7:0) Register Description
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description Note(s): 1. To change a configuration, read out th e register, modify only the desired bits an d write the new configuration. Blank fields may contain factory settings. 2. During power-up, configuration registers are reset to th e permanently programmed value. Not programmed bits are zero. 3. The default slave address is 0x40. ZPOS/MPOS/MANG Registers These registers are used to configure the start position (ZPOS) and a stop position (MPOS) or si ze of angular range (MANG) for a narrower angular range. The angular range must be greater than 18 degrees. In case of narrowed angular range, the resolution is not scaled to narrowed range (e.g. 0°-360°(full-turn) → 4096dec; 0°-180° → 2048dec). To configure the angular range, see Angle Programming . Status Registers 0x0B STATUS RM D M L M H 0x1A AGC RA G C ( 7 : 0 ) 0x1B MAGNITUDE R MAGNITUDE (11:8) 0x1C R MAGNITUDE(7:0) Burn Commands 0xFF BURN W Burn_Angle = 0x80; Burn_Setting = 0x40 Address Name R/W Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description STATUS Register The STATUS register provides bits that indicate the current state of the AS5600L. Figure 24: STATUS Register AGC Register The AS5600L uses Automatic Gain Control in a closed loop to compensate for variations of the magnetic field strength due to changes of temperature, airgap between IC and magnet, and magnet degradation. The AGC register indicates the gain. For the most robust performance, th e gain value should be in the center of its range. The airgap of the physical system can be adjusted to achieve this value. In 5V operation, the AGC range is 0-255 counts. The AGC range is reduced to 0-128 counts in 3.3V mode. MAGNITUDE Register The MAGNITUDE register indicates the magnitude value of the internal CORDIC. Name State When Bit Is High MH AGC minimum gain overflow, magnet too strong ML AGC maximum gain overflow, magnet too weak MD Magnet was detected
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description Non-Volatile Memory (OTP) The non-volatile memory is used to permanently program the configuration. To program the non-volatile memory, the I²C interface is used ( Option A , Option C ). Alternatively, start and stop positions can be programmed through the output pin (Option B ). The programming can be either performed in the 5V supply mode or in the 3.3V operation mode but using a minimum supply voltage of 3.3V and a 10 μF capacitor at the VDD3V3 pin to ground. This 10 μF capacitor is needed only during the programming of the device. Two different commands are used to permanently program the device: Burn_Angle Command (ZPOS, MPOS) The host microcontroller can perform a permanent programming of ZPOS and MPOS with a BURN_ANGLE command. To perform a BURN_ANGLE command, write the value 0x80 into register 0xFF. The BURN_ANGLE command can be executed up to 2 times. ZMCO shows how many times ZPOS and MPOS have been permanently written. This command will only be executed if the presence of the magnet is detected (MD = 1). Burn_Setting Command (MANG, CONFIG, I2CADDR) The host microcontroller can perform a permanent writing of MANG and CONFIG with a BURN_SE T TING command. Once a bit in those registers is permanent wr itten to 1, it stays on 1and cannot be changed to 0 anymore. A bit which is 0 can be programmed to 1. To perform a BURN_SETTING command, write the value 0x40 into register 0xFF. MANG can be written only if ZPOS and MPOS have never been permanently written (ZMCO = 00).
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description Angle Programming For applications which do not use the full 0 to 360 degree angular range. The angular range must be greater than 18 degrees. In case of narrowed angular range, the resolution is not scaled to narrowed range. (e.g. 0°-360°(full-turn) → 4096dec; 0°-180° → 2048dec). The range is specified by programming a start position (ZPOS) and either a stop position (MPOS) or the size of the angular range (MANG). The BURN_ANGLE command can be executed up to 2 times. There are three recommended methods for programming the angular range:
- Option A: Angle Programming Through the I²C Interface
- Option B: Angle Programming Through the OUT Pin
- O p t i o n C : Programming a Maximum Angular Range Through the I²C Interface Figure 25: Option A: Angle Programming Through the I²C Interface Note(s): 1. After each register command, the new setting is effective at the output at least 1 ms later. 2. It is highly recommended to perform a functional test after this procedure. Use the correct hardware configuration shown in Figure 36 and Figure 37 . Step 1 Power up the AS5600L. Step 2 Turn the magnet to the start position. Step 3 Read the RAW ANGLE register. Write the RAW ANGLE value into the ZPOS register. Wait at least 1 ms. Step 4 Rotate the magnet in the direction defined by the level on the DIR pin (GND for clockwise, VDD for counterclockwise) to the stop position. The amount of rotation must be greater than 18 degrees. Step 5 Read the RAW ANGLE register. Write the RAW ANGLE value into the MPOS register. Wait at least 1 ms. Proceed with Step 6 to permanently program the configuration. Step 6 Perform a BURN_ANGLE command to permanently program the device. Wait at least 1 ms. Step 7 Verify the BURN_ANGLE command: Write the commands 0x01, 0x11 and 0x10 sequentially into the register 0xFF to load the actual OTP content. Read the ZPOS and MPOS registers to verify that the BURN_ANGLE command was successful. Step 8 Read and verify the ZPOS and MPOS registers again after a new power-up cycle.
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description Figure 26: Option B: Angle Programming Through the OUT Pin Note(s): 1. After step 5 the new setting is effective at the output. 2. If step 3 is not followed by step 5 no permanent write will be performed. 3. It is highly recommended to perfor m a functional test after the procedure. 4. This procedure can be executed only one time; the zero posi tion and maximum angle can be reprogrammed only through the I²C (Option A ). 5. This procedure can be executed only if the presence of the magnet is detected (MD = 1). Use the correct hardware configuration shown in Figure 36 and Figure 37 . The PGO pin is connected to GND and the OUT pin is pulled high by an internal resistor until the programming procedure is finished. Step 1 Power up the AS5600L. Step 2 Position the magnet in the start position. Step 3 Pull the OUT pin to GND for at least 100 ms, then allow the pin to float. Step 4 Rotate the magnet in the same direction defined by the level on the DIR pin (GND for clockwise, VDD for counterclockwise) to the stop position. The amount of rotation must be greater than 18 degrees. Step 5 Pull the OUT pin to GND for at least 100 ms, then allow the pin to float. Step 6 Check if the OUT pin is permanently driven to GND. This indicates an error occurred during programming. If the voltage driven on the OUT pin corresponds to the magnet position, the procedure was performed successfully.
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description Figure 27: Option C: Programming a Maximum Angular Range Through the I²C Interface Note(s): 1. After each register command, the new configuratio n is effective at the output at least 1 ms later. 2. It is recommended to perform a functional test after this procedure. 3. Once a bit in registers MANG, CONFIG and I2CADDR is perman ent written to 1, it stays on 1 and cannot be changed to 0 anymor e. A bit which is 0 can be programmed to 1. Except the MSB bit of I2CADDR. Once the MSB bit of the slave address is programmed to 0, it cannot be changed to 1 again. 4. MANG can be written only if ZPOS and MPOS have never been permanently written (ZMCO = 00). Use the correct hardware configuration shown in Figure 36 and Figure 37 . Step 1 Power up the AS5600L. Step 2 Use the I²C interface to write the maximum angular range into the MANG register. For example, if the maximum angular range is 90 degrees, write the MANG register with 0x400. Configure additional configuration settings by writing the CONFIG and I2CADDR register (see I²C Address Programming ). Wait at least 1 ms. Proceed with Step 3 to permanently program the configuration. Step 3 Perform a BURN_SETTINGS command to permanently program the device. Wait at least 1 ms. Step 4 Verify the BURN_SETTINGS command: Write the commands 0x01, 0x11 and 0x10 sequentially into the register 0xFF to load the actual OTP content. Read and verify the MANG and CONF registers to verify that the BURN_SETTINGS command was successful. Proceed with Step 5 to permanently program a zero position. If the OUT pin is used for this option, the PGO pin must be connected to GND. Step 5 Position the magnet in the start position (zero angle). Step 6 Pull the OUT pin to GND for at least 100 ms, then allow the pin to float. Alternatively, program the zero position through the I²C interface (Option A). Wait at least 1 ms. Step 7 Verify the permanent programming by I²C (Option A) or check if OUT is permanently driven to GND (Option B ). Step 8 Read and verify the permanently programmed registers again after a new power-up cycle.
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description I²C Address Programming The 7-bit I²C slave address of the AS5600L is programmable to allow communication between a MCU and multiple AS5600L position sensors on one bus. Th e default slave address is 40h. There are two possibilities to change the I²C slave address:
- T e m p o r a r y Change : Write new slave address into register I2CADDR and I2CUPDT . This change of the I²C slave address is just temporary. Af ter power-on reset the slave address is set to previous value.
- Permanent Change : Write the new slave address to register I2CADDR , then perform BURN_SETTING command. This option is for permanently changing the I²C slave address. Note(s): Once the MSB bit of the slave address is programmed to 0, it cannot be changed to 1 again.
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description Output Stage Without regard to the PWM output , an external unit can read the angle from the ANGLE register through I²C interface at any time. The output stage is fixed to VDD default. Note(s): To enable the PWM output configure the OUTS bits in the CONF register. The AS5600L supports programming both a zero angle ("0 DEG") as well as the maximum angular range (" θmax"). As shown in Figure 28 , reducing the maximum angular range pushes the discontinuity points away from the edges "0 DEG" and " θmax" by λ, where λ= (360 - θmax)/2. Figure 28: Output Characteristic Over a Range Smaller Than 360° If θmax is the maximum angle, the number of steps N of the output signal OUT is: N = ( θmax/360) × 4096 Digital output code [ANGLE] 4095 Angle (DEG)
0 DEG θMAX
λ λ
360 DEG
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description PWM Output Mode The AS5600L output stage can be programmed in the OUTS bits of the CONF register for a PWM-encoded digital output (OUTS = 10). In this mode, the OUT pin provides a digital PWM signal. The duty cycle of each pulse is proportional to the absolute angle of the rotating magnet. The PWM signal consists of a frame of 4351 PWM clock periods as shown in Figure 29 . This PWM frame is composed of the following sections:
- 128 PWM clock periods high
- 4095 PWM clock periods data
- 128 PWM clock periods low The angle is represented in the data part of the frame, and one PWM clock period represents one 4096 th of the full angular range. The PWM frequency is programmed with the PWMF bits in the CONF register. Note(s): If the range is 360 degrees, to avoid discontinuity points exactly at the limit of the range, a 10-LSB hysteresis is applied. This hysteresis suppre sses toggling the position when the magnet is close to zero or 360 degrees. Figure 29: Output Characteristics in Pulse Width Modulation Mode An angle of zero degrees is represented by 128 clock periods high and 4223 clock periods low, while a maximum angle consists of 4223 clock periods high and 128 clock periods low. time 4095 4094 4093 4092 4091 4090 4089 4088 4087 4086 4085 data 128 clock periods low 128 clock periods high
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description For a fast step response and lo w noise after settling, the fast filter can be enabled. The fast filter works only if the input variation is greater than the fast filter threshold, otherwise the output response is determined only by the slow filter. The fast filter threshold is programmed with the FTH bits in the CONF Register . As shown in Figure 33 , the step response stays within an error band after two full sampling periods to settle to the final value determined by the slow filter. Figure 32: Fast Filter Threshold FTH Fast Filter Threshold (LSB) Slow-to-fast filter Fast-to-slow filter
000 Slow filter only
[v1-12] 2020-May-14 Document Feedback AS5600L − Register Description Figure 33: Step Response (fast filter ON) Direction (clockwise vs. counterclockwise) The AS5600L allows controlling the direction of the magnet rotation with the DIR pin. If DI R is connected to GND (DIR = 0) a clockwise rotation viewed from the top will generate an increment of the calculated angle. If the DIR pin is connected to VDD (DIR = 1) an increment of the calculated angle will happen with counterclockwise rotation. Figure 34: Raw Angle in Clockwise Direction Input Sampling Frequency Settling Time according slow filter setting Noise Fast Filter Noise slow filter Output response Fast filter step response Threshold
1 VDD5V
2 VDD3V3
3 AOUT
4 GND
N S VDD5V N S N S N S
0 Deg 180 Deg 90 Deg 270 Deg CW CW CW
RAW ANGLE = 0 RAW ANGLE = 1024 RAW ANGLE = 2048 RAW ANGLE = 3072
Document Feedback [v1-12] 2020-May-14 AS5600L − Register Description Hysteresis To avoid any toggling of the output when the magnet is not moving, a 1 to 3 LSB hysteresis of the 12-bit resolution can be enabled with the HYST bits in the CONF register. Magnet Detection As a safety and diagnostic feat ure, the AS5600L indicates the absence of the magnet. If the measured magnet field strength goes below the minimum specified level ( Bz_ERROR ), the output is driven low, without regard to the MD bit in the STATUS register is 0. Low Power Modes A digital state machine automatically manages the low power modes to reduce the average current consumption. Three low power modes are available and can be enabled with the PM bits in the CONF register. Current consumption and polling times are shown in Figure 8 . Automatic Low Power Mode Timer The automatic low power mode timer allows saving power by switching into LMP3 if the an gle stays within the watchdog threshold of 4 LSB for at least one minute, as shown in Figure 35 . The watchdog function can be enabled with the WD bit in the CONF register. Figure 35: Automatic Low Power Mode Timer Function 1 minute Watchdog threshold LPM3 NOM,LPM1, LPM2 NOM,LPM1, LPM2 Output Value
4 LSB
[v1-12] 2020-May-14 Document Feedback AS5600L − Application Information Schematic All required external components are shown below for the reference application diagram. To improve EMC and for remote applications, consider additional protection circuitry. Figure 36: Application Diagram for Angle Readout and Programming Through OUT Pin ( Option B ) Note(s): 1. Consider that the output is driven high by an internal pull-up resistor during programming through the OUT pin. Disconnect additional external load during the programming procedure. Figure 37: Application Diagram for Angle Readout and Programming with I²C ( Option A and Option C )
Application Information
GND -> CW VDD -> CCW PG O = GND -> OptionB 4.5-5.5V GND AS5600>
1 VD D5V
2 VD D3V3
3 OUT
3-3.6V* 3.3V Operation GND -> CW VDD -> CCW GND AS5600> C1 C** * Supply voltage for permanent programming is 3.3–3.6V ** 10μF Capacitor required during permanent programming PG O = GND -> OptionB GND -> CW VDD -> CCW To MCU 4.5-5.5V GND AS5600> 3-3.6V* 3.3V Operation GND -> CW VDD -> CCW To MCU GND AS5600> C1 C** * Supply voltage for permanent programming is 3.3–3.6V ** 10μF Capacitor required during permanent programming -> OptionC for Programming with OUT Pin PG O = GND -> OptionC for Programming with OUT Pin PG O = GND
[v1-12] 2020-May-14 Document Feedback AS5600L − Application Information Mechanical Data The internal Hall elements are placed on a radius of 1 mm. The center of the internal Hall array is NOT in the center of the package as shown below in Figure 40 . The center of the magnet must be placed over the center of the Hall sensor array. Figure 40: Hall Element Positions (SOIC-8) Note(s): 1. All dimensions in mm. 1.161 typ. 0.435 typ. 0.459 typ. 1.470 nom.2.089 typ. 0.172 typ. Notes: 1. All dimensions in mm 2.995 typ. Package outline Package outline Die Centre Internal Hall Array Centre
Document Feedback [v1-12] 2020-May-14 AS5600L − Package Drawings & Markings Figure 41: Note(s): 1. Dimensioning & tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. N is the total number of terminals. 4. DATUMS A & B to be determined at DATUM H. Package Drawings & Markings Symbol Min Nom Max A- - 1 . 7 5 A1 0.10 - 0.25 A2 1.25 - - b 0.31 - 0.51 c 0.17 - 0.25 D - 4.90 BSC - E - 6.00 BSC - E1 - 3.90 BSC - e - 1.27 BSC - L 0.40 - 1.27 L1 - 1.04 REF - L2 - 0.25 BSC - R0 . 0 7 - - R1 0.07 - - h 0.25 - 0.50 Θ 0º - 8º Θ1 5º - 15º Θ20 º - - aaa - 0.10 - bbb - 0.20 - ccc - 0.10 - ddd - 0.25 - eee - 0.10 - fff - 0.15 - ggg - 0.15 - GreenRoHS
[v1-12] 2020-May-14 Document Feedback AS5600L − Package Drawings & Markings The Wafer Level Chip Scale Package has a dimension of 2.07mm x 2.63mm. Ball pitch is 500μm. The internal Hall elements are placed on a radius of 1 mm. The center of the internal Hall array is NOT in the center of the package as shown in the figure below. The center of the magnet must be placed over the center of the Hall sensor array. Figure 42: Note(s): 1. Pin1=A1 2. ccc coplanarity 3. All dimensions are in μm Bottom view (Ball side)Top through view Die size after cutting: 2045x2605 ±20µm Die Centre Internal Hall Array Centre 172 typ. Notes: Pin 1 = A1 ccc Coplanarity All dimensions are in µmGreen RoHS
Document Feedback [v1-12] 2020-May-14 AS5600L − Ordering & Contact Information Figure 47:
Ordering Information
Buy our products or get free samples online at: www.ams.com/Products Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/Contact Headquarters ams AG Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Package Marking Delivery Form Delivery Quantity AS5600L-ASOP SOIC-8 AS5600L 13” Tape & Reel in dry pack 2500 pcs/reel AS5600L-ASOM SOIC-8 AS5600L 7” Tape & Reel in dry pack 500 pcs/reel AS5600L-AWLT WL-CSP AS5600L 13” Tape & Reel in dry pack 6500 pcs/reel AS5600L-AWLM WL-CSP AS5600L 7” Tape & Reel in dry pack 1000 pcs/reel Ordering & Contact Information
[v1-12] 2020-May-14 Document Feedback AS5600L − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories plus additional 4 substance categories (per amendment EU 2015/863), including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br/Cl): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) and do not contain Chlorine (Cl not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Document Feedback [v1-12] 2020-May-14 AS5600L − Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used with out the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applic ations requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
[v1-12] 2020-May-14 Document Feedback AS5600L − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Document Feedback [v1-12] 2020-May-14 AS5600L − Revision Information Note(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1-11 (2018-Jan-22) to current revision 1-12 (2020-May-14) Page Updated Figure 47 42 Revision Information
[v1-12] 2020-May-14 Document Feedback AS5600L − Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
2 Block Diagram
3 Pin Assignments
5A b s o l u t e M a x i m u m R a t i n g s
7 Electrical Characteristics
7 Operating Conditions
8 Digital Inputs and Outputs
9 Timing Characteristics
9 Magnetic Characteristics
10 System Characteristics
11 Detailed Description
11 IC Power Management
12 I²C Interface
12 Supported Modes
12 I²C Interface Operation
13 I²C Electrical Specification
14 I²C Timing
15 I²C Modes
18 AS5600L Slave Modes
20 Register Description
21 ZPOS/MPOS/MANG Registers
22 CONF Register
22 ANGLE/RAW ANGLE Register
23 STATUS Register
23 AGC Register
23 MAGNITUDE Register
24 Non-Volatile Memory (OTP)
24 Burn_Angle Command (ZPOS, MPOS)
24 Burn_Setting Command (MANG, CONFIG)
25 Angle Programming
28 I²C Address Programming
29 Output Stage
30 PWM Output Mode
31 Step Response and Filter Settings
33 Direction (clockwise vs. counterclockwise)
34 Hysteresis
34 Magnet Detection
34 Low Power Modes
34 Automatic Low Power Mode Timer
Document Feedback [v1-12] 2020-May-14 AS5600L − Content Guide