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[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E 3D Hall Position Sensor for Linear and Off-Axis Applications The AS5403 can measure magnetic fields components in all three dimensions and converts the magnetic field information into absolute position information. Only a simple 2-pole magnet is required as the magnetic field source. Using two 3D-Hall cells allows absolute (single pixel) as well as differential (double pixel) 3D magnetic field measurement. The differential measurement makes the AS5403 ideal for use in rough automotive position se nsing applications that include not only dust, dirt or moisture but also unwanted magnetic stray fields. All the signal conditioning, including compensation of temperature effects as well as linearization of the output is included in the IC. The absolute position informatio n of the magnet is directly accessible over a SPI interface and a programmable PWM or analog output. The build in di agnostic functions makes the AS5403 suitable for safety critical applications. The AS5403 is available in a 14-pin TSSOP package and is qualified according AEC-Q100 for an ambient temperature range from -40°C to 150°C. It operates at a supply voltage of 5V ±10%. The programming of the AS5403 is done over the single wire UART interface. The AS5403 is overvoltage protected up to 18V on the supply and output pins. In addition the supply pins are reverse polarity protected up to -18V. Ordering Information and Content Guide appear at end of datasheet. General Description
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − General Description Key Benefits & Features The benefits and features of AS5403A/D/E, 3D Hall Position Sensor for Linear and Off-Axis Applications are listed below: Figure 1: Added Value of Using AS5403A/D/E
Applications
Linear position:
- Clutch/brake pedal
- Gearbox sensor Off-Axis:
- Steering angle sensor
- Gearbox shift link Benefits Features High flexibility in magnet selection High magnetic input range Suppression against magnetic stray fields Dual 3D pixel principle Suitable for high temperature applications Temperature range from -40 to 150°C (ambient) Flexibility in choice of interface Ana log or PWM output, SPI as alternative Best in class performance parameters Offset and sensitivity accuracy over temperature Flexible mechanical arrangement of magnet Flexible configuration registers External calculations of raw data 3D raw data assessment possible High linearity after teaching 33 linearization points Supporting safety critical applications Integrated diagnostic functions
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − General Description Block Diagram The functional blocks of this device for reference are shown below: Figure 4: AS5403A/D/E Block Diagram 3D Hall pixels: The AS5403 contains two 3D Hall pixels, spaced 2.5mm apart. MUX: The multiplexer pre-selects depending on the AS5403 variant and chosen mode two/four magnetic components. ADC: The Sigma-Delta ADC samples the Hall sensors signals selected by the MUX. The sampling of the sensors is done sequentially. Signal conditioning: This block includes offset and temperature compensation as well as amplitude matching. Bi/Bj: Preparation of the input signal for the ATAN calculation. Inversion and offset adjustment functions. ATAN: Angle calculation. Linearization: A 33-point linearization of the ATAN output. In addition output settings for gain an clamping. Temperature: An on-chip temperature sensor is available. It can be read over the SPI interface. This sensor is also used for signal conditioning PWM interface: The linearized measurement data is available over a single pin in the form of a pulse width modulated (PWM) signal. SPI interface: A bi-directional SPI interface allows communication with the chip, including reading measurement data, E²PROM contents or writing configuration data. E²PROM: The on-chip E²PROM contains the configuration data of the chip. Diagnostics: Monitor functions on different blocks to check the correctness of the internal signals. VDD3V LDO AS5403 VDD GND SCS SDI SCLK SDO 3DHall Cell X Z X Z M U X3DHall Cell Bi Bj E²PROM Y Y Diagnostics PWM DAC ADC signal conditioning ATAN (CORDIC) Linearization and Output setting Temperature Sensor SPI OUT DSW
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Pin Assignments Figure 5: AS5403 Pin Configuration AS5403 Pin Configuration, TSSOP-14 Package (Top View): X indicates the axis of lateral position measurement; z axis is perpendicular to the package surface Pin Assignments 7 8 141 TEST SCS SCLK SDI SDO TEST NC VDD NC NC VDD3 DSW OUT GND AS5403x Y X
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Pin Assignments Figure 6: Pin Description PIN Types: Pin Symbol Type Description
1 TEST DI_PD Test pin connect to GND on PCB
2 SCS DI_PD SPI chip select (active high), connect to GND if not used in
3 SCLK DI_PD SPI clock, connect to GND if not used in application
4 SDI DI_PD SPI input data line, connect to GND if not used in application
5 SDO DO SPI output data line, leave open if not used in application
6 TEST DO leave open on PCB
7 NC Not connected, Set to GND in application
8 NC Not connected, Set to GND in application
9 NC Not connected, Set to GND in application
10 VDD S Supply Voltage 5 V
11 VDD3 AIO Regulator output
12 GND S Ground
13 OUT AIO Analog/PWM Output, programming option over output.
14 DSW AIO Programmable digital switch output
S: Supply pad AIO: Analog I/O DI_PD: Digital input with internal pull down DO: Digital output – push-pull
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Electrical Characteristics Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Operating Conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 7: Absolute Maximum Ratings Symbol Parameter Min Max Unit Comments VDD DC supply voltage at pin VDD -18 18 V OUT_OV Voltage at pin OUT and DSW -0.3 18 V VREG DC voltage at VDD3 pin -0.3 5 V VDIG DC voltage at digital input and output pins -0.3 5 V Iscr Input current (latchup immunity) -100 100 mA AEC-Q100-004 ESD Electrostatic discharge ± 2 kV AEC-Q100-002 EEPcyc EEPROM endurance cycles 100 cycles A part of EEPROM is reserved for factory settings. This part is pre-programmed and locked by ams. The customer area of EEPROM can be programmed up to 100 times at T amb=27deg. EEPROM is intended to be programmed at 0h only in the customer production line and shall not be reprogrammed during operation in the field. T strg Storage temperature -55 150 °C Min – 67°F; Max 302°F
Electrical Characteristics
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Electrical Characteristics Operating Conditions Operating Conditions: Operating temperature = -40°C to 150°C, VDD = 4.5 - 5.5V unless otherwise noted. Figure 8: TBody Body temperature 260 °C The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices” . The lead finish for Pb-free leaded packages is matte tin (100%Sn). RH NC Relative humidity non-condensing 58 5 % MSL Moisture Sensitivity Level 3 Represents a maximum floor life time of 168h Symbol Parameter Min Typ Max Unit Comments Tambient Operating temperature -40 150 °C IDD Supply current 20 25 mA VDD Positive supply voltage 4.5 5 5.5 V TSTUP Power up time 10 ms Symbol Parameter Min Max Unit Comments
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Electrical Characteristics Magnetic Sensor Conditions Operating Conditions: Operating temperature = -40°C to 150°C, VDD = 4.5 - 5.5V unless otherwise noted. Figure 9: Magnetic Characteristics Note(s) and/or Footnote(s): 1. Minimum condition is valid if bo th input components are above 5mT. 2. 50mT AS5403A, 100mT AS5403D and AS5403E. 3. Parameter is valid for version AS5403E and AS5403D. AS5403A ±1.5%FSR. Symbol Parameter Min Typ Max Unit Comments BIR Magnetic Range X,Y,Z ±5(1) ±50 mT AS5403A (Bx, Bz) ±5(1) ±100 mT AS5403D (Bx, Bz) ±5(1) ±100 mT AS5403E (Bx, By) SRDxz_temp Sensitivity ratio drift Bx/Bz -3 3 % Temperature only SRDxy_temp Sensitivity ratio drift Bx/By -3 3 % Temperature only ODx Offset drift Bx -1(3) 1(3) %FSR(2) ODy Offset drift By -1(3) 1(3) %FSR(2) ODz Offset drift Bz -0.5 0.5 %FSR(2)
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Electrical Characteristics ANALOG OUTVOH Output level high 96 %VDD IOUT=-3mA OUTVOL Output level low 4 %VDD IOUT=3mA OUTINL Output integral non linearity 10 LSB Between 4% and 96% of VDD OUTDNL Output differential non linearity -10 10 LSB Between 4% and 96% of VDD OUTOFF Output offset -25 mV Best fit line offset; evaluated between 4% and 96% of VDD OUTUD Update rate of the Output 1000 μs OUTSTPR Output step response (rising) 150 μs From step on DAC input to 90% of VDD on the OUT pin; RPUOUT=4.7KΩ; CLOUT=1nF; VDD=5V OUTSTPF Output step response (falling) 150 μs From step on DAC input to 10% of VDD on the OUT pin; RPUOUT=4.7KΩ; CLOUT=1nF; VDD=5V OUTDRIFT Output Voltage Temperature drift -0.5 0.5 % of value at mid code OUTRATE Output ratiometricity error -1.5 1.5 % VDD Between 4% and 96% of VDD OUTNOISE Noise 25 mVpp 1KHz to 30kHz; at 2048 LSB level, lab characterization only Symbol Parameter Min Typ Max Unit Comments
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Electrical Characteristics PWM PWMF PWM frequency 1000 Hz PWM frequency for version AS5403A and AS5403D and AS5403E
125 Hz in table
selection 2. See Figure 44 T SYNCH PWM Sync time 0.1*1/PWMF s PWMVOH Output voltage high 4.6 V VDD=5V; IOUT=-5mA PWMVOL Output voltage low 0 0.4 V VDD=5V, IOUT=5mA PWMSRR PWM slew rate (rising edge) 12 4 V / μ s Between 25% and 75% RPUOUT=10kΩ; CLOUT=4.7nF VDD=5V PWMSRF PWM slew rate (falling edge) 12 4 V / μ s Between 75% and 25% RPUOUT=10kΩ; CLOUT=4.7nF VDD=5V PROGRAMMING OUTVIH High level input voltage at OUT 70 % VDD VDD=5V OUTVIL Low level input voltage at OUT 30 % VDD VDD=5V BRATE UART baud rate 2.4 9.6 kHz VDD=5V Symbol Parameter Min Typ Max Unit Comments
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Electrical Characteristics Figure 12: Output Driver Characteristics DSW Symbol Parameter Min Typ Max Unit Comments GENERAL DSWISCLS Short circuit output current (LSD) 51 02 0 m A V D S W = + 1 8 V DSWISCHS Short circuit output current (LSD) -20 -10 -5 mA VDSW=0V DSWTSCDET Short circuit detection time 5 %PWM DSWTSCRC Short circuit recovery time 16 PWM cycles DSWILEAK Output leakage -20 20 μA BGNDPU Output voltage broken GND with pull-up 96 100 %VDD BGNDPD Output voltage broken GND with pull-down 04 % V D D BVDDPU Output voltage broken VDD with pull-up 96 100 %VDD BVDDPD Output voltage broken VDD with pull-down 04 % V D D DSWVOH Output voltage high 4.6 V VDD=5V; IDSW=-5mA DSWVOL Output voltage low 0 0.4 V VDD=5V; IDSW=5mA DSWSRR DSW slew rate (rising edge) -4 -2 -1 V/μs Between 25% and 75%; RPUDSW = 10kΩ; CLDSW=4.7nF; VDD=5V (PP with pullup) DSWSRF DSW slew rate (falling edge) 12 4V / μ s Between 75% and 25%; RPUDSW = 10kΩ; CLDSW=4.7nF; VDD=5V (PP with pullup)
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Electrical Characteristics SPI Timing Figure 13: SPI Timing Symbol Parameter Min Typ Max Unit Note TSCLK SCLK period 250 ns TSCLKH SCLK high phase 125 ns TSCLKL SCLK low phase 125 ns TLEAD SCS lead time 100 ns TLAG SCS lag time 100 ns TSCSL SCS low phase 2500 ns TSUPI SDI input setup time 50 ns THLDI SDI input hold time 50 ns TVALID SDO output valid time 50 ns CL = 100pF THLDO SDO output hold time 0 ns CL = 100pF TACC SDO output access time 100 ns CL = 100pF TDIS SDO output disable time 50 ns CL = 100pF TRISE SDO output rise time 60 ns CL = 100pF TFALL SDO output fall time 60 ns CL = 100pF
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Functional Description The AS5403 is manufactured in a CMOS process and uses lateral and vertical Hall sensor technology for sensing the magnetic field distribution in all 3D directions. The integrated 3D-Hall pixels are placed with a pixel pitch of 2.5 mm and deliver a voltage representation of the magnetic field at the surface of the IC. Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algori thms, the AS5403 provides accurate high-resolution absolute angular position information. For this purpose a Coordinate Rotation Digital Computer (CORDIC) calculates the angle and the magnitude. Signal Processing Path Front The AS5403 can be configured in different operation modes. These are absolute (ABS), average (AVG) and differential (DIFF). The internal calculation scene is changed automatically with the selected mode. Figure 16: Signal Processing Path AS5403A and AS5403D (Bx and Bz) Note(s) and/or Footnote(s): 1. Yellow → Functional block 2. Blue → Readable register 3. Green → Write/Readable EEPROM parameter Functional Description MV MV MV MV ABS AVG DIFF ABS AVG DIFF Angle Calculation Offset Bi Gain Bi Mux Bi‘ Bj‘ Bj Bi Angle Magnitude Offset Bj Gain Bj Swap
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Functional Description Signal Processing Path Backend Figure 19: Signal Processing Path Backend Note(s) and/or Footnote(s): 1. Yellow → functional block 2. Blue → Readable register 3. Green → Write/readable EEPROM parameter A pre-scale function can be used to extend the angle range. This is in particular needed in sector applications (off-axis) or small linear strokes. This function optimizes the usage of the linearization function in the following step. The linearization takes maximum 33 supporting point. These points are equally spread over the angular range. The post-processing function is able to manipulate the output characteristic in gain, offset and clamping. The digital output switch function uses a comparator. The switching value and hysteresis can be defined. Finally the configuration of the output defines the operation of the output drivers. Angle Pre-Scale Multiplication Pre-Scale Linearization Factor Linearization Table Angle linearized Offset Gain Clamp Low 1 Clamp High 1 Comparator DSW Setting Position Output Selecton OUT Driver Configuration DSW Driver Configuration to DSW Driver to OUT DriverOutput Characterisics Post Processing Linerization Angle Offset Angle Offset Clamping 2 Clamp Low 2 Clamp High 2 Position
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Operation The AS5403 operates at 5V ±10%, using one internal Low-Dropout (LDO) voltage regulator. For operation, the 5V supply is connected to pin VDD. While VDD3 (LDO output) must be buffered by 1μF capacitor, the VDD requires a 1μF capacitor. All capacitors (low ESR ceramic) are supposed to be placed close to the supply pins (see Figure 20 ).The VDD3 output is intended for internal use only. It must not be loaded with an external load. Figure 20: Connections for 5V Supply Voltages Note(s) and/or Footnote(s): 1. The pin VDD3 must always be buffered by a capacitor. It must not be left floating, as this may cause instable in ternal supply voltages which may lead to larger output jitter of the measured angle. The supply pin is over voltage protected up to 18V. In addition the device has a reverse polarity protection. Operation 4. 5 - 5.5V CVD D 3 TEST SCS SCLK NC AS5403 SDI SDO TEST NC NC VDD VDD3 GND OUT DSWCVD D SPI }Outputs
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Operation External Components Figure 21: External Components in the System Symbol Parameter Min Typ Max Unit Note CVDD VDD Buffer capacitance 0.8 1 1.2 μF ESRCBVDD ESR of V DD capacitance 0.3 Ω CVDD3 VDD3 Buffer capacitor 0.8 1 1.2 μF ESRREG3 ESR of VDD3 capacitance 0.3 Ω CLOUT OUT Load Capacitance 0 20 nF RPUOUT OUT Pull-Up Resistance 4.7 10 k Ω RPDOUT OUT Pull-Down Resistance 4.7 10 k Ω CLDSW DSW Load Capacitance 0 20 nF RPUDSW DSW Pull-Up Resistance 4.7 10 k Ω RPDDSW DSW Pull-Down Resistance 4.7 10 k Ω
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Built-In Safety Figure 22: Diagnostic Functions of the AS5403 Note(s) and/or Footnote(s): 1. Hardware Error output to high impedance (HZ). 2. Algorithm Error PWM at 5%DC and /PWM at 95%DC depending on Diag_High, digital switches in high impedance (HZ), analog output insight upper or lower failure band depending on Diag_High. All algorithm errors are recoverable. Monitoring Error Type Source Comments VDD undervoltage Hardware-Error (1) Power management Recoverable VDD overvoltage Hardware-Error (1) Power management Recoverable VREG undervoltage Hardware-Error (1) Power management Recoverable Oscillator failure Hardware-Error (1) CLK management Not recoverable Loss of GND Hardware-Error (1) Output driver Loss of VDD Hardware-Error (1) Output driver Output short circuit Hardware-Error (1) Output driver Recoverable after 16 PWM period PWM/Digital switch readout failure Hardware-Error (1) Output driver Recoverable after 16 PWM period Signature failure Hardware-Error (1) EEPROM Not recoverable Linearization Overflow Algorithm Error (2) Digital DSP Range Warning Algorithm Error (2) Digital DSP Sensitivity Correction Overflow Algorithm Error (2) Digital DSP Normalization Overflow Algorithm Error (2) Digital DSP Magnet Lost Algorithm Error (2) Digital DSP Self Monitoring Error Hardware-Error (1) Digital DSP Not recoverable PWM synchronization Error Hardware-Error (1) PWM Engine Not recoverable Built-In Safety
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Output Drivers AS5403 has two output stages, with different characteristics. The output driver on pin OUT can be programmed as analog output or low side driver PWM (/PWM), and includes a receiver for the bidirectional communication used to configure the device at module level. The driver on pin DSW is a low side only and can be configured as /PWM (PWM) or digital switch but doesn’t have the receiver and in communication behaves as programmed in the EEPROM. Possible configurations for OUT selectable from EEPROM bits are: Figure 23: Possible Configurations of OUT Pin Note(s) and/or Footnote(s): 1. All other not specified combinations are reserved and not allowed. To avoid floating situation in diagnostic case a pull up resistor is recommended also in push/pull mode. Mode OUT CFG <2> OUT CFG <1> OUT CFG <0> Note Analog Output Mode 000 Push-Pull analog output driver external pull up or pull down required P W M p u s h / p u l l 010 Pulse width modulated output with push/pull driver external pull up required P W M o p e n d r a i n 011 Pulse width modulated output with low side driver external pull up required P W M n p u s h / p u l l 100 Inverted pulse width modulated output with push/pull driver external pull up required P W M n p u s h / p u l l 101 Inverted pulse width modulated output with low side driver external pull up required PWM open drain reduced slew rate 110 Pulse width modulated output with low side driver external pull up required reduced falling edge Output Drivers
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Output Drivers PWM Output When the PWM mode is selected the measured position is proportional to the duty cycle. A range of 10% to 90% of the PWM period is used to carry th e information and the remaining ranges are used as a fail signal (a 5% PWM means Algorithm Error, no change over a whole period means a Hard Error). The 80% of the PWM period contains the position information. Depending on the AS5403 version (A/D/E) and mode selection the PWM frequency can change between 1.0 kHz and 0.125 kHz. The PWM resolution can also change between 10 bit (1024 positions) for 1.0 kHz and 12 bit (4096 positions) for 0.125 kHz. The behavior of PWM and /PWM is shown in the following figures. Figure 24: PWM Output 0 5 10 50 90 100 DC (%) 1023 / 4095 511/ 2047 Algorithm Error Hard Error PWM Behavior
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Output Drivers Figure 25: /PWM Output Signal At the end of the power up phase, after an under voltage recovery and after the transition from sleep to normal mode a synch pulse with duration T SYNCH precedes the PWM wave as shown in the following picture. Only after the pulse the digital switches leave the HZ state. 05105090100 DC (%) 511/ 2047 Algorithm Error Hard Error /PWM Behavior 1023 / 4095
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Output Drivers Figure 26: Sync Pulse at PWM After Power-Up TSTUP VDD PWM /PWM DIGSW_LS DIGSW_HS VDDUVT HH T SYNCH
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Output Drivers Digital Switch The AS5403 provides a digital output switch function. This signal can be defined by setting s in the EEPROM. The switching point DSW SW POINT <11:0> are compared to the calculated linearized sensor position. The polarity is selectable and the hysteresis is configurable. Possible configurations for DSW selectable from EEPROM bits are: Figure 27: Possible Configurations of DSW Pin Note(s) and/or Footnote(s): 1. All other not specified combinat ions are reserved and not allowed. Mode DSW CFG<2> DSW CFG <1> DSW CFG <0> Comments Digital switch push/pull 00 0 Push-Pull digital output driver external pull up required Digital switch open source 00 1 High side digital driver external pull down required Digital switch open drain 01 0 Low side digital driver external pull up required PWMn push/pull 0 1 1 Inverted pulse width modulated output with push/pull driver external pull up required PWMn open drain 1 0 0 Inverted pulse width modulated output with low side driver external pull up required PWM push/pull 1 0 1 Pulse width modulated output with low side driver external pull up required PWM open drain 1 1 0 Pulse width modulated output with low side driver external pull up required
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Output Drivers DSW_POL= 1: Figure 28: DSW Characteristic With Positive Polarity DSW_POL=0: Figure 29: DSW Characteristic With Negative Polarity
0 D S WS WP O I N T< 1 1 : 0 >
[LSB] POSITION OUTPUT VALUE DSW = 5V DSW = 0V 4095 [LSB] POSITION OUTPUT VALUE DSW = 5V DSW = 0V 4095
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − 4-Wire Serial Peripheral Interface (SPI) AS5403 is equipped with a 4wire serial peripheral interface (SPI) to access the EEPROM memory and the read /write registers. SCS input pin (active high) selects the device for serial transfers. Register data is shifted in from the external master on the SDI pin or shifted out from the device on the SDO pin on each subsequent SCLK, in both the case s MSB first. Data are captured on the rising edge and shifted on the falling edge of SCLK for receiving command and transmitti ng command. An even parity bit is used to check the consiste ncy of the frame. SPI protocol is built by frames; each frame is composed by 4 bytes and it is detected only when SCS pin is high. If a frame contains a number of bits different from the expected the command is not executed. Valid commands for the SPI interface are the following: Figure 30: Commands SPI Write (0) The first byte of the write command is composed by the command identifier (CMD) the even parity bit (PAR) and the MSBs of the address AD<10:8>. The second byte of the command is the remaining part of the address AD<7:0>, the third and the fourth byte contains the data word we want to write (D<15:0>) on address AD<10:0>. The device forces the SDO pin low. With this command it is possible to access the EEPROM lo cations and the read/write registers area. Figure 31: SPI Write CMD Name CMD Value Note AS5403 Communication Mode Write 0 Write data in the memory area SLAVE Read 1 Read data from the memory area SLAVE/MASTER 4-Wire Serial Peripheral Interface (SPI) CMD 0 0 PAR AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 D15 D14 D13 D12 D11 D10 D9 D8SDI SDO SCLK SCS
0 D7 D6 D5 D4 D3 D2 D1 D0
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − 4-Wire Serial Peripheral Interface (SPI) Read (1) The read command is composed by 2 frames, in the first one the external master sends the command, the even parity and the address to be read on the SDO line (the last 16 bits are ignored). The device forces the SDO pin low. Figure 32: SPI Read After the switching time (TSCSL) the device drives the SDO line and when the SCS pin goes high starts to send out the answer. The first byte of the second frame is composed by the command the device is executing, the even parity and the MSBs of the address required in the previous frame (AD<10:8>). The second byte of the command is the re maining part of the address AD<7:0>, the third and the fourth bytes are the data word at the required address (AD<10:0>). With this command it is possible to access the EEPROM lo cations and the read/write registers area. SDI SDO SCLK SCS CMD 0 0 PAR AD 10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD 2 AD1 AD0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Programming the AS5403 The 2nd and 3rd frames contain the command Read/ Write (1 bit) and the address (7+7 bits): Figure 37: 2nd and 3rd Frame Addressing Write Command Figure 38: Write Command Frames AD AD AD AD
6 R/Wn parstart stopAD
13 R/Wn parstart stopAD
Synchronization frame: start stopD0 D1 D2 D3 D4 D5 D6 D7 par Write command frame low address: AD AD AD AD AD 4 parstart stop AD AD Wn Write command frame high address: AD AD AD AD Data L frame (LSBs of the data to write on address AD<13:0>): parstart stopD0 Data H frame (MSBs data to write on address AD<13:0>): parstart stopD0
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Programming the AS5403 Read Command Figure 39: Read Command Frames BAUD RATE Automatic Detection The UART includes a built-in ba ud-rate monitor that uses the synchronization frame to detect the external controller baud rate. This baud-rate is used after the synchronization byte to decode the following frame and to transmit the answer and it is stored in the BAUDREG register. Synchronization frame: start stopD0 D1 D2 D3 D4 D5 D6 D7 par Read command frame low address: AD AD AD AD AD 4 parstart stop AD AD Wn Read command frame high address: AD AD AD AD Data L frame (LSBs of the data read at the address AD<13:0>): parstart stopD0 Data H frame (MSBs of the data read at the address AD<13:0>): parstart stopD0
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Programming the AS5403 Programming Procedure The EEPROM programming is possible over the SPI or UART interface. A page write/read mo de with 64 pages 8 words each is implemented. Figure 40: Page Mode Address Page Write mode procedure: 1. Write 0x00 on address 0x2FF (START DSP = 0) 2. Write the EEPROM words (SPI/UART) inside a page (min 1 max 8 words) 3. Write 0x0003 on address 0x2FF (CFG_EPP=11) 4. Wait for 10 ms 5. Repeat from 2. fo r further programming. It is important that the write access to the selected EEPROM page are consecutive: a write command in a different page or a read command before writing CFG_EPP will delete the data. A writing to factory reserved area will be ignored. After programming it is mandatory to read back the EEPROM content and to download again the EEPROM to avoid misalignment with the mirror registers. This can be done with a power up or writing 0x0004 on address 0x2FF (EE_DWNL SFR). The programming procedure is not allowed in case Customer Lock word is 0x55AA after EEPROM download (mask_fuse=1). Lock Procedure and Signature Calculation The AS5403 contains a signature diagnostic function for the EEPROM. This signature is calculated in the AS5403 during power up and is compared to the calculated signature directly after the end of line calibration by the customer. A deviation leads to an error indication in the diagnostic flag or into the failure band mode at the output . The signature check is enabled in case of a locked device by the user. Address Page 0x000 - 0x007 1 0x008 - 0x00F 2 0x1F8 - 0x1FF 64
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration AS5403 is equipped with a 1kx8 EEPROM memory to store the factory settings and the customer configuration data. The device can be configured using the UART or 4wire Serial Peripheral Interface (SPI). EEPROM Memory Map Note(s): Write 0x0000 hex to register address 0x2FF (START DSP = 0) before a read or write access to EEPROM. Figure 41: EEPROM Memory Map ADDRESS (HEX) EEPROM Location Name 0x00B Sequencer Control 0x00F Magnet Lost threshold and hysteresis 0x019 Offset Bj 0x01A Gain Bj 0x01E Gain Bi 0x01F Offset Bi 0x05F Linearization table entry 16 0x060 Linearization table entry 0 0x061 Linearization table entry 1 0x062 Linearization table entry 2 0x063 Linearization table entry 3 0x064 Linearization table entry 4 0x065 Linearization table entry 5 0x066 Linearization table entry 6 0x067 Linearization table entry 7 0x068 Linearization Table entry 8 0x069 Linearization table entry 9 0x06A Linearization table entry 10 0x06B Linearization table entry 11 0x06C Linearization table entry 12 0x06D Linearization table entry 13 0x06E Linearization table entry 14 0x06F Linearization table entry 15 0x070 Linearization table entry -16 Device Configuration
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration 0x071 Linearization table entry -15 0x072 Linearization table entry -14 0x073 Linearization table entry -13 0x074 Linearization table entry -12 0x075 Linearization table entry -11 0x076 Linearization table entry -10 0x077 Linearization table entry -9 0x078 Linearization table entry -8 0x079 Linearization table entry -7 0x07A Linearization table entry -6 0x07B Linearization table entry -5 0x07C Linearization table entry -4 0x07D Linearization table entry -3 0x07E Linearization table entry -2 0x07F Linearization table entry -1 0x1CF Pre-Scale linearization 0x1D0 Post-Processing offset 0x1D1 Post-Processing gain 0x1D2 Clamp Low 1 0x1D3 Clamp High 1 0x1F5 Clamp high 2 (MSBs), clamp low 2 0x1F6 Clamp high 2 (LSBs) 0x1F7 Angle offset 0x1F8 Customer LOCK 0x1F9 Output configuration and PWM frequency 0x1FA DSW driver configuration 0x1FB DSW settings 0x1FC Customer ID 0x1FD Customer ID 0x1FE Customer ID 0x1FF EEPROM signature + customer ID ADDRESS (HEX) EEPROM Location Name
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Figure 42: EEPROM Sequencer Control 0x00B Register Hex Access Bit Function Default Note 0x00B R/W D15 (MSB) Reserved 0D14 D13 D12 ExtRng 0 Extended Range (for differential mode): 0 = disabled 1 = enabled D11 Reserved 0 D10 Swap 0 Swap Bi and Bj before angle calculation D9 Reserved 0 D8 Reserved 0 D7 Table Select <1> 0 These bits allow the selection of 3 different operating modes, stored in 3 individual sequencer tables. Don’t use 11 --> no operationD6 Table Select <0> 1 D5 Reserved 0 D4 DIFF 0 Differential mode: 0 = absolute measurement of one pixel 1 = differential measurement of both pixels D3 Reserved 0 D2 SeqEn 1 1 = Sequencer enabled 0 = Sequencer disabled D1 AVG 1 Average mode: 0 = absolute measurement of one pixel, 1 = average measurement of both pixels D0 (LSB) Reserved 0
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Figure 50: EEPROM Linearization Table 0x05F to 0x07F Figure 51: EEPROM Pre-Scale Linearization 0x1CF Figure 52: EEPROM Post-Processing Offset 0x1D0 Register Hex Access Bit Content Default Note 0x05F R/W D15 to D0 Angle linearization table, value 16
0000 Signed integer
[-1;1] 0x060 Angle linearization table, value 0 0x061 Angle linearization table, value 1 0x06F Angle linearization table, value 15 0x070 Angle linearizat ion table, value -16 0x071 Angle linearizat ion table, value -15 0x07E Angle linearization table, value -2 0x07F Angle linearization table, value -1 Register Hex Access Bit Function Default Note 0x1CF R/W D15 (MSB) Pre-Scale linearization Factor decimal Signed integer [-8;8]: D0 (LSB) Register Hex Access Bit Function Default Note 0x1D0 R/W D15 (MSB) Post processing offset 0 Signed integer [-32768;32767]: D0 (LSB)
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration Figure 53: EEPROM Post-Processing Gain 0x1D1 Figure 54: EEPROM Clamp Low 1 0x1D2 Figure 55: EEPROM Clamp High 1 0x1D3 Figure 56: EEPROM Clamp Low 2 and Clamp High 2 (LSBs) 0x1F5 Register Hex Access Bit Function Default Note 0x1D1 R/W D15 (MSB) Post processing gain decimal Signed integer [-4;4]: D0 (LSB) Register Hex Access Bit Function Default Note 0x1D2 R/W D15 (MSB) Clamp Low 1 -32768 decimal Signed integer [-32768;32767]: D0 (LSB) Register Hex Access Bit Function Default Note 0x1D3 R/W D15 (MSB) Clamp High 1 32767 decimal Signed integer [-32768;32767]: D0 (LSB) Register Hex Access Bit Function Default Note 0x1F5 R/W D15 (MSB) Clamp High 2 (LSBs)
0 Clamp High 2 (LSBs) value for PWM
and analog output. DSW not effected. 4 lower LSBs [0;16] D12 0 D11 Clamp Low 2 Clamp Low 2 value for PWM and analog output. DSW not effected. 12 bit unsigned value [0;4096] D0 (LSB) 0
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Figure 57: EEPROM Clamp High 2 (MSBs) 0x1F6 Figure 58: EEPROM Angle Offset 0x1F7 Figure 59: EEPROM Customer Lock 0x1F8 Register Hex Access Bit Function Default Note 0x1F6 R/W D15 (MSB) Reserved D8 0 Clamp High 2 (MSBs)
0 Clamp High 2 (MSBs) value for PWM
and analog output. DSW not effected. 8 higher MSBs [0;256] D0 (LSB) 0 Register Hex Access Bit Function Default Note 0x1F7 R/W D15 (MSB) Angle Offset 0 Signed integer [-32768;32767]: D0 (LSB) Register Hex Access Bit Function Default Note 0x1F8 R/W D15 (MSB) Customer Lock 0 EEPROM lock key region. When key 0x55AA is programmed --> no more write access to complete EEPROM D0 (LSB)
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration Figure 60: EEPROM OUT Pin Configuration and PWM Frequency 0x1F9 Register Hex Access Bit Function Default Note 0x1F9 R/W D15 (MSB) OUT FALL <1> 0 Threshold for the fall time check. 00 = no check 01 = 24 to 28 μs 10 = 56 to 60 μs 11 = 120 to 124 μs D14 OUT FALL <0> 0 D13 OUT RISE <1> 0 Threshold for the rise time check. 00 = no check 01 = 24 to 28 μs 10 = 56 to 60 μs 11 = 120 to 124 μs D12 OUT RISE <0> 0 D11 Reserved 0 D10 OUT CFG <2> 0 Output driver configuration OUT pin:: : D8 OUT CFG <0> 0 Reserved D3 0 D2 DIAG_HIGH 0 Failure band selection internal errors 0=Failure band low 1= Failure band high D1 PWMF <1> 0 PWM frequency selection 00 = 1 kHz. Don’t use other settings except AS5403E 11=0.125kHz in case of Table Select = 10D0 (LSB) PWMF <0> 0
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Figure 61: EEPROM DSW Pin Configuration 0x1FA Register Hex Access Bit Function Default Note 0x1FA R/W D15 (MSB) DSW SW POINT <7:0> Low byte of the switching point:: D8 0 D7 DSW FALL <1> 0 Threshold for the fall time check. 00 = no check 01 = 24 to 28 μs 10 = 56 to 60 μs 11 = 120 to 124 μs D6 DSW FALL <0> 0 D5 DSW RISE <1> 0 Threshold for the rise time check. 00 = no check 01 = 24 to 28 μs 10 = 56 to 60 μs 11 = 120 to 124 μsD4 DSW RISE <0> 0 D3 Reserved 0 D2 DSW CFG <2> 0 Output driver configuration DSW pin. See Figure 23D1 : 0 D0 (LSB) DSW CFG <0> 0
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration Register Memory Map Note(s): Register Memory Map Write 0x0100 hex to register address 0x2FF (START DSP = 1) before a read of following registers. Figure 67: Register Map Address (Hex) Register Location Name 0x2FF Control DSP 0x300 Error Register 1 0x301 Position 2 0x302 Error Register 2 0x510 Temperature 0x511 Measurement Value 1 (MV 1) 0x512 Measurement Value 2 (MV 2) 0x513 Measurement Value 3 (MV 3) 0x514 Measurement Value 4 (MV 4) 0x520 Magnitude 0x521 Angle (not linearized) 0x522 Angle linearized 0x547 Position 1 0x548 Bi component 0x549 Bj component 0x54B Bi’ component 0x54C Bj’ component 0x54D Bk (unused)
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Figure 68: Control DSP 0x2FF Register Hex Access Bit Function Note 0x2FF R/W D15 (MSB) Reserved: D12 D11 PASS2FUNC Activation for func tional mode of the output. D10 FREEZE When CAL_EN=1 it enables the 3D Hall Core for 1 only measurement (automatically cleared at the end of the measurement). Used For SPI calibration in communication mode. When CAL_EN=0 it freezes the read SFR content D9 CAL_EN Enable the calibration procedure. Used in communication mode. D8 START_DSP Start the 3D Hall Core. Used in communication mode to start the DSP measurements. Reserved: D3 EE_RESET Force EEPROM reset. Used in communication mode. D2 EE_DWNL Force EEPROM download. Used in communication mode. D1 CFG_EPP <1> EEPROM programming mode: 00: no EEPROM permanent write; 11: permanent write of the current EEPROM page (bits CFG_EPP are automatically cleared); 01: permanent write after each EEPROM write command. D0 (LSB) CFG_EPP <0>
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration Figure 69: Error Register 1 0x300 Register Hex Access Bit Function Note 0x300 R D15 (MSB) Reserved D14 MgnLost Magnet Lost: it indicates that Magnitude is below the configured threshold (magnet is too far away) (EEPROM 0x00F) D13 DiPaSeMo Digital Part Self-Monitoring fail: it indicates that the digital part self-monitoring detected an error. D12 NrmOvfl Normalization Overflow: it indicates the multiplier overflow during normalization. D11 SensOvfl Sensitivity Correction Overflow: it indicates the Multiplier overflow during sensitivity correction over temperature D10 RngWarn Range Warning: it indicates that the ADC input signal exceeds the input range. D9 Reserved D8 CalcError Calculation Error: it indicates that an overflow in post-processing calculations occurred. D7 Reserved D6 SLOvfl Linearization Overflow: it indicates that the multiplication in front of the linearization saturated. D5 GainSat Gain Multiplication Saturation: it indicates that the result of the gain multiplication saturated. D4 ClampStatus 1 Clamp Status 1: it indicates that the post-processing used the clamping values to limit the output value. D3 ClampStatus 2 Clamp Status 2: it indicates that the unsigned post-processing used the clamping values to limit the PWM/Analog value. Reserved: D0 (LSB)
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Device Configuration Protections When the voltage applied to the VDD pin falls below the undervoltage lower threshold (VDDUVTL) for longer than the TVDDUVDET time the device stops the clock of the digital part, it resets the EEPROM signature ca lculation and the 3D Hall core and the output drivers are turn ed off to reduce the power consumption. When the voltage applied to the VDD pin exceeds the VDD undervoltage upper th reshold (VDDUVTH) for longer than the TVDDUVREC time the cl ock, the signature calculation and the 3D Hall core are restarted and the output drivers are turned ON. Figure 83: Single Wire Bit Timing Symbol Parameter Min Typ Max Unit VDDUVTH VDD Undervoltage Upper Threshold 3.7 4.1 4.5 V VDDUVTL VDD Undervoltage Lower Threshold 3.3 3.7 4.1 V TVDDUVDET VDD Undervoltage Detection Time 10 250 μs TVDDUVREC VDD Undervoltage Recovery Time 10 250 μs
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Device Configuration Sensor Placement Two 3D Hall pixels each with an X-/Y-/Z-sensor are arranged in a line on the X-axis parallel to the chip edge, 2.5mm distant from each other. 3D Hall pixel positions relative to chip centre are: Pixel 1: -1250 μm Pixel 0: 1250 μm Figure 84: 3D Hall Pixel Arrangement 3D Hall Pixel 1 3D Hall Pixel 0 2.5 mm 1.25 mm 1.25 mm Tolerance: ± 0.235 mm Tolerance: ± 0.235 m m
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Package Drawings & Markings Figure 85: Pixel Cell Placement Note(s) and/or Footnote(s): 1. All dimensions in mm. 2. Die thickness 203 μm nom. 3. Adhesive thickness 30 ± 15 μm. 4. Leadframe downest 152 ± 25 μm. 5. Leadframe thickness 125 ± 8 μm. Package Drawings & Markings
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Package Drawings & Markings Figure 86: 14-Lead Thin Shrink Small Outline Package TSSOP-14 Note(s) and/or Footnote(s): 1. Dimensions & toleranceing confirm to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. N is the total number of terminals. Green RoHS Symbol Min Nom Max A- - 1 . 2 0 A1 0.05 - 0.15 A2 0.80 1.00 1.05 b 0.19 - 0.30 c 0.09 - 0.20 D 4.90 5.00 5.10 E - 6.40 BSC - E1 4.30 4.40 4.50 e - 0.65 BSC - L 0.45 0.60 0.75 L1 - 1.00 REF - Symbol Min Nom Max R0 . 0 9 - - R1 0.09 - - S0 . 2 0 - - Θ10 ° - 8 ° Θ2- 1 2 R E F - Θ3- 1 2 R E F - aaa - 0.10 - bbb - 0.10 - ccc - 0.05 - ddd - 0.20 - N1 4
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Ordering & Contact Information The device is available as the standard products shown in Figure 89 . Figure 89:
Ordering Information
Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30
8141 Unterpremstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Package Description Delivery Form Delivery Quantity AS5403A-HTST TSSOP-14 Absolute Linear Position Sensor with ±50 mT magnetic input range Bx/Bz 13" Tape & Reel in dry pack 4500 AS5403A-HTSM 7" Tape & Reel in dry pack 500 Sensor with ±100 mT magnetic input range Bx/Bz 13" Tape & Reel in dry pack 4500 AS5403D-HTSM 7" Tape & Reel in dry pack 500 AS5403E-HTST Off-Axis Position Sensor with ±100 mT magnetic input range Bx/By ±100 mT magnetic input range Bx/Bz 13" Tape & Reel in dry pack 4500 AS5403E-HTSM 7" Tape & Reel in dry pack 500 Ordering & Contact Information
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Revision Information Note(s) and/or Footnote(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1-04 (2015-Apr-07) to current revision 1-06 (2015-Aug-27) Page Removed content related to AS5403B Updated Figure 7 7 Updated Figure 14 15 Updated Sensor Placement section 56 Added Figure 85 57 Updated Figure 86 58 Revision Information
[v1-06] 2015-Aug-28 Document Feedback AS5403A/D/E − Content Guide
1 General Description
2 Key Benefits & Features
2 Applications
4 Block Diagram
5 Pin Assignments
7 Electrical Characteristics
7 Absolute Maximum Ratings
8 Operating Conditions
9 Magnetic Sensor Conditions
10 DC/AC Characteristics for Digital Pads
10 Output Driver Parameters
14 SPI Timing
15 UART Timing
16 Functional Description
16 Signal Processing Path Front
17 Internal Calculation Formulas
18 Signal Processing Path Backend
19 Operation
20 External Components
21 Built-In Safety
22 Output Drivers
23 PWM Output
26 Digital Switch
28 4-Wire Serial Peripheral Interface (SPI)
28 Write (0)
29 Read (1)
30 Programming the AS5403
30 UART Interface for Programming
30 Frame Organization
32 Write Command
33 Read Command
33 BAUD RATE Automatic Detection
34 Programming Procedure
34 Lock Procedure and Signature Calculation
35 Device Configuration
35 EEPROM Memory Map
48 Register Memory Map
54 Temperature Sensor
55 Protections
56 Sensor Placement
Document Feedback [v1-06] 2015-Aug-28 AS5403A/D/E − Content Guide