AS5215 AMSCO | Alldatasheet
Document overview
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- PDF pages: 24
Technical content
Datasheet sections
- 1 General Description
- 2 Key Features
- 3 Applications
- 4 Pin Assignments
- 4.1 Pin Descriptions
- 5 Absolute Maximum Ratings
- 6 Electrical Characteristics
- 6.1 Timing Characteristics
- 7 Detailed Description
- 7.1 Magnet Diameter and Vertical Distance
- 7.1.1 The Linear Range
- 7.1.2 Magnet Thickness
- 7.1.3 Axial Distance (Airgap)
- 7.1.5 Mounting the Magnet
- 7.1.6 Summary
- 8 Application Information
- 8.1 Sleep Mode
- 8.2 SSI Interface
- 8.3 Device Communication / Programming
- 8.4 Waveform – Digital Interface at Normal Operation Mode
- 8.5 Waveform – Digital Interface at Extended Mode
- 8.6 Waveform – Digital Interface at Analog Readback of the Zener Diodes
- 8.7 EasyZapp OTP Content
- 8.8 Analog Sin/Cos Outputs with External Interpolator
- 8.9 OTP Programming
- 9 Package Drawings and Markings
- 10 Ordering Information
1 General Description
extended ambient temperature range of -40ºC to +150ºC. simple two-pole magnet is translated into analog output voltages. optimized for various applications in terms of speed and accuracy. magnetic field is employed for plausibility check. mechanical constraints and magnetic field. Figure 1. AS5215 Block Diagram
2 Key Features
3 Applications
microcontroller-based systems. Note: This Block Diagram presents only one die.
4 Pin Assignments
Figure 2. Pin Assignments (T op View)
4.1 Pin Descriptions
Table 1. Pin Descriptions
109 VSS_1
5 Absolute Maximum Ratings
maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Hermetic Solid State Surface Mount Devices”.
6 Electrical Characteristics
Table 3. Operating Conditions Table 4. DC/AC Characteristics for Digital Inputs and Outputs Table 5. Magnetic Input Specification Table 6. Electrical System Specifications
6.1 Timing Characteristics
Remark: The digital interface will be reset during the low phase of the CS signal. Table 7. Timing Characteristics
7 Detailed Description
field is employed for plausibility check. An SSI (SPI standard) protocol is implemented for internal test access to the different circuit blocks and for signal path configuration. output signal can be set to either 1.5V or 2.5V. A unique chip ID is stored to ensure traceability. analog signal conditioning. The digital signal part is based on a 2MHz system, CLK derived via. divider from a 4MHz system oscillator. Figure 3. Typical Arrangement of AS5215 and Magnet
7.1 Magnet Diameter and Vertical Distance
Note: Following is just an abstract taken from the elaborate application note on the Magnet.
7.1.1 The Linear Range
an axial distance of 1mm between magnet and IC.
Figure 4. 3D-Graph of Vertical Magnetic Field of a 6mm Cylindrical Magnet misaligned in any direction as long as all Hall elements stay within the linear range.
diameter in the range of 5…8mm. Figure 5. Vertical Magnetic Field Across the Center of a Cylindrical Magnet
7.1.2 Magnet Thickness
shows the relative peak amplitude with reference to the recommended magnet (d=6mm, h=2.5mm). This results in an h/d ratio of 0.42. Figure 6. Relationship of Peak Amplitude vs. Magnet Thickness As the graph in Figure 6 shows, the amplitude drops significantly at h/d ratios below this value and remains relatively flat at ratios above 1.3. Therefore, the recommended thickness of 2.5mm (at 6mm diameter) should be considered as the low limit with regards to magnet thickness. d ratios >~1.3. Therefore, the recommended magnet thickness for a 6mm diameter magnet is between 2.5 and ~8 mm.
7.1.3 Axial Distance (Airgap)
Figure 7. Sinusoidal Magnetic Field Generated by the Rotating Magnet certain range. This range lies between 45 and 75mT or between 20 and 80mT, depending on the encoder product. Linear position sensors are more sensitive as they use weaker magnets. The allowed magnetic range lies typically between 5 and 60mT. the signals coming from the Hall sensors, caused by misalignment of the magnet and imperfections in the magnetic material. elements are within the linear range of the magnetic field Bz (see Figure 5).
7.1.5 Mounting the Magnet
shaft into which the magnet is mounted, is also of big importance. additional errors in the angular output of the sensor. Figure 8. Magnetic Field Lines in Air Figure 8 shows the ideal case with the magnet in air. No magnetic materials are anywhere nearby.
Figure 11. Magnetic Field Lines with Spacer Between Magnet and Iron Shaft IC. The distortion remains reasonably low.
7.1.6 Summary
The linear range decreases with airgap; Best performance is achieved at shorter airgaps. named MagInc, MagDec, MagRngn, or similar, depending on product.
8 Application Information
8.1 Sleep Mode
The target is to provide the possibility to reduce the total current consumption. No output signal will be provided when the IC is in sleep mode. down with respect to fast wake up time.
8.2 SSI Interface
done in a way that the digital clock frequency can vary in a wide range. Table 8. SSI Interface Pin Description Table 9. SSI Interface Parameter Description be derived from a 10MHz oscillator source. be derived from a 10MHz oscillator source. be derived from a 10MHz oscillator source.
8.3 Device Communication / Programming
- Send EN PROG (command 16) in normal mode before accessing the OTP in extended mode.
- OTP assignment will be defined/updated.
Table 10. Digital Interface at Normal Mode
23 WRITE CONFIG
16 EN_PROG 10000 write 1 0 0 0 1 1 0 0 1 0 1 0 1 1 1 0
Table 11. Digital Interface at Extended Mode
31 WRITE OTP 11111 xt write otp test ID 10µbiastrim vref osc lock_O
25 PROG_OTP 11001 xt write otp test ID 10µbiastrim vref osc lock_O
15 RD_OTP 01111 xt read otp test ID 10µbiastrim vref osc lock_O
9 RD_OTP_ANA 01001 xt read
8.4 Waveform – Digital Interf ace at Normal Operation Mode
Figure 14. Digital Interface at Normal Operation Mode
8.5 Waveform – Digital In terface at Extended Mode
special access (e.g. the easy zap interface). Figure 15. Digital Interface at Extended Mode
8.6 Waveform – Digital Interface at An alog Readback of the Zener Diodes
according to the command table and measure the value of the diode at the end of each phase. Figure 16. Digital Interface at Analog Readback of Zener Diodes
8.7 EasyZapp OTP Content
Each AS5215 die has an integrated 32-bit OTP ROM (Easyzapp) for trimming and configuration purposes. The PROM can be programmed via. trim bits can be locked by a lock bit. Remark: OTP assignment will be defined/updated. Note: For more information, refer to the document “IP Easyzapp Application Note Rev C”. Table 12. Serial Bit Sequence (16-bit read / write)
8.8 Analog Sin/Cos Outputs wi th External Interpolator
Figure 17. Sine and Cosine Outputs for External Angle Calculation to perform the angle calculation by an external ADC + µC, e.g. to compute the angle with a high resolution. The output driver capability is 1mA. The signal lines should be kept as short as possible, longer lines should be shielded in order to achieve best noise performance. The DC bias voltage is 1.5 or 2.5 V.
- We recommend to use a 100k pull-up resistance.
- Default conditions for unused pins are: DCLK_1/2, CS_1/2, DIO_1/2, TC_1/2, A_TST_1/2, TBO_1/2, TB1_1/2, TB2_1/2,
8.9 OTP Programming
Figure 18. OTP Programming Connection
9 Package Drawings and Markings
The devices are available in a 32-pin QFN (7x7mm) package. Figure 19. 32-pin QFN (7x7mm) Package Note: The distance between both dies is 150µm.
www.austriamicrosystems.com/AS5215 Revision 1.8 23 - 24 AS5215 Data Sheet - Revision History
Revision History
Note: Typos may not be explicitly mentioned under revision history. Revision Date Owner Description 1.0 April 29, 2008 apg Initial revision July 03, 2008 Redundancy Coding topic deleted.
1.1 July 15, 2008 Updated Key Features, Table 1 - Pin Descriptions, Figure 1 and
Figure 17. 1.2 July 14, 2009 Updated min, typ, max values for ‘Power up time’ parameter in Table 6. 1.3 July 31, 2009 Updated the following parameters in Table 6: - Values and conditions updated for 1. Propagation delay 2. Amplitude ratio tracking accuracy over temperature 3. DC Offset Drift - Deleted the ‘Output Offset’ parameter from the table. Aug 24, 2009 Updated following bits related information on page 16 - invert_channel, cm_sin, cm_cos, gain, dc_offset, Hall_b 1.4 Aug 26, 2009 Inserted Figure 12 and updated Applications and Figure 17. 1.5 Sept 01, 2009 Inserted Figure 13, Added a note in Package Drawings and Markings. 1.6 Sept 02, 2009 Deleted ‘Displacement’ parameter from Table 5. 1.7 Nov 26, 2009 Hall Array Radius value updated from 1.1mm to 1mm Updated Figure 13 1.8 Dec 11, 2009 Updated values for ‘Magnetic Sensitivity’ parameter in Table 6.
The devices are available as the standard products shown in Table 14. Note: All products are RoHS compliant and Pb-free. Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. austriamicrosystems AG rendering of technical or other services. Table 14. Ordering Information