AS5145 AMSCO | Alldatasheet

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Technical content

Datasheet sections

  • 1 General Description
  • 2 Key Features
  • 3 Applications
  • 4 Pin Assignments
  • 4.1 Pin Descriptions
  • 5 Absolute Maximum Ratings
  • 6 Electrical Characteristics
  • 6.1 Magnetic Input Specification
  • 6.2 System Specifications
  • 7 Timing Characteristics
  • 8 Detailed Description
  • 8.1 Mode_Index Pin
  • 8.1.1 Synchronous Serial Interface (SSI)
  • 8.1.2 Incremental Mode
  • 8.1.3 Sync Mode
  • 8.1.4 Sin/Cosine Mode
  • 8.1.5 Daisy Chain Mode
  • 8.2 Pulse Width Modulation (PWM) Output
  • 8.2.1 Changing the PWM Frequency
  • 8.3 Analog Output
  • 9 Application Information
  • 9.1 Programming the AS5145
  • 9.1.1 Zero Position Programming
  • 9.1.2 OTP Memory Assignment
  • 9.1.3 User Selectable Settings
  • 9.1.4 OTP Default Setting
  • 9.1.5 Redundancy
  • 9.1.6 Redundant Programming Option
  • 9.1.7 OTP Register Entry and Exit Condition
  • 9.2 Alignment Mode
  • 9.4 Selecting Proper Magnet
  • 9.4.1 Physical Placement of the Magnet
  • 9.4.2 Magnet Placement
  • 9.5 Simulation Modeling
  • 9.6 Failure Diagnostics
  • 9.6.1 Magnetic Field Strength Diagnosis
  • 9.6.2 Power Supply Failure Detection
  • 9.7 Angular Output Tolerances
  • 9.7.1 Accuracy
  • 9.7.2 Transition Noise
  • 9.7.3 High Speed Operation
  • 9.7.4 Propagation Delays
  • 9.7.5 Internal Timing Tolerance
  • 9.7.6 Temperature

1 General Description

angular measurement over a full turn of 360 degrees. front end and digital signal processing in a single device.

2 Key Features

Figure 1. AS5145 Automotive Rotary Encoder IC

3 Applications

replacement of high end potentiometers.

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4 Pin Assignments

Figure 2. Pin Assignments (T op View)

4.1 Pin Descriptions

5.3mm x 6.2mmm; (see Figure 2). Table 1. Pin Descriptions

3 DTest1_A Test output in default mode

4 DTest2_B Test output in default mode

10 CLK Clock Input of

11 CSn Chip Select, active low; Schmitt-Trigger input, internal pull-up resistor (~50kΩ)

13 NC Must be left unconnected

indicators can also be used for contact-less push-button functionality. Pin 3 and 4 are multi function pins for sync mode, sin/cosine mode and incremental mode. Pins 7, 15, and 16 are supply pins, pins 5, 13, and 14 are for internal use and must not be connected. device in Daisy Chain configuration, (see page 14). page 23) and programming mode (see Programming the AS5145 on page 19). e.g. for making a direct replacement of potentiometers possible.

14 NC Must be left unconnected

voltage. Do not load externally.

5 Absolute Maximum Ratings

absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Hermetic Solid State Surface Mount Devices”.

6 Electrical Characteristics

Table 3. Electrical Characteristics

6.1 Magnetic Input Specification

  1. Either with 3.3V or 5V supply.

Table 4. Magnetic Input Specification

6.2 System Specifications

Table 5. Input Specification Maximum error with respect to the best line fit. Maximum error with respect to the best line fit.

Figure 3. Integral and Differential Non-Linearity Example Integral Non-Linearity (INL) is the maximum deviation between actual position and indicated position. repeatability of an indicated position.

7 Timing Characteristics

Table 6. Timing Characteristics

8 Detailed Description

representation of the magnetic field at the surface of the IC. magnitude of the Hall array signals. information (see Figure 18). magnet misalignment and magnetic stray fields due to differential measurement technique and Hall sensor conditioning circuitry. Figure 4. Typical Arrangement of AS5145 and Magnet

8.1 Mode_Index Pin

The Mode_Index pin activates or deactivates an internal filter, that is used to reduce the analog output noise. 384µs. This mode is recommended for high precision, low speed applications. recommended for higher speed applications. Note: A change of the Mode during operation is not allowed. The setup must be constant during power up and during operation. Table 7. Slow and fast mode parameters

8.1.1 Synchronous Serial Interface (SSI)

Figure 5. Synchronous Serial Interface with Absolute Angular Position Data If CSn changes to logic low, Data Out (DO) will change from high impedance (tri-state) to logic high and the read-out will be initiated. „ After a minimum time tCLK FE, data is latched into the output shift register with the first falling edge of CLK. „ Each subsequent rising CLK edge shifts out one bit of data. about the validity of data such as OCF, COF, LIN, Parity and Magnetic Field status (increase/decrease). „ A subsequent measurement is initiated by a “high” pulse at CSn with a minimum duration of tCSn. absolute output maintains the last valid angular value. This alarm may be resolved by bringing the magnet within the X-Y-Z tolerance limits. LIN (Linearity Alarm), logic high indicates that the input field generates a critical output linearity. within the X-Y-Z tolerance limits. Placing the magnet above the chip, angular values increase in clockwise direction by default. Table 8. Status Bit Outputs

and 2) and as status bits in the serial data stream (see Figure 5). field is in range, both outputs are turned off.

8.1.2 Incremental Mode

case an interpolation is done. and 12bit), these bits are set during test at austriamicrosystems. These settings are permanent and can not be recovered. A change of the incremental mode (WRITE command) during operation could cause problems. A power-on-reset in between is recommended. During operation in incremental mode it is recommended setting CSn = High, to disable the SSI-Interface. Table 9. Magnetic Field Strength Red-Yellow-Green Indicator

000 O f f O f f No distance change

110 O n O f f

operate the AS5145 in the red range, but not recommended. Table 10. Incremental Resolution and cannot be changed from external.

power up-time (0), the controller can start requesting data from the AS5145 as soon as the state (A=B=Index = high) is cleared. Figure 6. Incremental Output The hysteresis trimming is done at the final test (factory trimming) and set to 4 LSB, related to a 12 bit number. position “x+2“is reached. Following this direction, the incremental outputs will again be updated with every change of the magnet position. Figure 7. Hysteresis Window for Incremental Outputs

1 LSB

3 LSB

difference. This avoids undefined output burst, e.g. if no magnet is present.

8.1.3 Sync Mode

DTEST2_B. By setting of Md0=1 and Md1=1 in the OTP register, the Sync Mode will be activated. Figure 8. DT est1_A and DT est2_B Microcontroller (interrupt) and start the SSI readout. DTEST2_B indicates the phase of available data.

8.1.4 Sin/Cosine Mode

8.1.5 Daisy Chain Mode

connected device, it is n * (18+1) bits: n= number of devices. e.g. 38 bit for two devices, 57 bit for three devices, etc. The last data bit of the first device (Parity) is followed by a dummy bit and the first data bit of the second device (D11), etc. (see Figure 10). Figure 9. Daisy Chain Hardware Configuration

Figure 10. Daisy Chain Mode Data Transfer

8.2 Pulse Width Modul ation (PWM) Output

  1. An angle position of 180° will generate a pulse width ton = 2049µs and a pause toff of 2049 µs resulting in Position = 2048 after the cal-
  2. An angle position of 359.8° will generate a pulse width ton = 4095µs and a pause toff of 3 µs resulting in Position = 4094 after the cal-
  3. An angle position of 359.9° will generate a pulse width ton = 4097µs and a pause toff of 1 µs resulting in Position = 4096 after the cal-

measuring the complete duty cycle as shown above. Figure 11. PWM Output Signal

8.2.1 Changing the PWM Frequency

8.3 Analog Output

is proportional to the angle: 0º= 0V; 360º = VDD5V. Using this method, the AS5145 can be used as direct replacement of potentiometers. Figure 12. Figure 11: Simple 2nd Order Passive RC Low Pass Filter Figure 11 shows an example of a simple passive low pass filter to generate the analog output. ripple, but will also slow down the response time. Table 11. PWM Signal Parameters (Default mode) Table 12. PWM Signal Parameters with Half Frequency (OTP option)

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9 Application Information

The benefits of AS5145 are as follows: „ Complete system-on-chip „ Flexible system solution provides absolute and PWM outputs simultaneously „ Ideal for applications in harsh environments due to contactless position sensing „ No calibration required „ No temperature compensation necessary

9.1 Programming the AS5145

After power-on, programming the AS5145 is enabled with the rising edge of CSn with PDIO = high and CLK = low. The AS5145 programming is a one-time-programming (OTP) method, based on poly silicon fuses. The advantage of this method is that a programming voltage of only 3.3V to 3.6V is required for programming (either with 3.3V or 5V supply). The OTP consists of 52 bits, of which 21 bits are available for user programming. The remaining 31 bits contain factory settings and a unique chip identifier (Chip-ID). A single OTP cell can be programmed only once. Per default, the cell is “0”; a programmed cell will contain a “1”. While it is not possible to reset a programmed bit from “1” to “0”, multiple OTP writes are possible, as long as only unprogrammed “0”-bits are programmed to “1”. Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command at any time. This setting will be cleared and overwritten with the hard programmed OTP settings at each power-up sequence or by a LOAD operation. Use application note AN514X_10 to get more information about the programming options. The OTP memory can be accessed in the following ways: „ Load Operation: The Load operation reads the OTP fuses and loads the contents into the OTP register. A Load operation is automatically executed after each power-on-reset. „ Write Operation: The Write operation allows a temporary modification of the OTP register. It does not program the OTP. This operation can be invoked multiple times and will remain set while the chip is supplied with power and while the OTP register is not modified with another Write or Load operation. „ Read Operation: The Read operation reads the contents of the OTP register, for example to verify a Write command or to read the OTP memory after a Load command. „ Program Operation: The Program operation writes the contents of the OTP register permanently into the OTP ROM. „ Analog Readback Operation: The Analog Readback operation allows a quantifiable verification of the programming. For each pro- grammed or unprogrammed bit, there is a representative analog value (in essence, a resistor value) that is read to verify whether a bit has been successfully programmed or not.

9.1.1 Zero Position Programming

Zero position programming is an OTP option that simplifies assembly of a system, as the magnet does not need to be manually adjusted to the mechanical zero position. Once the assembly is completed, the mechanical and electrical zero positions can be matched by software. Any position within a full turn can be defined as the permanent new zero position. For zero position programming, the magnet is turned to the mechanical zero position (e.g. the “off”-position of a rotary switch) and the actual angular value is read. This value is written into the OTP register bits Z35:Z46 (see Figure 13). Note: The zero position value may also be modified before programming, e.g. to program an electrical zero position that is 180º (half turn) from the mechanical zero position, just add 2048 to the value read at the mechanical zero position and program the new value into the OTP register.

9.1.2 OTP Memory Assignment

9.1.3 User Selectable Settings

  • Output Md0: Setting this bit enables sync- or 10bit incrememantal mode (see Table 10).
  • Output Md1: Setting this bit enables sync- or 12bit incrememantal mode (see Table 10).

Table 13. OTP Bit Assignment

51 PWMhalfEN_Index width PMW frequency Index pulse width

50 MagCompEn Alarm mode (programmed by

48 Output Md0 Default, 10 bit inc, 12 bit inc

35 Z11

34 CCW Direction

33 RA0

29 RA4

28 FS 0

27 FS 1

26 FS 2

25 FS 3

24 FS 4

23 FS 5

20 FS 8

19 FS 9

18 FS 10

17 ChipID0

16 ChipID1

0 ChipID17

9.1.4 OTP Default Setting

9.1.5 Redundancy

an address RA(4:0) one bit can be selected and programmed. Table 14. Redundancy Addressing

9.1.6 Redundant Programming Option

9.1.7 OTP Register Entry and Exit Condition

Figure 13. OTP Access Timing Diagram and exit procedure, using the CSn, PDIO and CLK signals as shown in Figure 13. Figure 14. OTP Programming Connection

9.2 Alignment Mode

The alignment mode simplifies centering the magnet over the center of the chip to gain maximum accuracy. magnet is properly aligned, when the difference between highest and lowest value over one full turn is at a minimum. Under normal conditions, a properly aligned magnet will result in a reading of less than 128 over a full turn. full 360º turn of the magnet. the difference between highest and lowest value over one full turn is at a minimum. Figure 15. Enabling the Alignment Mode Figure 16. Exiting Alignment Mode internal supply voltage is always taken from the output of the LDO, meaning that the internal blocks are always operating at 3.3V. For 3.3V operation, the LDO must be bypassed by connecting VDD3V3 with VDD5V (see Figure 17). supposed to be placed close to the supply pin (see Figure 17) with recommended 2.2µF). Note: The VDD3V3 output is intended for internal use only It must not be loaded with an external load. The output voltage of the digital interface I/O’s corresponds to the voltage at pin VDD5V, as the I/O buffers are supplied from this pin.

Figure 17. Connections for 5V / 3.3V Supply Voltages A buffer capacitor of 100nF is recommended in both cases close to pin VDD 5V. Note that pin VDD 3V3 must always be buffered by a capacitor.

9.4 Selecting Proper Magnet

recommended. The magnetic field strength perpendicular to the die surface has to be in the range of ±45mT…±75mT (peak). radius of 1.1mm (R1), should be in the range of ±45mT…±75mT (see Figure 18).

Figure 18. Typical Magnet (6x3mm) and Magnetic Field Distribution

9.4.1 Physical Placement of the Magnet

Figure 19. Defined Chip Center and Magnet Displacement Radius

9.4.2 Magnet Placement

stays within the defined limits. MagINCn (pin 1) and MagDECn (pin 2), (see Table 1). Figure 20. Vertical Placement of the Magnet

9.5 Simulation Modeling

Figure 21. Arrangement of Hall Sensor Array on Chip (principle) orthogonally related components of the magnetic fields are sampled differentially. vector of the magnetic field.

www.austriamicrosystems.com/AS5145 Revision 1.10 27 - 36 AS5145 Data Sheet - Application Information The angular displacement (Q) of the magnetic source with reference to the Hall sensor array may then be modelled by: Θ = arctan ± 0.5º (EQ 3) The ±0.5º angular error assumes a magnet optimally aligned over the center of the die and is a result of gain mismatch errors of the AS5145. Placement tolerances of the die within the package are ±0.235mm in X and Y direction, using a reference point of the edge of pin #1 (see Figure 21). In order to neglect the influence of external disturbing magnetic fields, a robust differential sampling and ratio metric calculation algorithm has been implemented. The differential sampling of the sine and cosine vectors removes any common mode error due to DC components introduced by the magnetic source itself or external disturbing magnetic fields. A ratio metric division of the sine and cosine vectors removes the need for an accurate absolute magnitude of the magnetic field and thus accurate Z-axis alignment of the magnetic source. The recommended differential input range of the magnetic field strength (B(X1-X2), B(Y1-Y2)) is ±75mT at the surface of the die. In addition to this range, an additional offset of ±5mT, caused by unwanted external stray fields is allowed. The chip will continue to operate, but with degraded output linearity, if the signal field strength is outside the recommended range. Too strong magnetic fields will introduce errors due to saturation effects in the internal preamplifiers. Too weak magnetic fields will introduce errors due to noise becoming more dominant.

9.6 Failure Diagnostics

The AS5145 also offers several diagnostic and failure detection features:

9.6.1 Magnetic Field Strength Diagnosis

By software: the MagINC and MagDEC status bits will both be high when the magnetic field is out of range. By hardware: Pins #1 (MagINCn) and #2 (MagDECn) are open-drain outputs and will both be turned on (= low with external pull-up resistor) when the magnetic field is out of range. If only one of the outputs are low, the magnet is either moving towards the chip (MagINCn) or away from the chip (MagDECn).

9.6.2 Power Supply Failure Detection

By software: If the power supply to the AS5145 is interrupted, the digital data read by the SSI will be all “0”s. Data is only valid, when bit OCF is high, hence a data stream with all “0”s is invalid. To ensure adequate low levels in the failure case, a pull-down resistor (~10kΩ) should be added between pin DIO and VSS at the receiving side. By hardware: The MagINCn and MagDECn pins are open drain outputs and require external pull-up resistors. In normal operation, these pins are high ohmic and the outputs are high (see Table 9). In a failure case, either when the magnetic field is out of range of the power supply is missing, these outputs will become low. To ensure adequate low levels in case of a broken power supply to the AS5145, the pull-up resistors (~10kΩ) from each pin must be connected to the positive supply at pin 16 (VDD5V). By hardware: PWM output: The PWM output is a constant stream of pulses with 1kHz repetition frequency. In case of power loss, these pulses are missing.

9.7 Angular Output Tolerances

9.7.1 Accuracy

Accuracy is defined as the error between measured angle and actual angle. It is influenced by several factors: - The non-linearity of the analog-digital converters - Internal gain and mismatch errors - Non-linearity due to misalignment of the magnet As a sum of all these errors, the accuracy with centered magnet = (Errmax – Errmin)/2 is specified as better than ±0.5 degrees @ 25ºC (see Figure 23). Misalignment of the magnet further reduces the accuracy. Figure 22 shows an example of a 3D-graph displaying non-linearity over XY- misalignment. The center of the square XY-area corresponds to a centered magnet (see dot in the center of the graph). The X- and Y- axis extends to a misalignment of ±1mm in both directions. The total misalignment area of the graph covers a square of 2x2mm (79x79mil) with a step size of 100µm. For each misalignment step, the measurement as shown in Figure 23 is repeated and the accuracy (Errmax – Errmin)/2 (e.g. 0.25º in Figure 23) is entered as the Z-axis in the 3D-graph. Y1 Y2–()

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9.7.2 Transition Noise

Transition noise is defined as the jitter in the transition between two steps. Due to the nature of the measurement principle (Hall sensors + Preamplifier + ADC), there is always a certain degree of noise involved. This transition noise voltage results in an angular transition noise at the outputs. It is specified as 0.06 degrees rms (1 sigma)x1 in fast mode (pin MODE = high) and 0.03 degrees rms (1 sigma)x1 in slow mode (pin MODE = low or open). This is the repeatability of an indicated angle at a given mechanical position. The transition noise has different implications on the type of output that is used: „ Absolute output; SSI interface: The transition noise of the absolute output can be reduced by the user by implementing averaging of read- „ PWM interface: If the PWM interface is used as an analog output by adding a low pass filter, the transition noise can be reduced by lower- ing the cutoff frequency of the filter. If the PWM interface is used as a digital interface with a counter at the receiving side, the transition noise may again be reduced by averaging of readings. „ Incremental mode: In incremental mode, the transition noise influences the period, width and phase shift of the output signals A, B and Index. However, the algorithm used to generate the incremental outputs guarantees no missing or additional pulses even at high speeds (up to 30.000 rpm and higher). Note: Statistically, 1 sigma represents 68.27% of readings and 3 sigma represents 99.73% of readings.

9.7.3 High Speed Operation

„ Sampling Rate: The AS5145 samples the angular value at a rate of 2.61k (slow mode) or 10.42k (fast mode, selectable by pin MODE) samples per second. Consequently, the absolute outputs are updated each 384µs (96µs in fast mode). At a stationary position of the mag- net, the sampling rate creates no additional error. „ Absolute Mode: At a sampling rate of 2.6kHz/10.4kHz, the number of samples (n) per turn for a magnet rotating at high speed can be cal- culated by nslowmode = (EQ 4) nfastmode = (EQ 5) The upper speed limit in slow mode is ~6.000rpm and ~30.000rpm in fast mode. The only restriction at high speed is that there will be fewer samples per revolution as the speed increases (see Table 7). Regardless of the rotational speed, the absolute angular value is always sam- pled at the highest resolution of 12 bit. „ Incremental Mode: Incremental encoders are usually required to produce no missing pulses up to several thousand rpm’s. Therefore, the AS5145 has a built-in interpolator, which ensures that there are no missing pulses at the incremental outputs for rotational speeds of up to 30,000 rpm, even at the highest resolution of 12 bits (4096 pulses per revolution).

9.7.4 Propagation Delays

The propagation delay is the delay between the time that the sample is taken until it is converted and available as angular data. This delay is 96µs in fast mode and 384µs in slow mode. Using the SSI interface for absolute data transmission, an additional delay must be considered, caused by the asynchronous sampling (0 … 1/ fsample) and the time it takes the external control unit to read and process the angular data from the chip (maximum clock rate = 1MHz, number of bits per reading = 18). Angular Error Caused by Propagation Delay. A rotating magnet will cause an angular error caused by the output propagation delay. This error increases linearly with speed: esampling = rpm * 6 * prop.delay (EQ 6) Where: esampling = angular error [º] rpm = rotating speed [rpm] prop.delay = propagation delay [seconds] Note: Since the propagation delay is known, it can be automatically compensated by the control unit processing the data from the AS5145.

9.7.5 Internal Timing Tolerance

  • Absolute output; SSI interface: A new angular value is updated every 96µs (typ) in fast mode and every 384µs (typ) in slow mod e.

9.7.6 Temperature

AS5145 operates with magnetic field strengths from ±45…±75mT. is from -40º to +125º = 165K.The magnetic field change is: 165 x -0.12% = -19.8%, which corresponds to 75mT at -40ºC and 60mT at 125ºC. The AS5145 can compensate for this temperature related field strength change automatically, no user adjustment is required.

9.7.7 Accuracy over Temperature

increase to less then or equal to ±0.9º due to increasing noise at high temperatures. influence however can be cancelled by measuring the complete PWM duty cycle instead of just the PWM pulse.

9.8 AS5145 Differences to AS5045

Table 15. Difference Between AS5145 and AS5045 MODE_Index pin, switch between fast and slow mode. fast mode is setup in this case.

The device is available in SSOP 16 (5.3mm x 6.2mm). Figure 24. Package Drawings Table 16. Package Dimensions

10.1 Recommended PCB Footprint

Figure 25. PCB Footprint Table 17. Recommended Footprint Data

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Revision History

Table 18. Revision History Changed the temperature to 150ºC across the datasheet.

1.2 August 24, 2008 rfu

Made changes to Incremental Mode on page 14. Removed quadrature from Figure 6. Inserted Incremental Output Hysteresis on page 15 and Figure . Modified the typ value of all in Table 11.

1.3 August 27, 2008 rfu

on page 17 and also update Table 6 for the same. 1.6 Updated Incremental Mode on page 14 with new information.

1.7 August 12, 2009 apg Added a note to the ordering information

1.8 Sep 29, 2009 rfu Updated Figure 13

1.9 Nov 05, 2009

1.10 Dec 04, 2009 Updated section Internal Timing Tolerance (page 30)

The devices are available as the standard products shown in Table 19. Note: All products are RoHS compliant and Pb-free. Table 19. Ordering Information1

  1. The pre-programmed devices AS5145A-HSSU an d AS5145B-HSSU are available on request.

www.austriamicrosystems.com/AS5145 Revision 1.10 36 - 36 AS5145 Data Sheet - Copyrights Copyrights Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact