AS5130_09 AMSCO | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 40
Technical content
Datasheet sections
- 1 General Description
- 2 Key Features
- 3 Applications
- 4 Pin Assignments
- 5 Absolute Maximum Ratings
- 6 Electrical Characteristics
- 7 Detailed Description
- 8 Application Information
8 Bit Programmable Magnetic Rotary Encoder
1 General Description
high reliability due to non-contact sensing. Figure 1. Block Diagram
2 Key Features
3 Applications
replacement of Potentiometers.
www.austriamicrosystems.com Revision 1.09 3 - 40 AS5130 Data Sheet - Applications
4 Pin Assignments
Figure 2. Pin Assignments (Top View) Table 1. Pin Descriptions SINP 4 Used for factory testing. For normal operation it must be left unconnected. SINN 5 Used for factory testing. For normal operation it must be left unconnected. COSP 6 Used for factory testing. For normal operation it must be left unconnected. COSN 7 Used for factory testing. For normal operation it must be left unconnected. Test Coil 8 Test pin. Must be left unconnected. DCLK 9 Clock Source for SSI communication. Schmitt trigger input. CS 10 Chip Select for SSI. Active high. Schmitt trigger input. DIO 11 Data input / output for SSI communication. AVDD 12 Positive Supply Voltage 5V. C1 13 Test mode selector. For normal operation it must be connected to VSS. PWM 15 Pulse Width Modulation output. 0.5us width step per LSB.
5 Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings Solid State Surface Mount Devices”.
6 Electrical Characteristics
TAMB = -40 to +125ºC, unless otherwise noted. Table 3. Electrical Characteristics
Table 3. Electrical Characteristics (Continued)
TAMB = -40 to 125ºC, unless otherwise noted. ±38%. The AGC output voltage is an indicator for the magnetic field. Table 4. Timing Characteristics
30 CLK/2 ns
Table 5. Magnetic Input Range
7 Detailed Description
operation modes. The data transfer in all cases is done via the DIO port. Figure 3. Standard SSI Serial Data Interface
www.austriamicrosystems.com Revision 1.09 13 - 40 AS5130 Data Sheet - Detailed Description This means that the PWM pulse width is (position + 1) LSB, where position is 0….255. The tolerance of the absolute pulse width and frequency can be eliminated by calculating the angle with the duty cycle rather than with the absolute pulse width: angle [ 8 - bit ] = -1 (EQ 1) results in an 8-bit value from 00H to FFH, angle [ º ] = (EQ 2) results in a degree value from 0º ...358.6º Note: The absolute frequency tolerance is eliminated by dividing tON by (tON+TOFF), as the change of the absolute timing effects both TON and TOFF in the same way. Analog Output The AS5130 can generate a ratiometric analog output voltage by low-pass filtering the PWM output. Figure 8 shows a simple passive 2nd order low pass filter as an example. In order to minimize the ripple on the analog output, the cut-off frequency of the low pass filter should be well below the PWM base frequency. Position Angle High t_high Low t_low Duty-Cycle 0 0º 1 0,556 256 142,3 0.39% 127 178.59 128 71,15µs 129 71,7µs 49.4% 128 180º 129 71,7µs 128 71,15µs 50.2% 255 358.59º 256 142,3µs 1 0,556µs 99.6% PWM out 0.556µs 142.3µs 71.7µs 71.15µs 0.556µs 142.3µs ton toff 0 128 255 Position 257 tON 360 tON ⎛⎞ 1–
Figure 8. Ratiometric Analog Output lines) are available for differential signal transmission. as short as possible, longer lines should be shielded in order to achieve best noise performance. controller. The DC bias voltage is 2.25 V. lead to less accurate results.
Figure 9. Sine and Cosine Outputs for External Angle Calculation inverts the voltage output of Hall element X in the channels. Table 8. SSI in Normal Mode
23 WRITE
22 WD2COS 10110 write xen_
21 SET TEST
19 HYST_RST 10011 write rst_ot
18 WD2SIN 10010 write xen_
17 WRITE
7 READ CUST 00111 read wlsb_
6 RD2COS 00110 read xen_
4 RD_BOTH 00100 read Multiturn <7:0> angle <7:0>
3 STORE REF 00011 read store
2 RD2SIN 00010 read xen_
1 RD_MULTI 00001 read lock agc <5:0> Multiturn <7:0> parit
0 RD_ANGLE 00000 read lock agc <5:0> angle <7:0> parit
SET TEST CFG 1: gen_rst HI triggers a digital reset. WRITE CUST: With “wlsb_x” the threshold level for generation of a WAKE pulse is set (only important in polling mode). The initial value is 4 LSB. No value lower than 4 LSB can be set. The maximum value is 127 LSB. consecutive equal signals the output is changed. “rst_multi” resets the multi turn counter to 0. READ CUST: With this command “wlsb_x” and “gain_x” can be read out. size, the parity bit is not available in this command. the supply voltage is OK (vdd_ok) and a check bit, if the register was written. ADC and “parity” an even parity checksum. Table 9. SSI in Extended Mode
31 WRITE_
25 PROG_
number of bits, which allows the customer to overwrite one of the customer OTP bits <0:11>. PROG_OTP: Programming of the OTP register. Only Bits <0:15> can be programmed by the customer. RD_OTP: Read out the content of the OTP register. Data written by WRITE_OTP and PROG_OTP is read out. for a verification of the fuse process. No data is available at the SSI. bits 16 to 45 are used for AMS factory trimming and cannot be overwritten. Figure 10. OTP Programming Connection
9 RD_OTP
www.austriamicrosystems.com Revision 1.09 19 - 40 AS5130 Data Sheet - Detailed Description If a bit is not fused properly (analog readout levels violated), the redundancy bits can be used as shown in the table below. Only one single bit can be overwritten with a logic HI. An improper fusing cannot be made undone. Multi Turn Counter An 8-bit register is used for counting the magnet’s revolutions. With each zero transition in any direction, the output of a special counter is incremented or decremented. The initial value after reset is 0 LSB. The multi turn value is encoded as complement on two. Clockwise rotation gives increasing angle values and positive turn count. Counter clockwise rotation exhibits decreasing angle values and a negative turn count respectively. The counter output can be reset by using command 19 – HYST_RST. It is immediately reset by the rising clock edge of this bit. Any zero crossing between the clock edge and the next counter readout changes the counter value. AS5130 Status Indicators Lock Status Bit The Lock signal indicates whether the angle information is valid (ADC locked, Lock = high) or invalid (ADC unlocked, Lock = low). To determine a valid angular signal at best performance, the following indicators should be set: Lock = 1 AGC = >00H and < 2FH Note: The angle signal may also be valid (Lock = 1), when the AGC is out of range (00H or 2FH), but the accuracy of the AS5130 may be reduced due to the out of range condition of the magnetic field strength. <15:12> replaced bit <15:12> replaced bit 0000 none 1000 7 0001 0 1001 8 0010 1 1010 9 0011 2 1011 10 0100 3 1100 11 0101 4 1101 none 0110 5 1110 none 0111 6 1111 none Bit Code Decimal Value 01111111 127 --- --- 00000011 +3 00000010 +2 00000001 +1 00000000 0 11111111 -1 11111110 -2 11111101 -3 --- --- 10000000 -128
www.austriamicrosystems.com Revision 1.09 20 - 40 AS5130 Data Sheet - Detailed Description Magnetic Field Strength Indicators The AS5130 is not only able to sense the angle of a rotating magnet, it can also measure the magnetic field strength (and hence the vertical distance) of the magnet. This additional feature can be used for several purposes: - as a safety feature by constantly monitoring the presence and proper vertical distance of the magnet - as a state-of-health indicator, e.g. for a power-up self test - as a pushbutton feature for rotate-and-push types of manual input devices The magnetic field strength information is available in two forms – Magnetic field strength hardware indicator and Magnetic field strength software indicator. Magnetic Field Strength Hardware Indicator Pin CAO (#1) will be low, when the magnetic field is too weak. The switching limit is determined by the value of the AGC. If the AGC value is <3FH , the CAO output will be high (green range), If the AGC is at its upper limit (3FH), the CAO output will be low (red range). Magnetic Field Strength Software Indicator D13:D7 in the serial data that is obtained by command READ ANGLE (see Table 8) contains the 6-bit AGC information. The AGC is an automatic gain control that adjusts the internal signal amplitude obtained from the Hall elements to a constant level. If the magnetic field is weak, e.g. with a large vertical gap between magnet and IC, with a weak magnet or at elevated temperatures of the magnet, the AGC value will be high. Likewise, the AGC value will be lower when the magnet is closer to the IC, when strong magnets are used and at low temperatures. The best performance of the AS5130 will be achieved when operating within the AGC range. It will still be operational outside the AGC range, but with reduced performance especially with a weak magnetic field due to increased noise. Factors Influencing the AGC Value In practical use, the AGC value will depend on several factors: The initial strength of the magnet. Aging magnets may show a reducing magnetic field over time which results in an increase of the AGC value. The effect of this phenomenon is relatively small and can easily be compensated by the AGC. The vertical distance of the magnet. Depending on the mechanical setup and assembly tolerances, there will always be some variation of the vertical distance between magnet and IC over the lifetime of the application using the AS5130. Again, vertical distance variations can be compensated by the AGC. The temperature and material of the magnet. The recommended magnet for the AS5130 is a diametrically mag- netized 6mm diameter magnet. Other magnets may also be used as long as they can maintain to operate the AS5130 within the AGC range. Every magnet has a temperature dependence of the magnetic field strength. The temperature coefficient of a magnet depends on the used material. At elevated temperatures, the magnetic field strength of a magnet is reduced, resulting in an increase of the AGC value. At low temperatures, the magnetic field strength is increased, resulting in a decrease of the AGC value. The variation of magnetic field strength over tem- perature is automatically compensated by the AGC. OTP Sensitivity Adjustment To obtain best performance and tolerance against temperature or vertical distance fluctuations, the AGC value at normal operating temperature should be in the middle between minimum and maximum, hence it should be around 32 (20H). To facilitate the “vertical centering” of the magnet+IC assembly, the sensitivity of the AS5130 can be adjusted in the OTP register in 8 steps (see Table 9). The OTP sensitivity setting corresponds to the customer register setting gain <2:0>. “Pushbutton” Feature Using the magnetic field strength software and hardware indicators described above, the AS5130 provides a useful method of detecting both rotation and vertical distance simultaneously. This is especially useful in applications implementing a rotate-and-push type of human interface (e.g. in panel knobs and switches). The CAO output is low, when the magnetic field is below the low limit (weak or no magnet) and high when the magnetic field is above the low limit (in-range or strong magnet). A finer detection of a vertical distance change, for example when only short vertical strokes are made by the pushbutton, is achieved by memorizing the AGC value in normal operation and triggering on a change from that nominal the AGC value to detect a vertical movement.
Figure 13. Magnetic Field Strength Indicator requires only one cycle (1.15µs) to track the moving magnet. The AS5130 can operate in locked mode at rotational speeds up to 30,000 rpm. with speed. The main factors that contribute to the propagation delay are discussed in detail further in this document. AS5130 has a cutoff frequency of typ. 23.8kHz and the overall propagation delay in the analog signal path is typ.
up to 6MHz, a complete set of data (21bits) can be read in >3.5µs. If only the SIN-/COS-outputs are used, the propagation delay is the analog signal path delay only (typ. 15.6µs). Low Power Mode: reduced current consumption, very fast start-up. Ideal for short sampling intervals (<3ms). up than Polling Mode. Ideal for sampling intervals 200ms. Polling Mode: for reduction of the average power consumption; especially suited for battery powered applications. LOCK- Flag is 1 (see Table 8). Table 10. Examples of the Overall Position Error caused by Speed (includes both propagation delay and filter delay)
Figure 14. Low Power Mode and Ultra Low Power Mode Connection large and Rx should be small.
www.austriamicrosystems.com Revision 1.09 25 - 40 AS5130 Data Sheet - Detailed Description The procedure is as follows: 1. Initial startup: The circuit starts up with invalid trim values, which are read back from the storage registers; the command rst_otp (command 19 – 10011) must be sent to read out valid trim values from the OTP. 2. These values are copied to the storage registers if OTP<8> (Wake enable) is set (must be set for polling mode). 3. The values of AGC counter, actual angle, multi turn counter, hysteresis setting, wake threshold and gain set- ting are continuously updated in the storage registers. 4. The actual angle is stored as a reference by sending command STORE REF (command 3 – 00011). without this reference angle, a WAKE is generated at every startup. 5. The update of the storage registers is stopped if VDD drops below 4.45V and then the information is stored (DVDD) at the next startup (VDD on), the values are read back from the storage registers and the measured angle is compared with the stored reference angle; if the difference between both exceeds the threshold, a WAKE pulse is generated. Figure 18 shows the behavior of the wake up signal. The wake up signal will be low for twakeup = 10us. After that, the wake up signal will go to tri-state condition. In case of an angle comparison with a result below the threshold, the signal will remain in tri-state condition. After switching on AVDD, the system needs max. 250us to generate an angle with maximum accuracy. A WAKE signal cannot be expected until the end of this period. WAKE Interface An open drain NMOS structure is used in the WAKE pad. In order to generate a clear output signal level, a pull up resistor is required. The pad can drive 4mA. VDD on (fast) store_ok POR (40us... 150us) LO LO HI HI reset & reset_storage re set digital core only Retrieve values from storage registersWAKE (26 clk periods) Wait (162 clks - 86us ... 95us) Compare modeWAKE_ON Normal mode store_ok ? Copy to Storage Normal mode OTP readout (46bit - 140us ... 400us) true true false false WAKE (20 clk periods) command rst_otp OTP readout (OTP <8> = HI | measured – stored| > threshold αα α
8 Application Information
programming, such as a microcontroller. Figure 19. Programming via SSI Serial Interface VDD, VSS and the PWM output. The circle over the center of the chip represents the diametrically polarized magnet. drive an external LED or to detect an alert signal.
Figure 22. Polling Mode turned off. Special registers will be buffered by the low power supply and will keep the actual settings. After a ton of min. necessarily linked together. A high resolution encoder may not necessarily be highly accurate as well.
value. This improves the accuracy of the encoder and enhances the tolerance for the vertical distance of the magnet. Figure 25. Typical Curves for Vertical Distance versus ACG Value on Several Untrimmed Samples far away (or missing) or if the magnetic field is too weak, the AGC will be reading 63 (3FH). temperatures, the magnetic field will be weaker and the AGC value will increase. rotation axis is sinusoidal with a peak amplitude of 20..80mT (see Figure 26).
Figure 26. Vertical Magnetic Fields of a Rotating Magnet indicated, when the AGC is at the limits (AGC= 0 : field too strong; AGC=63=(3FH): field too weak or missing magnet).
www.austriamicrosystems.com Revision 1.09 36 - 40 AS5130 Data Sheet - Application Information described above may be re-run at defined X-and Y- misplacements of the magnet to determine the maximum acceptable lateral displacement range. It is recommended to disable the AGC for both these tests (see Analog Sin/ Cos Outputs with External Interpolator on page 14). Note: For preferred magnet suppliers, please refer to the austriamicrosystems website (Rotary Encoder section).
9 Package Drawings and Markings
The device is available in a 16-Lead Shrink Small Outline Package. Figure 30. SSOP-16 Package Drawings Table 11. SSOP-16 package dimensions
Figure 31. PCB Footprint Table 12. Recommended Footprint Data
The devices are available as the standard products shown in Table 13. Table 13. Ordering Information
www.austriamicrosystems.com Revision 1.09 40 - 40 AS5130 Data Sheet - Ordering Information Copyrights Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact