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ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 1 AS3415/AS3435 Integrated Active Noise Cancelling Solution with Bypass Feature The AS3415/35 are speaker drivers with Ambient Noise Cancelling function for headsets, headphones or ear pieces. They are intended to improve quality of e.g. music listening, a phone conversation etc. by reducing background ambient noise. The fully analog implementation allows the lowest power consumption, lowest system BOM cost and most natural received voice enhancement otherwise difficult to achieve with DSP implementations. The device is designed to be easily applied to existing architectures. An internal OTP-ROM can be optionally used to store the microphones gain calibration settings. The AS3415/35 can be used in different configurations for best trade-off of noise cancellation, required filter ing functions and mechanical designs. The simpler feed-forward topology is used to effectively reduce frequencies typically up to 2-3 kHz. The feed-back topology with either 1 or 2 filtering stages has its strengths especially at very low frequencies. The typical bandwidth for a feed-back system is from 20Hz up to 1 kHz which is lower than the feed-forward systems. The filter loop for both systems is determined by measurements, for each specif ic headset individually, and depends very much on mechanical designs. The gain and phase compensation filter network is implemented with cheap resistors and capacitors for lowest system costs. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS3415/35, Integrated Active Noise Cancelling Solution with Bypass Feature are listed below: Figure 1: Added Value of Using AS3415/35 Benefits Features All ANC Topologies Feed Forward, Feed Back and Hybrid No mechanical audio bypass switch Integrated depletion mode transistors Music EQ functionality Ultra flexible low power EQ circuit General Description
AS3415/AS3435 – 2 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] General Description
Applications
The devices are ideal for:
- Ear pieces
- H e a d s e t s
- Hands-Free Kits
- Mobile Phones
- Voice Communicating Devices Longest play time 10mW @1.5V stereo ANC; <1μA quiescent Highest audio quality 2x24mW, 0.1% THD+N @ 32 Ω, 1.5V supply Smallest package Two different packages available:
- AS3415 QFN32 [5x5mm] 0.5mm pitch
- AS3435 QFN36 [5x5mm] 0.4mm pitch Low battery indication LED driver with selectable driving strength Different control interface options Push Button -, Slide switch- or I²C control interface Highly innovative production trimming interface OTP production trimming via audio interface Active hearing mode with or without ANC and optional voice EQ Monitor mode function Benefits Features
AS3415/AS3435 – 4 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Pin Assignment The AS3415 and AS3435 pin assignments are described below. Figure 4: Pin Assignments Pin Assignment Warning: Exposed pad must be connected to VNEG. Exposed pad must NOT be unconnected!
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 5 Pin Description The following figure shows the pin description for AS3415/35. Figure 5: Pin Description Pin Name Pin Number Pin Type Description AS3435 AS3415 AGND 1 32 ANA OUT Analog reference ground. Do not connect this pin to power or digital ground plane. QLINL 2 1 ANA OUT Line input EQ ga in stage output left channel. LINL 3 2 ANA IN Line input EQ left channel. TRSDA 4 3 ANA IN Clock input for production trimming. Can be connected to LINL pin to enable production trimming via 3.5mm audio jack. TRSCL 5 4 ANA IN Data input for production trimming. Can be connected to LINR pin to enable production trimming via 3.5mm audio jack. LINR 6 5 ANA IN Line input EQ right channel. QLINR 7 6 ANA IN Line input EQ ga in stage output right channel. ANC / CSDA 8 7 DIG IN Serial interface data for I²C interface and ANC control to enable/disable ANC. MODE / CSCL 9 8 DIG IN Serial Interface Clock for I²C interface and control pin for power up/down and Monitor mode. MICACL 10 9 ANA OUT Microphone preamplifier AC coupling ground terminal. This pin requires a 10μF capacitor connected to AGND pin. MICL 11 10 ANA IN ANC microp hone input left channel. ILED 12 11 ANA IN Current sink input for on-indication LED. MICS 13 12 SUP OUT Microphone Supply output. This pin needs an output blocking capacitor with 10μF. MICR 14 13 ANA IN ANC microphone preamplifier input right channel. MICACR 15 14 ANA OUT Microphone preamplifier AC coupling ground terminal. This pin requires a 10μF capacitor connected to AGND pin. QMICR 16 15 ANA OUT ANC microphone preamplifier output right channel. IOP1R 17 16 ANA IN ANC filter OpAmp1 input right channel. QOP1R 18 17 ANA OUT ANC filter OpAmp1 output right channel. Pin Description
AS3415/AS3435 – 6 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Pin Description IOP2R 19 - ANA IN ANC Filter OpAmp2 input right channel. QOP2R 20 - ANA OUT ANC filter OpAmp2 output right channel. BPL 21 18 ANA IN Left audio bypass terminal input. HPL 22 19 ANA OUT Headphone amplifier output left channel MIXL 23 20 ANA IN Headphone amplifier external summation input terminal left channel. MIXR 24 21 ANA IN Headphone amplifier external summation input terminal right channel. HPR 25 22 ANA OUT Headphone amplifier output right channel BPR 26 23 ANA OUT Right audio bypass terminal input. VBAT 27 24 SUP IN Positive supply terminal of IC. CPP 28 25 ANA OUT VNEG charge pump flying capacitor positive terminal. GND 29 26 GND VNEG charge pump ground terminal. CPN 30 27 ANA OUT VNEG charge pump flying capacitor negative terminal. VNEG 31 28 SUP OUT VNEG charge pump output. This pin must be connected to exposed pad of QFN package. QOP2L 32 - ANA OUT ANC Filter OpAmp2 output left channel. IOP2L 33 - ANA IN ANC Filter OpAmp2 input left channel. QOP1L 34 29 ANA IN Filter OpAmp1 output left channel. IOP1L 35 30 ANA OUT Filter OpAmp1 input left channel. QMICL 36 31 SUP IN ANC microphone preamplifier output left channel. VNEG 37 33 SUP IN Exposed Pad: Must be connected to VNEG pin 31(AS3435) or 28(AS3415). Pin Name Pin Number Pin Type Description AS3435 AS3415
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 7 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Operating Conditions” is not im plied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 6: Absolute Maximum Ratings Parameter Min Max Units Comments Reference Ground Defined as in GND Supply terminals -0.5 2.0 V Applicable for pin VBAT Ground terminals -0.5 0.5 V Applicable for pin AGND Negative terminals -2.0 0.5 V Applicable for pins VNEG Charge Pump pins VNEG-0.5 V BAT+0.5 V Applicable for pins CPN and CPP Headphone pins VNEG-0.5 V BAT+0.5 V Applicable for pins HPR and HPL Analog pins VNEG-0.5 V BAT+0.5 V Applicable for pins LINL, LINR, MICL/R, HPR, HPL, QMICL/R, QLINL/R, IOPx, QOPx, CPP , CPN, TRSCL, TRSDA, MICACL, MICACR, MIXR, MIXL, BPL, BPR and ILED Control Pins V NEG-0.5 5V Applicable for pins MICS, ANC/CSDA, MODE/CSCL Other Pins VNEG-0.5 5 V Applicable for pin MICS Input Current (latch-up immunity) -100 100 mA Norm: JEDEC 17 Continuous Power Dissipation (TA = +70ºC) Continuous Power Dissipation - 200 mW PT(1) for QFN32/36 package Electrostatic Discharge Electrostatic Discharge HBM ± 2 kV Norm: JEDEC JESD22-A114C Absolute Maximum Ratings
AS3415/AS3435 – 8 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Absolute Maximum Ratings Note(s) and/or Footnote(s): 1. Depending on actual PCB layout and PCB used Temperature Ranges and Storage Conditions Junction Temperature +85 ºC Storage Temperature Range -55 +125 ºC Humidity non-condensing 5 85 % Moisture Sensitive Level 3 Represents a max. floor life time of 168h Package Body Temperature 260 ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020“Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices” . Parameter Min Max Units Comments
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 9
Electrical Characteristics
All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. VBAT = 1.0V to 1.8V, T A = -20ºC to +85ºC. Typical values are at VBAT = 1.5V, T A = +25ºC, unless otherwise specified. Figure 7: Symbol Parameter Conditions Min Typ Max Unit TA Ambient Temperature Range -20 +85 °C Supply Voltages GND Reference Ground 0 0 V V BAT Battery Supply Voltage Normal operation 1.0 1.8 V Two wire interface operation 1.4 1.8 V VNEG Charge Pump Voltage -1.8 -0.7 V VDELTA Difference of Ground Supplies GND, AGND To achieve good performance, the negative supply terminals should be connected to a low impedance ground plane. -0.1 0.1 V Other pins V MICS Microphone Supply Voltage MICS 0 3.7 V VANALOG Analog Pins MICACL, MICACR,LINR, LINL, MIXL, MIXR, HPR, HPL, QMICL, QMICR, QLINL, QLINR, IOPx, QOPx, BPL, BPR VNEG VBAT V VCONTROL Control Pins MODE/CSCL, ANC/CSDA VNEG 3.7 V VLED ILED current source ILED VNEG VBAT V VCP Charge Pump pins CPN, CPP VNEG VBAT V VNEG -0.3 or -1.8 VBAT +0.5 or 1.8 V VMIC Microphone Inputs MICL and MICR VNEG VBAT V Ileak Leakage current VBAT<0.8V 20 μA VBAT<0.6V 10 μA
AS3415/AS3435 – 10 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Block Power Requirements @ 1.5V VBAT IOFF Off mode current MODE pin low, device switched off 1 μA ISYS Reference supply current Bias generation, oscillator, POR 0.46 mA IVNEG VNEG Charge Pump 0.36 mA ILIN LineIn gain stage current No signal, stereo, normal mode 1.4 mA No signal, stereo, ECO mode 1 mA IMIC Mic gain stage current No signal, stereo, normal mode 1.5 mA No signal, stereo, ECO mode 1.1 mA IHP Headphone stage current No signal, normal mode 2.4 mA No signal, ECO mode 2 mA IMICS MICS charge pump current No load 400 μA IOP1 OP1 supply current OP1L and OP1R enabled, normal mode 1.4 mA OP1L and OP1R enabled, ECO mode 1 mA IOP2 OP2 supply current OP2L and OP2R enabled, normal mode 1.4 mA OP2L and OP2R enabled, ECO mode 1 mA Typical System Power Consumption PFF Typical power consumption feed forward application OP1L, OP1R enabled OP2L, OP2R disabled 500μA microphone load ILED disabled 13.5 mW P FF_ECO Typical power consumption feed forward application in ECO mode All blocks in ECO mode OP1L, OP1R enabled OP2L, OP2R disabled 500μA microphone load ILED disabled 10.5 mW P FB Typical power consumption feed forward application OP1L, OP1R enabled OP2L, OP2R enabled 500μA microphone load ILED disabled 15.5 mW P FB_ECO Typical power consumption feedback application in ECO mode All blocks in ECO mode OP1L, OP1R enabled OP2L, OP2R enabled 500μA microphone load ILED disabled 13 mW Symbol Parameter Conditions Min Typ Max Unit
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 11 Detailed Description This section provides a detail ed description of the device related components. Audio Line Input The chip features one stereo line input for music playback. Due to the fact that the line input gain stage operates as an inverting amplifier, with access to the ne gative input pin and the output pin, the gain can be freely configured. In monitor mode the line inputs can also be muted in order to interrupt the music playback and increase speech intelligibility. Besides setting the gain with a resistor network, it is also possible to do simple EQ functi ons for sound enhancement. The EQ function can also be used to compensate for low frequency bass losses in ANC headset with a feed-back topology. For feed-forward headsets it can be used for sound enhancement to compensate for example a lack of bass because of physical design constraints of a headset. Line Input Gain Setting The line input gain can be configured with two external resistors, R 1 and R 2, per channel as shown in Figure 8 . The gain can be calculated with the following formula: ...[dB] The resistors R 1 and R 2 should be in the range from 1k Ω to 100k Ω. If the application requires a gain of +6dB the resistor value can be calculated as follows: For this example, a resistor value for R 1 was defined as 10k Ω This +6dB calculation yields a value for R 2 of 20k Ω. Detailed Description ALine 20 R2 R2 R1 10 ALine ⋅ 10kΩ 10 ⋅ 20kΩ== =
AS3415/AS3435 – 12 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Figure 8: Stereo Line Input Stereo Line Input: Internal structure of the stereo line input preamplifier. High Pass EQ Function If there is a high pass function desi red in an application, to block very low frequencies that could harm the speaker, or eliminate little offset voltages a simple capacitor C HP could do this function. The implementation is shown in Figure 10 . The correct capacitor value for the desired cut-off frequency can be calculated with the following formula: A typical cut-off frequency in an audio application is 20Hz. The resistor value of R 1 in this example is 10k Ω. The result of the calculation is a capacitor with a value of 796nF. Because such a capacitor is not available on the market a capacitor close to the calculated value should be selected. This would be 750nF or 820nF. CHP CHP
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 15 Detailed Description Figure 12: Bass Boost Circuit Bass Boost Definition: This figure shows the circuit diagram for the line input bass boost EQ circuit. The component values for A L can be calculated with the following formula: ...[dB] The component values for A H can be calculated with the following formula: ...[dB] An example for a typical bass boost is 6dB gain at the low frequency. If we select for R 1 a value of 10k Ω we can calculate R2 as follows: In this example, the gain for the higher frequency should be 0dB.This allows us to calculate R3 as follows: The last component to be calculated for the example is capacitor C 1. This capacitor defines the cut-off frequency of the bass boost circuit. The desired gain level A cut-off at the cut-off frequency can be defined by the engineer together with the frequency. In this example, we select a cut-off frequency of 400Hz and a gain level of 5dB. Thus we get an attenuation of 1dB at a frequency of 400Hz. The necessary capacitor can be calculated with the following formula: AL AH R2 R3⋅ R2 10 AL R⋅ 1 10 10kΩ⋅ 20kΩ== = AH– R⋅ 1 R2⋅ –1 0 kΩ 20kΩ⋅⋅ 10kΩ⋅ 20kΩ–
AS3415/AS3435 – 16 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description The Spice simulation for the calculated resistor and capacitor values is shown in Figure 13 . The simulation shows exactly at 400Hz an attenuation of 1dB. Figure 13: Frequency Response Bass Boost Frequency Response Bass Boost: The diagram shows the Spice simulation result of the bass boost calculation example done in this chapter with C 1=6.2nF, R1=10k, R2=20kΩ and R3=20kΩ. 2 AB AB 2 R1 2 R3 200002 10 100002⋅– 2 100002 20000 20000+() 2 2 π 400 20000 2 200002 2 π 400⋅⋅ ⋅ ⋅–⋅⋅ ⋅ ⋅ ⋅ 10 100 1k 10k Frequency Response [dB] f [Hz]
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 17 Detailed Description Parameter VBAT=1.5V, T A= 25ºC, R 1=1kΩ, R 2=1kΩ unless otherwise specified Figure 14: Line Input Parameter Symbol Parameter Conditions Min Typ Max Unit VLIN Input Signal Level Gain=0dB 0.9* VBAT VPEAK SNR Signal to Noise Ratio 10kΩ load, Gain = 0dB, VBAT=1.8V, High Quality Mode 121 dB 10kΩ load, Gain = 0dB, VBAT=1.5V High Quality Mode 119 dB 10kΩ load, Gain = 0dB, VBAT=1.0V High Quality Mode 115 dB 10kΩ load, Gain = 0dB, VBAT=1.8V, ECO Mode 115 dB 10kΩ load, Gain = 0dB, VBAT=1.5V, ECO Mode 113 dB 10kΩ load, Gain = 0dB, VBAT=1.0V, ECO Mode 109 dB ILIN Block Current Consumption No load, Gain = 0dB, VBAT=1.8V, High Quality Mode 1.4 mA No load, Gain = 0dB, VBAT=1.5V, High Quality Mode 1.3 mA No load, Gain = 0dB, VBAT=1.0V, High Quality Mode 1.1 mA No load, Gain = 0dB, VBAT=1.8V, ECO Mode 1.1 mA No load, Gain = 0dB, VBAT=1.5V, ECO Mode 950 μA No load, Gain = 0dB, VBAT=1.0V, ECO Mode 700 μA VNOISE-A Input Referred Noise Floor A-Weighted High Quality Mode 900 nV ECO Mode 1.9 μV
AS3415/AS3435 – 20 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Microphone Inputs The AS3415/35 offers two low noise microphone inputs with full digital control and a dedica ted DC offset cancellation pin for each microphone input. In total each gain stage offers up to 63 gain steps of 0.5dB resulting in a gain range from 0dB to +31dB. The microphone gain is stored digitally during production, in OTP on the ANC chipset. Besides the standard microphone gain register for left and right channel, the chip also features two additional microphone gain registers for monitor mode. Thus, in monitor mode, a completely different gain setting for left and right microphone can be selected to implement voice filter functions to amplify the speech band for better intelligibility. Figure 19: Stereo Microphone Input Stereo Microphone Input: This diagram shows the internal structure of the stereo microphone preamplifier including the mute switch as well as the automatic gain control (AGC). To avoid unwanted start-up pop noise, a soft-start function is implemented for an automatic ga in ramping of the device. In case of an overload condition on the microphone input (e.g. high sound pressure level), an internal state machine reduces the microphone gain automatically. For some designs it might be useful to switch off this fe ature. Especially in feed-back systems very often infrasound can cause an overload condition of the microphone preamplifier which results in low frequency noise which can be avoided by disabling the AGC.
AS3415/AS3435 – 22 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Figure 21: Microphone Cut-Off Frequency Overview Microphone Cut-Off frequency overview: This table shows an overview of the different cut-off frequencies with CAC=10μF, CMIC= 2.2μF and RMICIN=22kΩ of the microphone preamplifier. In the cut-off frequency overview, capacitor C AC was defined as 10μF which results in a rather low cut-off frequency for best ANC filter design. If a different capacitor value is desired in the application, the following formula defines the transfer function of the high pass circuit of the microphone preamplifier: The simplified transfer function does not include the high pass filter defined by C MIC and RMICIN . With the recommended values of 2.2μF for C MIC and 22kΩ for R MICIN this filter can be neglected because of the very low cut-off frequency of 1.5Hz. The cut-off frequency for this filter can be calculated with the following formula: The simulated frequency resp onse for the microphone preamplifier with the recommended component values is shown in Figure 22 . Microphone Gain R1 R2 Fcut-off 0dB 22.2kΩ 0Ω 1.7Hz 3dB 15716Ω 6484Ω 1.9Hz 6dB 11126Ω 11074Ω 2.2Hz 9dB 7877Ω 14323Ω 2.7Hz 12dB 5576Ω 16623Ω 3.5Hz 15dB 3948Ω 18252Ω 4.5Hz 18dB 2795Ω 19405Ω 6.1Hz 21dB 1979Ω 20221Ω 8.4Hz 24dB 1400Ω 20800Ω 11.5Hz 27dB 992Ω 21208Ω 16.3Hz 30dB 702Ω 21498Ω 22.7Hz Filter Simulations: It is important when doing the ANC filter simulations to include all microphone filter components to incorporate the gain and phase influence of these components. A
4 CAC
π2 1+⋅⋅ ⋅ ⋅ fcut off–
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 23 Detailed Description Figure 22: Simulated Microphone Frequency Response In application with PCB space limi tations it is also possible to remove the capacitors C AC and connect MICACL and MICACR pins directly to A GND. In this configuration AC coupling of the QMICR and QMICL signals is recommended. Microphone Frequency Response: This graph shows the frequency response of the microphone preamplifier with different gain settings with C AC=10μF, CMIC=2.2μF and RMICIN=22kΩ. 10 100 1k 10k Frequency Response [dB] f [Hz] 0dB 6dB 12dB 18dB 24dB 30dB
AS3415/AS3435 – 24 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Parameter VBAT=1.5V, T A= 25ºC , C AC=10μF, C MIC=2.2μF and R MICIN =22kΩ unless otherwise specified. Figure 23: Microphone Parameter Symbol Parameter Conditions Min Typ Max Unit VMICIN0 Input Signal Level AMIC = 10dB 80 mVRMS VMICIN1A MIC = 20dB 40 mVRMS VMICIN2A MIC = 30dB 10 mVRMS SNR Signal to Noise Ratio 0dB gain, High quality mode, AGC off 115 dB 10dB gain, High quality mode, AGC off 108 dB 20dB gain, High quality mode, AGC off 98 dB 0dB gain, ECO mode, AGC off 113 dB 10dB gain, ECO mode, AGC off 105 dB 20dB gain, ECO mode, AGC off 96 dB V NOISE-A A-Weighted Output Noise Floor 0dB gain, 20Hz – 20kHz bandwidth, High quality 1.3 μV 10dB gain, 20Hz – 20kHz bandwidth, High quality 4.2 μV 20dB gain, 20Hz – 20kHz bandwidth, High quality 13 μV 0dB gain, 20Hz – 20kHz bandwidth, ECO mode 1.6 μV 10dB gain, 20Hz – 20kHz bandwidth, ECO mode 5.5 μV 20dB gain, 20Hz – 20kHz bandwidth, ECO mode 16.5 μV IMIC Block Current Consumption No load, normal mode 1.4 mA No load, ECO mode 1 mA AMIC Programmable Gain Discrete logarithmic gain steps 0 +31 dB Gain Step Size 0.5 dB Gain Step Precision 0.2 dB ΔAMIC Gain Ramp Rate VPEAK related to VBAT or VNEG 1 ms/step
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 25 Detailed Description Microphone Parameter: This table shows the detailed electrical characteristics of the microphone preamplifier gain stage. Figure 24: Microphone Frequency Response VAT TACK Limiter Activation Level VPEAK related to VBAT or VNEG 64 @ 0.5dB 0.40 1 VDECAY Limiter Release Level 0.31 1 AMICLIMIT Limiter Minimum Gain 0d B tAT TACK Limiter Attack Time 5 μs/step tDECAY Limiter Decay Time 1 ms/step Microphone Frequency Response: This graph shows the frequency response of the microphone preamplifier with different gain settings without R MICIN resistor, CAC capacitor (MICACx pin connected to AGND) and CMIC=2.2μF. Symbol Parameter Conditions Min Typ Max Unit 10 100 1k 10k Frequency Response [dB] f [Hz] 0dB 30dB 10dB 20dB
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 27 Detailed Description Microphone Supply The AS3415/35 features an integrated microphone supply charge pump. This charge pump provides the proper microphone supply voltage for a single cell battery supply (1.5V). Since AAA batteries can oper ate down to 1.0V, the direct battery voltage cannot be used for microphone supply. This would reduce the sensitivity of the microphone dramatically. Figure 27: Microphone Supply Microphone Supply: This block diagram shows how the integrated microphone supply works including all options for configuration like off mode and bypass mode. Therefore the integrated charge pump generates a microphone supply voltage which is typically 2.7V. In case the ANC chipset is supplied with a fixed voltage e.g. 1.8V the integrated charge pump supports a mode which allows the designer to directly connect the microphone supply pi n to the chip supply voltage. This can help to reduce total power consumption of the system. A third mode is available to switch off the microphone supply. This use case can occur if the headset is operated without ANC function. Please mind that you must not switch off the microphone supply at all if the integrated music bypass function is in use. The microphone supply voltage is also used to switch off the integrated music bypass sw itch if the AS3415/35 is in active mode. Bypass Switch Operation: When using the integrated music bypass switch you must not switch off the microphone supply!
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 29 Detailed Description Headphone Amplifier The headphone amplifier is a true ground output using V NEG as negative supply. It is designed to provide the audio signal with 2x34mW @ 32 Ω. For higher output requirements, the headphone amplifier is also ca pable of operating in bridged mode. In this mode the left output is carrying the inverted signal of the right output shown in Figure 30 . With a V BAT voltage of 1.8V, a maximum output power of 120mW can be achieved in this mode. This is especially required for over ear headsets with hybrid ANC topology or any other headset with high output power requirements. The amplifier itself features various input sources. The line in put signal is directly connected to the headphone amplifier. In case the application requires more complex music filtering the line input connection can be disabled and the mixer inputs MIXR and MIXL can be used to feed the music signal to the headphone amplifier. The mixer inputs have a 6kΩ input resistance which gives a typical gain of 6dB with the internal 12kΩ feedback resistor of the headphone amplifier. The input multiplexer supports four different input signals which can be configured according to complexity of the ANC filter. Figure 30: Headphone Amplifier Single Ended Headphone Amplifier: This figure shows the block diagram of the headphone amplifier including the integrated music bypass switches as well as the summation input of the amplifier in single ended configuration.
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 31 Detailed Description Headphone Parameter: This table shows the detailed electrical characteristics of the headphone amplifier like output power, SNR and channel separation. PHP_BRIDGE Nominal Output Power Differential Mode V BAT = 1.8V, 32Ω load 110 mW VBAT = 1.5V, 32Ω load 75 mW VBAT = 1.0V, 32Ω load 30 mW VBAT = 1.8V, 16Ω load 150 mW VBAT = 1.5V, 16Ω load 100 mW VBAT = 1.0V, 16Ω load 35 mW IHPH Supply current Normal mode 2.4 mA ECO mode 2 mA PSRRHP Power Supply Rejection Ratio 1kHz 100 dB SNR Signal to Noise Ration High Quality Mode, 0dB gain via MIXx input pin, 32Ω load 112 dB ECO Mode, 0dB gain via MIXx input pin, 32Ω load 110 dB Channel Separation 32Ω load -87 dB VNoise-A Output Noise Floor A-Weighted High Quality Mode, 32Ω load, HP_MUX = nc, Mixer input disabled, 0dB gain 2.8 μV ECO Mode, 32Ω load, HP_MUX = nc, Mixer input disabled, 0dB gain 3.3 μV Symbol Parameter Conditions Min Typ Max Unit
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 37 Detailed Description Figure 42: Bypass THD+N vs. Output Power Bypass THD+N vs. Output Power: This table shows A-weighted THD+N characteristics of the integrated bypass switch. Operational Amplifier The AS3415 offers only one operational amplifier for feed-forward ANC. The AS3435 features a second additional operational amplifier stage to perform feed-back ANC or any other needed filtering. Both operational amplifiers stages can be activated and used individually. Figure 43: Operational Amplifiers Operational Amplifier: This figure shows the block diagram of the operational amplifiers to be used for ANC filter design. 0,001 0,01 0,1 11 0 THD+N [%] Pout [mW]
32 Ohm
0,001 0,01 0,1 11 0 THD+N [%] Pout [mW]
16 Ohm
AS3415/AS3435 – 38 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Parameter VBAT=1.5V, T A= 25ºC, R input = R FB = 1kΩ unless otherwise specified. Figure 44: Operational Amplifier Parameter Symbol Parameter Conditions Min Typ Max Unit VLIN Input Signal Level Gain=0dB 0.9* VBAT VBAT VPEAK SNR Signal to Noise Ratio 10kΩ load, Gain = 0dB, VBAT=1.8V, High Quality Mode 122 dB 10kΩ load, Gain = 0dB, VBAT=1.5V High Quality Mode 121 dB 10kΩ load, Gain = 0dB, VBAT=1.0V High Quality Mode 117 dB 10kΩ load, Gain = 0dB, VBAT=1.8V, ECO Mode 118 dB 10kΩ load, Gain = 0dB, VBAT=1.5V, ECO Mode 117 dB 10kΩ load, Gain = 0dB, VBAT=1.0V, ECO Mode 113 dB ILIN Block Current Consumption No load, Gain = 0dB, VBAT=1.8V, High Quality Mode 660 μA No load, Gain = 0dB, VBAT=1.5V, High Quality Mode 660 μA No load, Gain = 0dB, VBAT=1.0V, High Quality Mode 530 μA No load, Gain = 0dB, VBAT=1.8V, ECO Mode 460 μA No load, Gain = 0dB, VBAT=1.5V, ECO Mode 480 μA No load, Gain = 0dB, VBAT=1.0V, ECO Mode 360 μA VNOISE-A Input Referred Noise Floor A-Weighted High Quality Mode 900 nV ECO Mode 1.9 μV Voffset DC offset voltage Gain = 0dB 2 mV CL Load Capacitance 100 pF
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 41 Detailed Description System The system block handles the power up and power down sequencing as well as the mode switching. Power Up/Down Conditions The chip powers up when one of the following conditions is true: Figure 49: Power Up Conditions Power Up Conditions: This table shows the available power up conditions of the AS3415/35. The chip automatically shuts off if one of the following conditions arises: Figure 50: Power Down Conditions Power Down Conditions: This table shows the available power down conditions of the AS3415/35. # Source Description
1 MODE pin In stand-alone mode, MODE pin has to be driven high for >2ms to turn on the device
2 I²C start In I²C mode, an I²C start condition turns on the device
# Source Description 1M O D E p i n Slider Mode: Mode pin has to be driven low for 10ms to turn off Push Button Mode: Mode pin has to be driven high for >2.4sec to turn off 2 Serial Interface Power down by serial interface by clearing the PWR_HOLD bit. (Please mind that the I2C_MODE bit has to be set before clearing the PWR_HOLD bit for security reasons) 3L o w B a t t e r y Power down if VBAT is lower than the supervisor off-threshold
4 VNEG CP OVC Power down if V NEG is higher than the VNEG off-threshold
AS3415/AS3435 – 42 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description Start-Up Sequence The AS3515/35 has a defined startup sequence. Once the AS3415/35 MODE pin is pulled high, the device initiates the automatic startup sequence shown in Figure 51 . Figure 51: Start-Up Sequence Stand Alone Mode: This timing diagram shows the startup sequence of the AS3415/35 in detail.
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 47 Detailed Description Playback Only Mode The active noise cancelling feature of the AS3415/35 can also be disabled with the ANC/CSDA pin. The ANC/CSDA pin has to be pulled high to enable the ANC function during startup (ANC MODE). If the pin is connected to ground, the chip enters playback only mode (PBO MODE ) in which the ANC function is disabled. The operating mode of the line input mute switch, as well as the mixer input, can be defined in register PBO_MODE. The microphone amplifier shuts do wn automatically, but it is possible to control the operational amplifiers in this mode separately. Typically only the line input amplifiers and the headphone amplifier are enabled in the playback only mode. This very special mode allows the user to disable the ANC function but still use the line input equalizer function of the chipset. If this function is not desired you just need to pull the pin high through a 22kΩ resistor. Figure 60: Playback Only Mode Timing Diagram Playback Only Mode Timing Diagram: The diagram shows the necessary voltages and timings for different operation modes in Playback Only Mode.
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 51 Detailed Description Independent of the OTP programming, it is possible to overwrite the OTP register temporarily if the chip is controlled by a microcontroller via I²C. The chip configuration can be stored in the flash memory of the Bluetooth- or wireless chipset and can be loaded to the ANC chipset during startup of the device via the I²C interface. Because the OTP fuses upload their contents into the OTP register at power-up, the new OTP settings from the microcontroller will overwrite the default settings from the fuses. All I² C OTP registers settings can be changed as many times as desired, but will be lost at power off. The OTP memory can be accessed in the following ways:
- LOAD Operation: The LOAD operation reads the OTP fuses and loads the contents in to the OTP register. A LOAD operation is automatically executed after each power-on-reset.
- WRITE Operation: The WRITE operation allows a temporary modification of th e OTP register. It does not program the OTP. This operat ion can be invoked multiple times and will remain set whil e the chip is supplied with power and while the OTP register is not modified with another WRITE or LOAD operation.
- READ Operation: The READ operation reads the contents of the OTP register, for example to verify a WRITE command or to read the OTP memory after a LOAD command.
- STORE Operation: The STORE operation programs the contents of the OTP register permanently into the OTP fuses. Don’t use old or ne arly empty batteries for programming the fuses. OTP Registers & Fuses: The OTP registers are volatile memory cells which lose the content once the device is switched off. Multiple read and write commands are possible but in order to store chip settings during power off mode, the OTP fuses have to be used.
AS3415/AS3435 – 52 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description OTP Read/Write and Load Access With the OTP register architec ture of the AS3415/35 it is important to know how to access the registers for reading and writing. Before an I²C read command can be sent there are two registers that have to be configured pr ior to the desired I²C read command. The flow chart in Figure 66 show the correct read access sequence. The first step is to configure the EVAL_REG_ON register. This register enables access to the OTP_MODE register. The OTP_MODE register defines whether you want to read or write to the OTP registers. By setting the OTP_MODE register ‘00’ we select OTP read access. Once the OTP_MODE register has been configured you can start reading from the OTP registers. Figure 66: OTP Read Access Flow Chart OTP Read Access Flow Chart: This flow chart shows how to successfully read from an OTP register via the I²C or production trimming interface. Set bit EVAL_REG_ON in register 0x20 Set OTP_MODE register to ‘00‘b Read from desired OTP register
AS3415/AS3435 – 54 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description OTP Fuse Storing Many wireless applications, like Bluetooth single chips support programmable solutions, as well as ROM versions. As such, it is necessary for ROM versions to store microphone gain compensation data and the gene ral ANC configuration inside the ANC chip. This is necessary because there is no other way to configure the ANC chip during startup. In order to guarantee successful trimming of AS3415/3 5 it is necessary to provide a decent environment for the trimming process. Figure 69 shows a principal block diagram for tr imming the AS3415/35 properly in production using the I²C interface. The most important block is the external power supply. Usua lly it is possible to trim the AS3415/35 with a single supply voltage of min. 1.8V in laboratory environment, but as soon as it comes to mass production we highly recommend buffering V NEG supply of the chip. As highlighted in the block diagram, it is mandatory to get a voltage difference between V POS and VNEG of 3.4V (minimum) to guarantee proper trimming of the device, therefore it is possible to buffer it externally with a negative power supply. The V NEG voltage applied to VNEG pin must be lower than the voltage created with the charge pump. This means if the typical VNEG output voltage is -1.5V you can easily apply externally -1.7V. The charge pump switches then automatically into skip mode. Figure 69: Production Environment I²C Interface Trimming I²C Trimming: This block diagram shows a general overview of the production environment when storing the register settings to the AS3415/35 using a standard I²C interface.
AS3415/AS3435 – 56 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description with the original register dump performed just before we started the actual trimming process. If the verification was successful we know that all bits have been trimmed correctly to AS3415/AS3435. What is important to mention is that the AS3415 and AS3435 have a couple of test bits inside which are by default set to ‘1’ . We do not recommend overwriting these bits. Furthermore, it is important to know that it is not possible to change bits once they are trimmed. It is not possible to change a bit from ‘1’ back to zero. If an additional trimming is done it is only possible to change bits from ‘0’ to ‘1’ . It is important that all necessary bits are trimmed exactly like in the block diagram shown in Figure 71 . Figure 71: OTP Programming Process OTP Programming: This flow chart describes the OTP programming process in detail.
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 57 Detailed Description Besides production trimming using the I²C interface, the AS3415/35 features a second unique trimming mechanism. This very special mode enables the analog music inputs of the AS3415/35 to become a production trimming input. Figure 72: Production Environment Production Trim Box Production Trim Box: This block diagram shows the connection of the Trim Box enabling the audio inputs to become a trim input for mass production. With this new system, there is no need for mechanical potentiometers any more. Up to now, operators in production use screw drivers to fine tune the ANC performance of each headset. The disadvantage of this is reliability and cost of potentiometers. Additionally, operators are not always precise in their work, thus yielding inconsistent results. With the new production trimming system from ams there are no mechanical potentiometers required. The operator connects a 3.5mm audio jack to a trimming box and this box enables the audio input of the headset to become the ANC tu ning input. This new feature also helps industrial designers of headset because there are no more considerations concerning leakage holes for the old mechanical trimming. Thus, the headset can be fully assembled and ready for the ANC test system at the end of the manufacturing process. The trim box can be easily controlled with an RS232 interface so it is also possible to create fully automated trimming systems. For further details please contact our local sales office; they can provide you with source code examples and application notes.
AS3415/AS3435 – 64 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Detailed Description TH Clock high time Max. 400kHz clock speed 500 ns TL Clock low time Max. 400kHz clock speed 500 ns TSU CSDA has to change Tsetup before rising edge of CSCL 250 - - ns THD No hold time needed for CSDA relative to rising edge of CSCL 0- - n s TS CSDA H hold time relative to CSDA edge for start/stop/rep_start 200 - - ns T PD CSDA prop delay relative to low going edge of CSCL 50 ns Symbol Parameter Conditions Min Typ Max Unit
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 65 Register Description Figure 84: Register Table Overview Addr Name b7 b6 b5 b4 b3 b2 b1 b0 System Registers 20h SYSTEM DESIGN_VERSION<3:0> 1110 EVAL_REG_ON PWR_HOLD 21h PWR_SET LOW_BAT PWRUP COMPLETE HPH_ON MIC_ON LIN_ON MICS_CP_ON MICS_ON 2h-2F h reserved OTP Registers 10h ANC_L2 TEST_BIT_1 MICL_VOL_OTP2<5:0> Gain from MICL to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 11h ANC_R2 ALT2_ENABLE MICR_VOL_OTP2<5:0> Gain from MICR to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 12h ANC_L3 TEST_BIT_2 MICL_VOL_OTP3<5:0> Gain from MICL to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 13h ANC_R3 ALT3_ENABLE MICR_VOL_OTP3<5:0> Gain from MICR to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 14h ANC_MODE HPH_MUX<1:0> 0: MIC; 1: OP1; 2: OP2; 3: - LIN_MUTE MIX_ENABLE OP2L_ON OP2R_ON OP1L_ON OP1R_ON 15h MON_MODE MON_HPH_MUX<1:0> 0: MIC; 1: OP1; 2: OP2; 3: - MON_LIN_M UTE MON_MIX_EN ABLE MON_LINE_ATT<1:0> 0: 0dB 1: -24dB 2: -30dB 3: -36dB SLIDER_MON DISABLE_MONI TOR Register Description
AS3415/AS3435 – 66 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description 16h PBO_MODE TEST_BIT_4 NO_PBO PBO_LIN_MU TE PBO_MIX_ENA BLE PBO_OP2L_ON PBO_OP2R_ON PBO_OP1L_ON PBO_OP1R_ON 17h ECO SLIDE_PWR_U P LOWBAT_100 ILED<1:0> 0: OFF; 1: 25%; 2: 50%; 3: 100% ENABLE_HPH_ ECO ENABLE_MIC_E CO ENABLE_LIN_E CO ENABLE_OPAM P_ECO 30h ANC_L TEST_BIT_3.1 MICL_VOL<5:0> Gain from MICL to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 31h ANC_R TEST_BIT_6 MICR_VOL<5:0> Gain from MICR to QMICL or Mixer = 0dB...+31dB; MUTE and 63 steps of 0.5dB 32h MIC_MON_L MICL_MON<5:0> Gain from MICL to QMICL/R = 0dB...+31dB; MUTE and 63 steps of 0.5dB if MON_MODE is active 33h MIC_MON_R MICR_MON<5:0> Gain from MICL to QMICL/R = 0dB...+31dB; MUTE and 63 steps of 0.5dB if MON_MODE is active 34h MODE_1 MICS_CP_OFF MICS_OFF MIC_AGC_O N MIC_OFF NO_LOWBAT_ OFF CP_OFF HPH_OFF LIN_OFF 35h MODE_2 TEST_BIT_7 HP_RAMP_ON LINL_ON_DIFF MICS_DC_OFF DELAY_HPH_M UX HPH_MODE 0: Stereo 1: Mono Differential I2C_MODE Evaluation Registers 3Dh EVAL EVAL_ON MASTER_LIN _MUTE MASTER_MIX_ ENABLE MON_MODE PBO_MODE MICL_MUTE MICR_MUTE 3Eh CONFIG_1 EXTBURNCLK 3Fh CONFIG_2 TM34 BURNSW TM_REG34-35 TM_REG30-33 OTP_MODE<1:0> 0: READ; 1: LOAD; 2: WRITE; 3: BURN Addr Name b7 b6 b5 b4 b3 b2 b1 b0
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 67 Register Description System Registers Figure 85: SYSTEM Register Description Name Address Default Value SYSTEM 0x20 81h This register contains control bits for monitor mode, OTP register and power up/down functions. Bit Bit Name Default Access Bit Description 7:4 DESIGN_VERSION 1110 R Design version number to identify the design version of the AS3415/35. 1010: For chip version 1v0 1011: For chip version 1v1 1100: For chip version 1v2 1101: for chip version 1v3 1110: for chip version 1v5 3E V A L _ R E G _ O N 0 R / W This register controls read and write access to the OTP register banks. 0: Normal operation 1: Enables writing to register 0x3D, 0x3E and 0x3F to configure the OTP and set the access mode. 0P W R _ H O L D 1 R / W This bit allows an MCU using the I²C interface a power down of the AS3415/35. A start condition on the I²C interface will wake up the device again. This function works only if the I2C_MODE bit is set before you write this register. 0: Power up hold is cleared and chip powers down 1: It is automatically set to on after power on
AS3415/AS3435 – 68 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Figure 86: PWR_SET Register Description Name Address Default Value PWR_READ 0x21 20h A readout of this register returns the status of each block of the chipset. Bit Bit Name Default Access Bit Description 6L O W _ B A T xR VBAT supervisor status 0: VBAT is above brown out level 1: VBAT has reached brown out level 5P W R U P _ C O M P L E T E x R Power-Up sequencer status 0: Power-up sequence incomplete 1: Power-up sequence completed
4 HPH_ON 0 R
This register returns the power status of the headphone amplifier. 0: Headphone amplifier switched off 1: Headphone amplifier switched on
3 MIC_ON 0 R
This register returns the power status of the microphone preamplifier. 0: Microphone preamplifier switched off 1: Microphone preamplifier switched on
2 LIN_ON 0 R
This register returns the power status of the line input amplifier. 0: Line input switched off 1: Line input switched on
1 MICS_CP_ON 0 R
This register returns the power status of the microphone charge pump. 0: Microphone charge pump switched off 1: Microphone charge pump switched on 0M I C S _ O N 0R This register returns the power status of the microphone supply (MICS). 0: Microphone supply switched off 1: Microphone supply switched on
AS3415/AS3435 – 70 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Figure 89: ANC_L3 Register Description 5:0 MICR_VOL_OTP2<6:0> 000 0000 R/W Volume settings for left microphone input, adjustable in 63 steps of 0.5dB 00 0000: MUTE 00 0001: 0.5dB gain 00 0010: 1dB gain 00 0011: 1.5dB gain 11 1110: 30.5dB gain 11 1111: 31dB gain Name Address Default Value ANC_L3 0x12 80h The ANC_L3 Register configures the gain for the left microphone input. This register is the second alternative microphone gain register for OTP programming in case the ANC_L and ANC_L2 registers are already programmed. Bit Bit Name Default Access Bit Description 7 TEST_BIT_6 1 R Test register. Please do not write this register. 5:0 MICL_VOL_OTP3<6:0> 000 0000 R/W Volume settings for left microphone input, adjustable in 63 steps of 0.5dB 00 0000: MUTE 00 0001: 0.5dB gain 00 0010: 1dB gain 00 0011: 1.5dB gain 11 1110: 30.5dB gain 11 1111: 31dB gain Name Address Default Value ANC_R2 0x11 00h The ANC_R2 Register configures the gain for the right microphone input. This register is the first alternative microphone gain register for OTP programming in case the ANC_R register is already programmed. Bit Bit Name Default Access Bit Description
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 71 Register Description Figure 90: ANC_R3 Register Description Name Address Default Value ANC_R3 0x13 00h The ANC_R3 Register configures the gain for the right microphone input. This register is the second alternative microphone gain register for OTP programming in case the ANC_R and ANC_R2 registers are already programmed. Bit Bit Name Default Access Bit Description 7A L T 3 _ E N A B L E 0R / W In case the register is being used for microphone programming this bit has to be set. The bit is being used by the internal state machine of the AS3415/35 to determine which alternative microphone gain register has to be used during startup. 0: Microphone registers 0x12 and 0x13 are not active 1: Microphone registers 0x12 and 0x13 are active. Gain settings in registers 0x30, 0x31, 0x10 and 0x11 are ignored. 5:0 MICR_VOL_OTP3<6:0> 000 0000 R/W Volume settings for left microphone input, adjustable in 63 steps of 0.5dB 00 0000: 0dB 00 0001: 0.5dB gain 00 0010: 1dB gain 00 0011: 1.5dB gain 11 1110: 30.5dB gain 11 1111: 31dB gain
AS3415/AS3435 – 72 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Figure 91: ANC_MODE Register Description Name Address Default Value ANC_MODE 0x14 00h The ANC_MODE register controls various settings for the chipset in active noise cancelling mode like which amplifiers are enabled as well as which audio inputs are active. Bit Bit Name Default Access Bit Description 7:6 HPH_MUX<1:0> 00 R/W This register selects the ANC input source for the headphone amplifier in ANC mode. Depending on the register setting the outputs of microphone preamplifier, OPAMP1, OPAMP2 can be connected to the headphone amplifier input. It is also possible to disconnect all ANC input sources which is sometimes desired in monitor mode. 00: QMIC outputs are connected to HPH input 01: OP1 outputs are connected to HPH input 10: OP2 outputs are connected to HPH input 11: Nothing connected to HPH input except line input and mixer input in case they are enabled.
5 LIN_MUTE 0 R/W
This bit defines the status of the line input mute switch in active noise cancelling mode. If the bit is set to ‘1’ the line input amplifier is disconnected from the headphone amplifier. 0: Line input connected to headphone amplifier 1: Line input not connected to headphone amplifier 4M I X _ E N A B L E 0 R / W This bit enables the headphone mixer input pin to mix external signals to the headphone amplifier in active noise cancelling mode. 0: HPH mixer input disabled 1: HPH mixer input enabled 3O P 2 L _ O N 0 R / W This register enables the left channel of OPAMP 2 in ANC mode. 0: Left OP2 is switched off 1: Left OP2 is switched on 2O P 2 R _ O N 0 R / W This register enables the right channel of OPAMP 2 in ANC mode. 0: Right OP2 is switched off 1: Right OP2 is switched on 1O P 1 L _ O N 0 R / W This register enables the left channel of OPAMP 1 in ANC mode. 0: Left OP1 is switched off 1: Left OP1 is switched on 0O P 1 R _ O N 0 R / W This register enables the right channel of OPAMP 1 in ANC mode. 0: Right OP1 is switched off 1: Right OP1 is switched on
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 73 Register Description Figure 92: MONITOR_MODE Register Description Name Address Default Value MONITOR_MODE 0x15 00h The MONITOR_MODE register controls various settings for the chipset in monitor mode like line input monitor mode attenuation as well as which audio inputs are active. Bit Bit Name Default Access Bit Description 7:6 MON_HPH_MUX<1:0> 00 R/W This register selects the ANC input source for the headphone amplifier in monitor mode. Depending on the register setting the outputs of microphone preamplifier, OPAMP1, OPAMP2 can be connected to the headphone amplifier input. 00: QMIC outputs are connected to HPH input 01: OP1 outputs are connected to HPH input 10: OP2 outputs are connected to HPH input 11: Nothing connected to HPH input except line input and mixer input in case they are enabled.
6 MON_LIN_MUTE 0 R/W
This bit defines the status of the line input mute switch in monitor mode. If the bit is set to ‘1’ the line input amplifier is disconnected from the headphone amplifier. 0: Line Input Mute disabled 1: Line Input Mute enabled
5 MON_MIX_ENABLE 0 R/W
This bit enables the headphone mixer input pin to mix external signals to the headphone amplifier in playback only mode. 0: HPH mixer input disabled 1: HPH mixer input enabled 3:2 MON_LIN_ATT<1:0> 00 R/W This register controls the line put gain in monitor mode. Per default the line input is muted. With this register it can be attenuated from -30dB up to -36dB in 6dB steps. 00: 0dB line input gain in monitor mode 01: -24dB line input gain in monitor mode 10: -30dB line input gain in monitor mode 11: -36dB line input gain in monitor mode
1 SLIDER_MON 0 R/W
This bit enables the Full Slider Mode configuration. Please mind that this bit must not be set without setting SLIDE_PWR_UP to ‘1’ . 0: Slider Mode activated 1: Full Slider Mode activated
0 DISABLE_MONITOR 0 R/W
This bit disables the monitor mode in push button control mode. 0: Monitor mode enabled 1: Monitor mode disabled
AS3415/AS3435 – 74 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Figure 93: PBO_MODE Register Description Name Address Default Value PBO_MODE 0x16 00h The ANC_MODE register controls various settings for the chipset in playback mode like which amplifiers are enabled as well as which audio inputs are active. Bit Bit Name Default Access Bit Description 7 TEST_BIT_4 1 R Test register. Please do not write this register. 6N O _ P B O 0 R / W This bit disables the playback only mode function. No external pull up resistor is required on ANC / CSDA pin is necessary if this bit is set to ‘1’ 0: Playback only mode enabled 1: Playback only mode disabled
5 PBO_LIN_MUTE 0 R/W
This bit defines the status of the line input mute switch in playback only mode. If the bit is set to ‘1’ the line input amplifier is disconnected from the headphone amplifier. 0: Line Input Mute disabled 1: Line Input Mute enabled
4 PBO_MIX_ENABLE 0 R/W
This bit enables the eco mode of the microphone preamplifier. 0: Power save function disabled 1: Power save function enabled 3P B O _ O P 2 L _ O N 0 R / W This register enables the left channel of OPAMP 2 in playback only mode. 0: Left OP2 is switched off 1: Left OP2 is switched on 2P B O _ O P 2 R _ O N 0 R / W This register enables the right channel of OPAMP 2 in playback only mode. 0: Right OP2 is switched off 1: Right OP2 is switched on 1P B O _ O P 1 L _ O N 0 R / W This register enables the left channel of OPAMP 1 in playback only mode. 0: Left OP2 is switched off 1: Left OP2 is switched on 0P B O _ O P 1 R _ O N 0 R / W This register enables the right channel of OPAMP 1 in playback only mode. 0: Right OP2 is switched off 1: Right OP2 is switched on
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 75 Register Description Figure 94: ECO Register Description Name Address Default Value ECO 0x17 0x00 This register controls the economic (ECO) mode for all analog audio blocks. Furthermore it includes also LED control and other general settings. Bit Bit Name Default Access Bit Description
7 SLIDE_PWR_UP 0 R/W
This bit enables the slide switch control mode of the AS3515/35. If this bit is programmed the device can be powered up and powered down via a slide switch. 0: Slide switch control disabled 1: Slide switch control enabled 6L O W B A T _ 1 0 0 0R / W This bit increases the LED low battery indication level by 100mV. 0: Default LED indication level (0.95V) 1: Increased LED indication level (1.05V) 5:4 ILED<1:0> 00 R/W This register defines the driving strength of the ILED pin for LED control. 00: Current sink switched off 01: 25% 10: 50% 11: 100%
3 ENABLE_HPH_ECO 0 R/W
This bit enables the eco mode of the headphone amplifier. 0: Power save function disabled 1: Power save function enabled 2E N A B L E _ M I C _ E C O 0 R / W This bit enables the eco mode of the microphone amplifier. 0: Power save function disabled 1: Power save function enabled
1 ENABLE_LIN_ECO 0 R/W
This bit enables the eco mode of the line input amplifier. 0: Power save function disabled 1: Power save function enabled
0 ENABLE_OPAMP_ECO 0 R/W
This bit enables the eco mode of the operational amplifier amplifiers for ANC filter design. 0: Power save function disabled 1: Power save function enabled
AS3415/AS3435 – 78 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Figure 99: MODE_1 Register Description Name Address Default Value MODE_1 0x34 0x00 This register controls miscellaneous settings of the AS3515/35. Bit Bit Name Default Access Bit Description
7 MICS_CP_OFF 0 R/W
This bit controls the microphone supply charge pump. The microphone charge pump has a second function besides the bias voltage generation for microphones. It is also used to disable the integrated music bypass switch if the AS3415/35 is active. In case the integrated bypass switch is used in an application the MICS_CP_OFF bit must not be set to ‘1’ . 0: Microphone supply charge pump enabled 1: Microphone supply charge pump disabled 6M I C S _ O F F 0R / W This bit controls the microphone supply. In case this bit is set to ‘1’ the MICS pin is disconnected from the internal microphone supply. 0: Microphone supply switched on 1: Microphone supply switched off
5 MIC_AGC_ON 0 R/W
This bit disables the automatic gain control of the microphone preamplifier. 0: AGC disabled 1: AGC enabled 4M I C _ O F F 0 R / W This bit powers down the microphone preamplifier. 0: Microphone preamplifier enabled 1: Microphone preamplifier disabled 3N O _ L O W B A T _ O F F 0 R / W This bit disables the automatic power down function of the device with a low battery condition. 0: Low battery shutdown enabled 1: Low battery shutdown disabled 2C P _ O F F 0 R / W This bit disables the V NEG charge pump in case there is already a negative supply present in a system. 0: VNEG charge pump enabled 1: VNEG charge pump enabled 1H P H _ O F F 0 R / W This bit allows the user to power down headphone amplifier in case it is not used in the final application in order to save system power. 0: Headphone amplifier enabled 1: Headphone amplifier disabled 0L I N _ O F F 0 R / W This bit allows the user to power down the line input preamplifier in case it is not used in the final application in order to save system power. 0: Line Input amplifier enabled 1: Line Input amplifier disabled
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 79 Register Description Figure 100: MODE_2 Register Description Name Address Default Value MODE_2 0x35 0x00 This register controls miscellaneous settings of the AS3515/35. Bit Bit Name Default Access Bit Description 7 TEST_BIT_7 1 R/W Test register. Please do not write this register.
4 LINL_ON_DIFF 0 R/W
This bit enables the left line input filter OPAMP in differential operation mode of the headphone amplifier. The differential headphone mode is enabled by setting bit HP_MODE in register 0x35. If HP_MODE bit is not set LINL_ON_DIFF bit has no influence on the operation mode of the left line input OPAMP . 0: Left line input OPAMP disabled 1: Left line input OPAMP enabled
3 MICS_DC_OFF 0 R/W
This bit disables the internal microphone supply discharge function if the microphone supply is switched off. 0: MICS discharge enabled 1: MICS discharge disabled
2 DELAY_HPH_MUX 0 R/W
With this bit it is possible to delay the HPH_MUX setting during startup of the device to avoid unwanted pop noise in case of long charging times of external components. 0: HPH_MUX_OTP delay disabled 1: HPH_MUX_OTP delay enabled
1 HPH_MODE 0 R/W
This register controls the operating mode of the headphone amplifier. The headphone amplifier supports single ended mode and differential mode. In differential output mode the right audio signal path is the active input signal for the headphone amplifier. 0: Stereo single ended mode 1: Mono differential mode
0 I2C_MODE 0 R/W
This bit enables I²C power down of the AS3415/35. 0: I²C power down disabled 1: I²C power down enabled via PWR_HOLD bit.
AS3415/AS3435 – 80 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description Evaluation Registers Figure 101: EVAL Register Description Name Address Default Value EVAL 0x3D 0x00 This register enables miscellaneous operating modes, that are typically controlled via slide switch or push button, for evaluation purposes or MCU controlled applications. Bit Bit Name Default Access Bit Description 7 EVAL_ON 0 R/W Function to be defined. 5M A S T E R _ L I N _ M U T E 0 R / W This register is the master register for the line input mute function. No matter in what operating mode the device is working the LINE_MUTE bit overrules any other setting in any operation mode. 0: Line Input master mute disabled 1: Line Input master mute enabled
4 MASTER_MIX_ENABLE 0 R/W
This register is the master register for the mixer input function. No matter in what operating mode the device is working the MASTER_MIX_ENABLE bit overrules any other setting in any operation mode. 0: Line Input master mute disabled 1: Line Input master mute enabled
3 MON_MODE 0 R/W
This bit enables the monitor mode of AS3415/35 which can normally be enabled by pulling the MODE pin to V BAT/2. In case an MCU is connected to the device the Monitor mode can be enabled by setting this bit. 0: Monitor mode deactivated 1: Monitor mode activated
2 PBO_MODE 0 R/W
This bit enables the playback mode of AS3415/35 which can normally be enabled by pulling the ANC pin to 0V. In case an MCU is connected to the device the Monitor mode can be enabled by setting this bit. 0: Monitor mode deactivated 1: Monitor mode activated 1M I C L _ M U T E 0R / W This register is the master mute register for the left microphone amplifier. No matter in what operating mode the device is working the MICL_MUTE bit overrules any other setting in any operation mode. 0: Mute disabled 1: Mute enabled 0M I C R _ M U T E 0R / W This register is the master mute register for the left microphone amplifier. No matter in what operating mode the device is working the MICR_MUTE bit overrules any other setting in any operation mode. 0: Mute disabled 1: Mute enabled
AS3415/AS3435 – 82 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Register Description 1:0 OTP_MODE<1:0> 00 R/W This register controls the OTP access. 00: READ 01: LOAD 10: WRITE 11: BURN Name Address Default Value CONFIG_2 0x3F 0x00 This register controls the register access to all OTP registers. In order to get access to these registers it is necessary to set EVAL_REG_ON bit to ‘1’ . Bit Bit Name Default Access Bit Description
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 83
Application Information
Figure 104: AS3435 Stereo Feedback Application Example AS3435 Stereo Feedback Example: This application example shows a single AS3435 in feedback configuration with activated music bypass mode in off mode. L R GND Line Input AGND 150R 150R AGND AGND C4 470nF C5 470nF R2 10k R1 10k R3 10k R4 10k Left ANC Feedback Filter Right ANC Feedback Filter AGND R10 2k2 R11 2k2 AGND 10uF 2k2 AGND AGND 10uF 2k2 AGND Left Speaker Right Speaker Left ANC MIC Right ANC MIC AGND a b On/Off SwitchR14 10k Vpos GND R13 10k Monitor Mode GND 1 2 Push Button Control R12 10k Vpos Slide Switch Control Push Button Control Control Mode Selection CAUTION: Note that only one operation mode is possible. Either slide switch control or push button control. It is not possible to operate both modes in parallel. a b S1 ANC Control Vpos R7 10k Position a: ANC enabled Position b: ANC disabled ANC Control BPR BPL Music Bypass in OFF mode Net Tie Grounds Analog and digital ground should be connected low battery condition the LED starts flashing. GND
AS3415/AS3435 – 84 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Figure 105: AS3415 Stereo Feed Forward Application Example AS3415 Stereo Feed-forward Example: This application example shows a single AS3415 in feed-forward configuration with activated music bypass mode in off mode. GND LED ILED Vpos Vpos+ - Power LED Battery Socket 10uF GND VposC2 1uF 10uF GND GND BPR BPL ILED AGND C10 10uF AGND GND C6 10uF AGND C7 10uF AGND Exposed Pad CPN CPP Vneg Vneg L R GND Line Input AGND 150R 150R AGND AGND C4 470nF C5 470nF R2 10k R1 10k R3 10k R4 10k Left ANC Feedback Filter Right ANC Feedback Filter AGND R10 2k2 R11 2k2 AGND 10uF 2k2 AGND AGND 10uF 2k2 AGND Left Speaker Right Speaker Left ANC MIC Right ANC MIC AGND a b On/Off Switch R14 10k Vpos GND R13 10k Monitor Mode GND Push Button Control R12 10k Vpos Slide Switch Control Push Button Control Control Mode Selection CAUTION: Note that only one operation mode is possible. Either slide switch control or push button control. It is not possible to operate both modes in parallel. a b S1 ANC Control Vpos R7 10k Position a: ANC enabled Position b: ANC disabled ANC Control BPR BPL Music Bypass in OFF mode Net Tie Grounds Analog and digital ground should be connected low battery condition the LED starts flashing. GND LINL2 TRSDA3 TRSCL4 LINR5 QLINR6 MODE/CSCL8 ANC/CSDA7 MICACL 9 ILED 11 MICL 10 MICS 12 MICR 13 MICACR 14 QMICR 15 IOP1R 16 QOP1R 17 BPL 18 HPL 19 MIXL 20 MIXR 21 HPR 22 BPR 23 VBAT 24 GND26 CPN27 VNEG28 QOP1L29 IOP1L30 QMICL31 AGND32 QLINL1 CPP25 AS3415 VNEG33 AS3415
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 85 Figure 106: AS3415 Hybrid Appl ication Example AS3435 Hybrid Example: This application example shows two AS3435 in hybrid configuration with activated music bypass mode in off mode. GND LED ILED Vpos Vpos + - Power LED Battery Socket 10uF GND VposC2 1uF 10uF GND GND BPR_LEFT ILED AGND C10 10uF AGND GND C610uF AGND C710uF AGND Exposed Pad CPN CPP QLINL2 LINL3 TRSDA4 TRSCL5 LINR6 ANC/CSDA8 QLINR7 MODE/CSCL9 MICL 11 MICACL 10 ILED 12 MICS 13 MICR 14 MICACR 15 QMICR 16 IOP1R 17 QOP1R 18 IOP2R 19 QOP2R 20 BPL 21 HPL 22 MIXL 23 MIXR 24 BPR 26 VBAT 27 CPP28 GND29 CPN30 VNEG31 QOP2L32 AGND1 HPR 25 AS3435 IOP2L33 QOP1L34 IOP1L35 QMICL36 VNEG37 AS3435 Vneg Vneg L R GND Line Input AGND 150R 150RAGND AGND C4 470nF C5 470nF R2 10k R1 10k R3 10k R4 10k Feedback Filter R10 2k2 R11 2k2 AGND 10uF 2k2 AGND AGND 10uF 2k2 AGND Speaker Left Feed Forward MIC Feedback MIC AGND ab On/Off SwitchR14 10k Vpos GND R13 10kS4 Monitor Mode GND Push Button Control R12 10k Vpos Slide Switch Control Push Button Control Control Mode Selection CAUTION: Note that only one operation mode is possible. Either slide switch control or push button control. It is not possible to operate both modes in parallel. a b S1 ANC Control Vpos R7 10k Position a: ANC enabled Position b: ANC disabled ANC Control Music Bypass in OFF mode Net Tie Grounds Analog and digital ground should be connected together close to the negative battery terminal. LED is on during normal operation. In case of a low battery condition the LED starts flashing. GND 10uF GND VposC2 1uF 10uF GND GND BPR_RIGHT C10 10uF C610uF AGND C710uF AGND Exposed Pad CPN CPP QLINL2 LINL3 TRSDA4 TRSCL5 LINR6 ANC/CSDA8 QLINR7 MODE/CSCL9 MICL 11 MICACL 10 ILED 12 MICS 13 MICR 14 MICACR 15 QMICR 16 IOP1R 17 QOP1R 18 IOP2R 19 QOP2R 20 BPL 21 HPL 22 MIXL 23 MIXR 24 BPR 26 VBAT 27 CPP28 GND29 CPN30 VNEG31 QOP2L32 AGND1 HPR 25 AS3435 IOP2L33 QOP1L34 IOP1L35 QMICL36 VNEG37 AS3435 Vneg Vneg Feedforward Feedback Filter R10 2k2 R11 2k2 AGND 10uF 2k2 AGND AGND 10uF 2k2 AGND Speaker Right Feed Forward MIC Feedback MIC AGND Filter Feedforward Filter AGND AGND BPR_LEFT AGND BPR_RIGHT MIXR_LEFT MIXR_LEFT MIXR_RIGHT MIXR_RIGHT ANC/CSDA ANC/CSDA MODE/CSCL ANC/CSDA MODE/CSCL MODE/CSCL
AS3415/AS3435 – 88 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] PCB Layout Recommendation Line Input and Headphone The line input- and the headphone amplifier are blocks with higher system currents; therefore it is important to separate these high input and output cu rrents from the rest of the system. The example shown in Figure 109 demonstrates how to do a proper ground layout for boths blocks. To separate the headphone amplifier from the rest of the system it is recommended to route a dedicated ground connection from the headphone amplifie r terminal back to the battery ground terminal of the device. With this separate ground connection the high output currents of the headphone amplifier do not influence the sensitive analog ground of the chipset. The same layout technique is applicable fo r the line input amplifier. The line input amplifier also has hi gher input currents because of the 150Ω termination resistors (R TERM ) connected to the line input terminal shown in Figure 10 . To avoid unwanted ground currents influencing the sensitive analog system ground of the AS3415/35, it is recommended to route a dedicated ground connection from the line input terminal back to the negative battery terminal of the PCB. The example shows a local ground plane from the battery, to the line input terminals. Such a plane should be used for more complicated line input filters. Thus, all line input related components like R TERM , CHP, R1 and R2 as well as other additional filter components should be connected to this ground plane. The ground plane must be connected to the battery terminal, at a single point, for best grounding effect. Another important connection is the bypass connection from line input terminal to the BPL and BPR pins of the AS3415/35. This connection is active if the chip is in off mode or if the device has run out of battery. It is important to use wide signal lines for these connections. The wider these connections are, the better it is for the application. The same is true for the ground connections of the headphone amplifier and the line input amplifier. A weak signal line ca n directly influence the channel separation of the system. A minimum signal width of 1mm is typically recommended for the left and right audio channels and 2mm for the audio ground signals.
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 89 PCB Layout Recommendation Figure 109: Line Input and Headphone Layout Recommendation AS3415/35 Line Input and HPH Layout recommendation: This diagram shows the layout recommendation of the AS3415/35 line input amplifier and the headphone amplifier. Headphone Layout: Use wide signal lines for line input ground, headphone ground and signal lines as well as for the music bypass lines. A weak signal line on any of these connections can influence channel separation of the device. GND HPL HPR GND HPC BATGND R RTERMR TERM L CHP HPR HPL BPL BPRQLINL LINL TRSDA TRSCL LINR QLINR ~~~~ TOP LAYER SILK SCREEN TOP LAYER BOARD OUTLINE BOTTOM LAYER COMMENT LAYER Line input ground plane for all line input related components. Dedicated headphone ground connection from headphone terminal back to battery ground terminal. Dedicated lien input ground connection from line input terminal back to battery ground terminal. AS3435
AS3415/AS3435 – 90 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] PCB Layout Recommendation AS3435 Complete Layout Example The combination of all layout recommendations given in the previous chapters are shown in Figure 110 . It also includes a push button for on/off control and a status indication LED. It is important to say that all layout recommendations are also applicable for the AS3515. Figure 110: AS3435 Over the Ear Layout Example AS3435 over the ear layout example: This diagram shows the combination of all layout recommendations of a PCB. The PCB outline is based on an over the ear headset. Layout Recommendations: All layout recommendations given in the examples are also applicable for the AS3415! On/Of f GND HPL HPR GND AGN DAGND MICRMICL LED HPC CHP R ANC R M-Up BATGND R RTERMR VNEGC FLYC VBATC TERM BIAS BIASRR MICIN MICIN R R MIC MICC AC AC MICSC C C L TOP LAYER SILK SCREEN TOP LAYER BOARD OUTLINE BOTTOM LAYER AS3435
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 91 PCB Pad Layout Figure 111: AS3435 PCB Pad Layout Recommendation AS3435 PCB Pad Layout: This drawing shows the PCB footprint layout recommendation for three different component density levels. PCB Pad Layout 0.4mm 3.5mm 3.5mm 0.2mm 0.75mm 5.9mm RECOMMENDED LAND PATTERN TOP VIEW LOW COMPONENT DENSITY 0.4mm 3.5mm 3.5mm 0.2mm 0.65mm 5.7mm RECOMMENDED LAND PATTERN TOP VIEW MEDIUM COMPONENT DENSITY 0.4mm 3.5mm 3.5mm 0.2mm 0.55mm 5.5mm RECOMMENDED LAND PATTERN TOP VIEW HIGH COMPONENT DENSITY
AS3415/AS3435 – 92 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] PCB Pad Layout Figure 112: AS3415 PCB Pad Layout Recommendation AS3415 PCB Pad Layout: This drawing shows the PCB footprint layout recommendation for three different component density levels. 0.5mm 3.5mm 3.5mm 0.2mm 0.75mm 5.9mm RECOMMENDED LAND PATTERN TOP VIEW LOW COMPONENT DENSITY 0.5mm 3.5mm 3.5mm 0.2mm 0.65mm 5.7mm RECOMMENDED LAND PATTERN TOP VIEW MEDIUM COMPONENT DENSITY 0.5mm 3.5mm 3.5mm 0.2mm 0.55mm 5.5mm RECOMMENDED LAND PATTERN TOP VIEW HIGH COMPONENT DENSITY
AS3415/AS3435 – 94 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Package Drawings & Markings Figure 115: AS3435, 36-pin QFN, 0.4mm Pitch Note(s) and/or Footnote(s): 1. Dimensioning & toleranceing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. Coplanarity applies to the exposed heat slug as well as the terminal. 4. Radius on terminal is optional. 5. N is the total number of terminals. Symbol Min Nom Max A 0.80 0.90 1.00 A1 0 0.02 0.05 A2 - 0.65 1.00 A3 0.20 REF. L 0.35 0.40 0.45 Θ 0º - 14º b 0.15 0.20 0.25 D5 . 0 0 B S C . E5 . 0 0 B S C . e0 . 4 0 B S C . D2 3.20 3.30 3.40 E2 3.20 3.30 3.40 D1 4.75 BSC. E1 4.75 BSC. aaa - 0.10 - bbb - 0.07 - ccc - 0.10 - ddd - 0.05 - eee - 0.08 - fff - 0.10 - N3 6 B A aaa C aaa C D E PIN #1 I.D 36 28 1810 fff CAB fff CAB NX L NX b bbb CAB ddd C
0.60 MAX
e 919 28 36 PIN #1 I.D (DATUM B) (DATUM A ) 1018 Θ A3 NX eee C ccc C SEATING PLANE C A
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 95 Package Drawings & Markings Figure 116: AS3415, 32-pin QFN, 0.5mm Pitch Note(s) and/or Footnote(s): 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. Coplanarity applies to the exposed heat slug as well as the terminal. 4. Radius on terminal is optional. 5. N is the total number of terminals. Symbol Min Nom Max A 0.80 0.90 1.00 A1 0 0.02 0.05 A2 - 0.65 1.00 A3 0.20 REF L 0.35 0.40 0.45 Θ 0º - 14º b 0.18 0.25 0.30 D5 . 0 0 B S C E5 . 0 0 B S C e0 . 5 0 B S C D2 3.40 3.50 3.60 E2 3.40 3.50 3.60 D1 4.75 BSC E1 4.75 BSC aaa - 0.15 - bbb - 0.10 - ccc - 0.10 - ddd - 0.05 - eee - 0.08 - fff - 0.10 - N3 2 B A aaa C aaa C D E PIN #1 I.D 32 25 169 fff CAB fff CAB NX L NX b bbb CAB ddd C e 817 25 32 PIN #1 I.D (DATUM B) (DATUM A ) 916 Θ A3 NX eee C ccc C SEATING PLANE C A
AS3415/AS3435 – 96 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Ordering & Contact Information Figure 117:
Ordering Information
AS3435. Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30
8141 Unterpremstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code Description Delivery Form Package AS3415-EQFP Enhanced Low Noise Active Noise Cancelling Speaker Driver Tape & Reel dry pack with 4000 pcs per reel QFN 32 [5.0x5.0x0.9mm] 0.5mm pitch AS3415-EQFM Enhanced Low Noise Active Noise Cancelling Speaker Driver Tape & Reel dry pack with 500 pcs per reel QFN 32 [5.0x5.0x0.9mm] 0.5mm pitch AS3435-EQFP Enhanced Low Noise Active Noise Cancelling Speaker Driver Tape & Reel dry pack with 4000 pcs per reel QFN 36 [5.0x5.0x0.9mm] 0.4mm pitch AS3435-EQFM Enhanced Low Noise Active Noise Cancelling Speaker Driver Tape & Reel dry pack with 500 pcs per reel QFN 36 [5.0x5.0x0.9mm] 0.4mm pitch Ordering & Contact Information
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 97 RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
AS3415/AS3435 – 98 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appear ing in its Terms of Sale. ams AG makes no warranty, express, statutory, implied, or by description regarding the inform ation set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Theref ore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 99 Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
AS3415/AS3435 – 100 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Revision Information Note(s) and/or Footnote(s): 1. Page numbers for the previous version may di ffer from page numbers in the current revision Changes from 1-20 (2014-Feb) to current revision 1-30 (2014-Jun-13) Page(1) Updated Figure 23 24 Updated Figure 84 65 Updated Figure 85 67 Updated Figure 113 93 Revision Information
ams Datasheet, Confidential: 2014-Jun-13 [v1-30] AS3415/AS3435 – 101 Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
3 Block Diagram
4 Pin Assignment
5 Pin Description
7A b s o l u t e M a x i m u m R a t i n g s
9 Electrical Characteristics
11 Detailed Description
11 Audio Line Input
11 Line Input Gain Setting
12 High Pass EQ Function
14 Bass Boost EQ Function
17 Parameter
20 Microphone Inputs
21 Input Capacitor Selection
24 Parameter
27 Microphone Supply
28 Parameter
29 Headphone Amplifier
30 Parameter
35 Integrated Music Bypass Switch
36 Parameter
37 Operational Amplifier
38 Parameter
41 System
41 Power Up/Down Conditions
42 Start-Up Sequence
43 Modes of Operation
44 Full Slider Mode
45 Slider Mode
46 Push Button Mode
47 Playback Only Mode
48 LED Status Indication
49 VNEG Charge Pump
49 Parameter
50 OTP Memory & Internal Registers
52 OTP Read/Write and Load Access
54 OTP Fuse Storing
58 2-Wire Serial Interface
60 Protocol
63 Parameter
65 Register Description
67 System Registers
69 OTP Registers
80 Evaluation Registers
AS3415/AS3435 – 102 ams Datasheet, Confidential: 2014-Jun-13 [v1-30] Content Guide