AS1108 AMSCO | Alldatasheet
Document overview
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Technical content
1 General Description
conventional 4-wire serial interface. brightness can be controlled by analog or digital means. directly address each segment. can be synchronized across multiple drivers. Figure 1. Typical Application Diagram
2 Key Features
3 Applications
4 Digits
8 Segments
4 Absolute Maximum Ratings
Table 1. Absolute Maximum Ratings
- The reflow peak soldering temperature (body temperature) is specified according to IPC/JEDEC J-STD-020C
Moisture/Reflow Sensitivity Classification for non-hermetic Solid State Surface Mount Devices.
- Specified according JESD22-B106 Resistance to Soldering Temperature for Through-Hole Mounted Devices.
- Norm: MIL 883 E method 3015.
5 Electrical Characteristics
Conditions: VDD = 2.7 to 5.5V, RSET = 9.53kΩ±1%, TAMB = TMIN to TMAX (unless otherwise specified). Note: See Figure 9 on page 6 for additional timing information. Table 2. Electrical Characteristics Table 3. Logic Inputs/Outputs Characteristics Table 4. Timing Characteristics
6 Typical Operating Characteristics
VDD = 5V, RSET = 9.53kΩ, TAMB = 25ºC (unless otherwise specified). Figure 2. Scan Frequency vs.Temperature Figure 3. Scan Frequency vs. V DD Figure 4. ISEG vs. Temperature Figure 5. I SEG vs. VDD Figure 6. ISEG vs. VOUT Figure 7. ISEG vs. VOUT
Figure 8. ISEG vs. RSET
7 Detailed Description
on page 7) via the 4-wire serial interface. A programming sequence consists of 16-bit packages as depicted in Table 5. clocked out at the falling edge of CLK. data. The first bit is D15, the most significant bit (MSB). The exact timing is shown in Figure 9. into shutdown mode. All registers should be programmed for normal operation at this time. Register (see page 10) is set to the minimum values. Figure 9. Interface Timing Table 5. 16-Bit Serial Data Format
ers are connected to VDD, so that all segments are blanked. Note: During shutdown mode the Digit-Registers maintain their data. be at GND or VDD (CMOS logic level). ble. Only the display test mode (see page 9) overrides shutdown mode. selected using a 4-bit address word, and communication is done via the serial interface. without rewriting the whole register contents. down, display test and features selection registers. Table 6. Register Address Map
The Shutdown Register controls AS1108 shutdown mode (see Shutdown Mode on page 7). on). Table 9 lists some examples of the possible settings for the Decode Enable Register bits. Note: A logic high enables decoding and a logic low bypasses the decoder altogether. D7 = 1 turns the decimal point on). Table 9 lists the code-B font; Table 10 lists the HEX font. AS1108. Table 11 shows the 1:1 pairing of each data bit and the appropriate segment line. Figure 10. Standard 7-Segment LED Intensity Control and Inter-Digit Blanking Table 7. Shutdown Register Format (Address (HEX) = 0xXC)) Table 8. Decode Enable Register Format (Address (HEX) = 0xX9)) Table 9. Code-B Font
0 X 0000 1111110
1 X 0001 0110000
2 X 0010 1101101
3 X 0011 1111001
4 X 0100 0110011
5 X 0101 1011011
Test Register is set for normal operation. Note: All settings of the Digit- and Control-Registers are maintained.
6 X 0110 1011111
7 X 0111 1110000
8 X 1000 1111111
9 X 1001 1111011
The decimal point is enabled by setting bit D7 = 1. Table 10. HEX Font
0 X 0 0 0 0 1111110
1 X 0 0 0 1 0110000
2 X 0 0 1 0 1101101
3 X 0 0 1 1 1111001
4 X 0 1 0 0 0110011
5 X 0 1 0 1 1011011
6 X 0 1 1 0 1011111
7 X 0 1 1 1 1110000
8 X 1 0 0 0 1111111
9 X 1 0 0 1 1111011
The decimal point is enabled by setting bit D7 = 1. Table 11. No-Decode Mode Data Bits and Corresponding Segment Lines Table 12. Display-Test Register Format (Address (HEX) = 0xXF)) Table 9. Code-B Font (Continued)
means using RSET (see Selecting RSET Resistor Value and Using External Drivers on page 12). down to 1/32 of the peak current set by RSET. update frequency is typically 1600Hz. If the number of digits displayed is reduced, the update frequency is increased. fewer than 4 digits are used. Note: To avoid differences in brightness this register should not be used to blank parts of the display (leading zeros). Table 13. Intensity Register Format (Address (HEX) = 0xXA)) Table 14. Scan-Limit Register Format (Address (HEX) = 0xXB)) Table 15. Maximum Segment Current for 1-, 2-, or 3-Digit Displays
blinking rate, and resetting the blink timing. Note: At power-up the Feature Register is initialized to 0. Figure 11 on page 14). The LOAD/CSN and CLK signals are connected to all devices. operation command, and subsequently update its register. Table 16. Feature Register Summary Table 17. Feature Register Bit Descriptions (Address (HEX) = 0xXE)) Enables and disables various device features. 0 = Internal oscillator is used for system clock. 1 = Pin CLK of the serial interface operates as system clock input. Resets all control registers except the Feature Register. 0 = Reset Disabled. Normal operation. Register) identically after power-up. Note: The Digit Registers maintain their data. 0 = Enable Code-B decoding (see Table 9 on page 8). 1 = Enable HEX decoding (see Table 10 on page 9). Enables the SPI-compatible interface. 0 = Disable SPI-compatible interface. 1 = Enable the SPI-compatible interface. 0 = Blink period typically is 1 second (0.5s on, 0.5s off). 1 = Blink period is 2 seconds (1s on, 1s off). timing can be synchronized across all the devices. bit D7 determines how blinking starts. 0 = Blinking starts with the display turned off. 1 = Blinking starts with the display turned on.
8 Typical Application
effects of electromagnetic interference and wiring inductance. avoid power supply ripple (see Figure 11 on page 14). Note: Both GND pins must be connected to ground. current that flows through the LEDs. Table 18. RSET vs. Segment Current and LED Forward Voltage, VDD = 2.7V Table 19. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.3V Table 20. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.6V Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V
Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 5.0V Table 23. Package Thermal Data
20 Narrow DIP +75°C/W
20 Wide SOIC +85°C/W
Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V (Continued)
The application example in Figure 11 shows the AS1108 as a 4x8 LED dot matrix driver. Note: For a multiple-digit dot matrix, multiple AS1108 devices must be cascaded. Figure 11. Application Example as LED Dot Matrix Driver should be set to the same value so that one display will not appear brighter than the other. cycle per digit. If 5 digits are needed, set both Scan-Limit Registers to display 3 digits and leave one digit unconnected. because its duty cycle per digit will be 1/2 and the other displays duty cycle will be 1/3. Note: Refer to No-Op Register (0xX0) on page 11 for additional information.
9 Pinout and Packaging
Figure 12. DIP and SO Pin Assignments (Top View) Table 24. Pin Descriptions GND 4, 7 Ground. Both GND pins must be connected. on the rising edge of this pin. active only while pin LOAD/CSN is low. driver is turned off it is pulled to GND. DD 16 Positive Supply Voltage. Connect to +2.7 to +5.5V supply.
The AS1108 is available in a 20-pin DIP and a 20-pin SOIC package. Figure 13. 20-pin DIP Package
Figure 14. 20-pin SOIC Package
- Lead coplanarity should be 0 to 0.10mm (.004) max.
- Package surface finishing:
(2.1) Top: matte (charmilles #18-30). (2.2) All sides: matte (charmilles #18-30). (2.3) Bottom: smooth or matte (charmilles #18-30).
- All dimensions exclusive of mold flash, and end flash from the pack-
age body shall not exceed 0.24mm (0.10) per side (D).
The AS1108 is available in a 20-pin DIP and a 20-pin SOIC package. Table 25. Ordering Information
www.austriamicrosystems.com Revision 2.1 19 - 19 AS1108 austria micro systems Data Sheet Copyrights Copyright © 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life- sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech- nical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 e-mail: info@austriamicrosystems.com For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com austria micro systems a leap ahead