AS1100WE-TZ

AS1100 AMSCO | Alldatasheet

Document overview

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Technical content

Revision 1.32, Oct. 2004 Page 1 of 12 Key Features - 10MHz Serial Interface - Individual LED Segment Control - Decode/No-Decode Digit Selection - 20µA Low-Power Shutdown (Data Retained) - Extremely low Operating Current 0.5mA in open loop - Digital and Analog Brightness Control - Display Blanked on Power-Up - Drive Common-Cathode LED Display - Software Reset 1 - Optional External clock - 24-Pin DIP and SO Packages - Fully compatible to MAX7219 General Description The AS1100 is an LED driver for 7 segment numeric displays of up to 8 digits. The AS1100 can be programmed via a conventional 4 wire serial interface. It includes a BCD code-B decoder, a multiplex scan circuitry, segment and display drivers and a 64 Bit memory. The memory is used to store the LED settings, so that continuous reprogramming is not necessary.

1 Software Reset and external clock are not supported by

Every individual segment can be addressed and updated separately. Only one external resistor is required to set the current through the LED display. Brightness can be controlled either in an analog or digital way. The user can choose the internal code-B decoder to display numeric digits or to address each segment directly. The AS1100 features an extremely low shutdown current of only 20µA. and an operational current of less than 500µA. The number of visible digits can be programmed as well. The AS1100 can be reset by software and an external clock can be used. Several test modes support easy debugging. The AS1100 is fully compatible to the MAX 7219. AS1100 is offered in a 24 pins PDIP and SOIC package.

Applications

• Bar-Graph Displays - Industrial Controllers - Panel Meters - LED Matrix Displays - White Goods Serially Interfaced, 8-Digit LED Driver AS1100 DATA SHEET 8-Digit µP Display

8 Segments

8 Digits

9.53k +5V MOSI µP I/O SCK LOAD CLK GND GND DIG0-DIG7 SEG A-G SEP DP VDD ISET DIN Pin Confi guration Typical Application Circuit AS1100 DIP/SO 24 DIN DIG0 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 GND GND LOAD DOUT VDD ISET CLK SEG A SEG B SEG C SEG D SEG E SEG F SEG G SEG DP TOP

Revision 1.32, Oct. 2004 Page 2 of 12 Absolute Maximum Ratings Voltage (with respect to GND) VDD -0.3V to 6V DIN, CLK, LOAD -0.3V to 6V All Other Pins -0.3V to (VDD +0.3V) Current DIG0–DIG7 Sink Current 500mA SEGA–G, DP Source Current 100mA Continuous Power Dissipation (TA = +85°C) Narrow Plastic DIP (derate 13.3mW/°C above +70°C 1066mW Wide SO (derate 11.8mW/°C above +70°C) 941mW Operating Temperature Ranges (T MIN to T MAX ) AS1100xL 0°C to +70°C AS1100xE -40°C to +85°C Storage Temperature Range -65°C to +150°C Package body temperature 2 +240°C

Electrical Characteristics

(VDD = 5V, R SET = 9.53k Ω ±1%, T A = T MIN to T MAX , unless otherwise noted.) Parameter Symbol Conditions Min Typ Max Units Operating Supply Voltage VDD 4.0 5.0 5.5 V Shutdown Supply Current IDD SD All digital inputs at VDD or GND, T A = +25°C 20 50 µA RSET = open circuit 500 µA Operating Supply Current IDD All segments and decimal point on, I SEG = - 40mA 330 mA Display Scan Rate f OSC 8 digits scanned 500 800 1300 Hz Digit Drive Sink Current I DIGIT VOUT = 0.65V 320 mA Segment Drive Source Current I SEG TA = +25°C, V OUT = (VDD -1V) -30 -40 -45 mA Segment Drive Current Matching ∆ ISEG 3.0 % Digit Drive Source Current I DIGIT Digit off, V DIGIT = (VDD -0.3V) -2 mA Segment Drive Sink Current I SEG Segment off, V SEG = 0.3V 5 mA Logic Inputs 2 The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020B “Moisture/Reflow Sensitiv ity Classification for non-hermetic Solid State Surface Mount Devices”.

Revision 1.32, Oct. 2004 Page 3 of 12 Parameter Symbol Conditions Min Typ Max Units Input Current DIN, CLK, LOAD I IH , I IL VIN = 0V or VDD -1 1 µA Logic High Input Voltage V IH 3.5 V Logic Low Input Voltage V IL 0.8 V Output High Voltage V OH DOUT, I SOURCE = -1mA VDD - 1 V Output Low Voltage V OL DOUT, I SINK = 1.6mA 0.4 V Hysteresis Voltage V I DIN, CLK, LOAD 1 V Timing Characteristics CLK Clock Period t CP 100 ns CLK Pulse Width High t CH 50 ns CLK Pulse Width Low t CL 50 ns CLK Rise to LOAD Rise Hold Time tCSH 0n s DIN Setup Time t DS 25 ns DIN Hold Time t DH 0n s Output Data Propagation Delay t DO CLOAD = 50pF 25 ns LOAD Rising Edge to Next Clock Rising Edge tLDCK 50 ns Minimum LOAD Pulse High t CSW 50 ns Data-to-Segment Delay t DSPD 2.25 ms Pin Description Pin Name Function 1 DIN Data input. Data is programmed into the 16Bit shift register on the rising CLK edge 2, 3, 5–8, 10, 11 DIG 0–DIG 7 8 digit driver lines that sink the current from the common cathode of the display. In shutdown mode the AS1100 switches the outputs to VDD 4, 9 GND both GND pins must be connected 12 LOAD Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into the register.

13 CLK

Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial data is clocked into the internal shift register with the rising edge of the CLK signal. On the DOUT pin the data is applied with the falling edge of CLK. 14–17, 20–23 SEG A–G, DP Seven segment driver lines including the decimal point. When a segment is turned off the output is connected to GND.

18 ISET The current into I SET determines the peak current through the segments and therefore the

brightness.

19 VDD Positive Supply Voltage (+5V)

24 DOUT Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The output is never set to high impedance.

the next rising edge of CLK, otherwise data would be lost. significant bit (MSB). The exact timing is given in figure 1. Table 2. The digit and control registers are selected via the AS1100 needs typically 250µs to exit the shutdown mode. the display test function overrides the shutdown mode. the display is blank. The AS1100 starts the shutdown mode. All registers should be programmed for normal operation. register are set to the minimum value.

Revision 1.32, Oct. 2004 Page 5 of 12 Decode-Mode Register In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low) the data Bits D7-D0 correspond to the segment lines of the AS1100. In table 4 some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In table 5 the font of the Code B decoder is shown. In table 6 the correspondence of the register to the appropriate segments of a 7 segment display is shown (see figure 2) Intensity Control and Interdigit Blanking Brightness of the display can be controlled in an analog way by changing the external resistor (R SET ). The current, which flows between VDD and I SET , defines the current that flows through the LEDs. The LED current is 100 times the I SET current. The minimum value of R SET should be 9.53k Ω , which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16 steps and is shown in table 7. An internal pulse width modulator controls the intensity of the display. Scan-Limit Register The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the brightness, the resistor R SET should be adjusted accordingly. Table 9 shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be used to blank portions of the display (leading zeros). AddressRegister D15–D12 D11 D10 D9 D8 Hex Code No-Op X 0 0 0 0 0xX0 Digit 0 X 0 0 0 1 0xX1 Digit 1 X 0 0 1 0 0xX2 Digit 2 X 0 0 1 1 0xX3 Digit 3 X 0 1 0 0 0xX4 Digit 4 X 0 1 0 1 0xX5 Digit 5 X 0 1 1 0 0xX6 Digit 6 X 0 1 1 1 0xX7 Digit 7 X 1 0 0 0 0xX8 Decode Mode X 1 00 10 x X 9 Intensity X 1 0 1 0 0xXA Scan Limit X 1 0 1 1 0xXB Shutdown X 1 1 0 0 0xXC Not used X 1 1 0 1 0xXD Reset and ext. Clock X1 1 1 0 0 x X E Display Test X1 1 1 1 0 x X F Table 2: Register address map Register Data Mode Address Code (Hex) D7 D6 D5 D4 D3 D2 D1 D0 Shutdown Mode 0 x X C XXXXXXX0 Normal Operation 0 x X C XXXXXXX1 Table 3: Shutdown register format (address (hex) = 0xXC)

Revision 1.32, Oct. 2004 Page 6 of 12 Register DataDecode Mode D7 D6 D5 D4 D3 D2 D1 D0 Hex Code N o d e c o d e f o r d i g i t s 7 – 0 00000000 0 x 0 0 Code B decode for digit 0 No decode for digits 7–1 00000001 0 x 0 1 Code B decode for digits 3–0 No decode for digits 7–4 00001111 0 x 0 F Code B decode for digits 7–0 11111111 0 x F F Table 4: Decode-mode register examples (address (hex) = 0xX9) Register Data On Segments = 17-Segment Character D7* D6–D4 D3 D2 D1 D0 DP* A B C D E F G

0 X 0000 1111110

1 X 0001 0110000

2 X 0010 1101101

3 X 0011 1111001

4 X 0100 0110011

5 X 0101 1011011

6 X 0110 1011111

7 X 0111 1110000

8 X 1000 1111111

9 X 1001 1111011

— X 1010 0000001 E X 1011 1001111 H X 1100 0110111 L X 1101 0001110 P X 1110 1100111 b l a n k X 1111 0000000 Table 5: Code B font *The decimal point is set by bit D7 = 1 Register Data D7 D6 D5 D4 D3 D2 D1 D0 Corresponding Segment Line DP A B C D E F G Table 6: No-decode mode data bits and corresponding segment lines

Revision 1.32, Oct. 2004 Page 7 of 12 Duty Cycle D7 D6 D5 D4 D3 D2 D1 D0 Hex Code 1 / 3 2 ( m i n o n ) XXXX0000 0 x X 0 3 / 3 2 XXXX0001 0 x X 1 5 / 3 2 XXXX0010 0 x X 2 7 / 3 2 XXXX0011 0 x X 3 9 / 3 2 XXXX0100 0 x X 4 1 1 / 3 2 XXXX0101 0 x X 5 1 3 / 3 2 XXXX0110 0 x X 6 1 5 / 3 2 XXXX0111 0 x X 7 1 7 / 3 2 XXXX1000 0 x X 8 1 9 / 3 2 XXXX1001 0 x X 9 2 1 / 3 2 XXXX1010 0 x X A 2 3 / 3 2 XXXX1011 0 x X B 2 5 / 3 2 XXXX1100 0 x X C 2 7 / 3 2 XXXX1101 0 x X D 2 9 / 3 2 XXXX1110 0 x X E 3 1 / 3 2 ( m a x o n )XXXX1111 0 x X F Table 7: Intensity register format (address (hex) = 0xXA) Register Data Scan Limit D7 D6 D5 D4 D3 D2 D1 D0 Hex Code Display digit 0 only X X X X X 0 0 0 0xX0 Display digits 0 & 1 X X X X X 0 0 1 0xX1 Display digits 0 1 2 X X X X X 0 1 0 0xX2 Display digits 0 1 2 3 X X X X X 0 1 1 0xX3 Display digits 0 1 2 3 4 X X X X X 1 0 0 0xX4 Display digits 0 1 2 3 4 5 X X X X X 1 0 1 0xX5 Display digits 0 1 2 3 4 5

6 XXXXX110 0 x X 6

Display digits 0 1 2 3 4 5 6 7 XXXXX111 0 x X 7 Table 8: Scan-limit register format (address (hex) = 0xXB) Figure 2: Standard 7-segment LED DP A F E D B C G

display-test register is reconfigured for normal operation. command and updates its register. operation the register contents should be "00h".

3 This register is not used by MAX7219, since it does not support

of electromagnetic interference and wiring inductance. must be connected to ground. table 12. The maximum current the AS1100 can drive is segment current, and the LED forward-voltage drop.

Revision 1.32, Oct. 2004 Page 9 of 12 8x8 LED Dot Matrix Driver The example in Figure 3 uses the AS1100 to drive an 8x8 LED dot matrix. The LED columns have common cathode and are connected to the DIG0-7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected via the digits as shown in Table 2. The decode mode register (0xX9) has to be programmed to ‘00000000’ as stated in Table 4. The single LEDs in a column can be addressed as stated in Table 6, where D0 corresponds to segment G and d/ to segment DP. For a multiple digit dot matrix several AS1100 have to be cascaded. Cascading Drivers The AS1100 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1100. Package Thermal Resistance ( θθθθJA )

24 Narrow DIP +75°C/W

24 Wide SO +85°C/W

Maximum Junction Temperature (T J) = +150°C Maximum Ambient Temperature (T A) = +85°C Table 13: Package thermal resistance data Figure 3: Application example as LED dot matrix driver µP DIG 7 8x8 LED Dot Mt i 9.53k VBAT LOA CLK GND GND DIG 0-SEG A-G SEP DP VDD ISET DIN DIG 0 SEG B SEG A SEG DP SEG E SEG D SEG C SEG F SEG G 8x8 LED Dot Mt i 9.53k VBAT LOA CLK GND GND DIG 0-SEG A-G SEP DP VDD ISET DIN DIG 0 SEG B SEG A SEG DP SEG E SEG D SEG C SEG F SEG G DIG 7 DOUT 24 Diode Arrangement

Revision 1.32, Oct. 2004 Page 10 of 12 Computing Power Dissipation The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation: PD = (VDD x 0.5mA) + (VDD - V LED )(DUTY x I SEG x N) where: VDD = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 8) V LED = LED forward voltage ISEG = segment current set by R SET Dissipation Example: ISEG = 40mA, N = 8, DUTY = 31/32, V LED = 1.8V at 40mA, VDD = 5.25V Thus, for a PDIP package θJA = +75°C/W (from Table 13), the maximum allowed ambient temperature T A is given by: T J,MAX = T A + PD x θJA = 150°C = T A +1.07W x 75°C/W. where T A = +69.7°C. The T A limit for SO Packages in the dissipation example above is +59.0°C.

Package Information

A 0.093 0.104 2.35 2.65 A1 0.004 0.012 0.10 0.30 B 0.014 0.019 0.35 0.49 C 0.009 0.013 0.23 0.32 D 0.598 0.614 15.20 15.60 e 0.050 1.27 E 0.291 0.299 7.40 7.60 H 0.394 0.419 10.00 10.65 L 0.016 0.050 0.40 1.27 Figure 4: SOIC-24 package dimensions

Revision 1.32, Oct. 2004 Page 12 of 12

Ordering Information

AS1100PL 0°C to +70°C 24 Narrow Plastic DIP Tubes AS1100WL 0°C to +70°C 24 Wide SO Tubes AS1100PE -40°C to +85°C 24 Narrow Plastic DIP Tubes AS1100WE -40°C to +85°C 24 Wide SO Tubes AS1100WL-T 0°C to +70°C 24 Wide SO T&R AS1100WE-T -40°C to +85°C 24 Wide SO T&R For Pb-free package use suffix ‘-Z‘ Contact austriamicrosystems AG A 8141 Schloss Premstätten, Austria T. +43 (0) 3136 500 0 F. +43 (0) 3136 525 01 info@austriamicrosystems.com Copyright Copyright © 2004 austriamicrosystems. Trademarks registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. To the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct. Austriamicrosystems reserves the right to change the circuitry and specifications without notice at any time. Figure 7: Segment Current versa R SET Segment Current = f(RSET) RSET in kOhm ISEGMENT in mA