ART40U120 ARTSCHIP | Alldatasheet

Document overview

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Technical content

Features

  • High short circuit rating opt imized for motor control
  • Low conduction losses
  • High switching speed
  • Tighter parameter distribution VCES=1200 V VCE(on) typ. =3, 0V @VGE =15V, Ic=40A N-channel ABSOLUTE MAXIMUM RATINGS Parameter Symbol Units Max Collector-to-Emitter Voltage V CES V 1200 Continuous Collector Current I C @ Tc=25˚C 40 Continuous Collector Current I C @ Tc=100˚C 20 Pulsed Collector Current 1 ICM 80 Clamped Inductive Load Current 2 ILM А Short Circuit Withstand Time tsc µs 10 Maximum Power Dissipation P D @ Tc=25˚C 180 Maximum Power Dissipation P D @ Tc=100˚C W Gate–to-Emitter Voltage V GE V ±20 Operating Junction and Storage temperature Range TJ TSTG ºC -55 to +150 Soldering Temperature, for 10 seconds ºC 300 THERMAL RESISTANCE Parameter Symbol Units Min Typ. Max Junction-to-Case R ΘJC - - 0,7 Case-to-Sink, Flat, Greased Surface R ΘCS - 0,24 - Junction-to-Ambient, typical socket mount R ΘJA ˚C/W - - 40

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 2 ELECTRICAL CHARACTERISTICS (Tj =25 °C) Parameter Symbol Units Test Conditions Min Typ. Max Collector-to-Emitter Breakdown Voltage V (BR)CES V V GE = 0V, IC = 250µA 1200 - - Breakdown Voltage Temp.Coefficient ∆V(BR)CES/ ∆TJ V/˚C V GE = 0V, IC = 2 mA - 0,9 - VGE = 15V, IC = 20A - 2,5 3,3 VGE = 15V, IC = 40A - 3,0 - Collector-to-Emitter Saturation Voltage V CE(ON) V VGE = 15V, IC = 20A TJ =150˚C - 2,6 - Gate Threshold Voltage V GE(th) V V GE=VCE, IC =250 µA 3,0 - 6,0 Threshold Voltage Temp.Coefficient ∆V(GE)th/ ∆TJ mV/˚C V GE=VCE, IC =2mA - -10 - Forward Transconductance g (fe) S V CE = 100V, IC = 20 A 12 18 - VCE = 1200V, VGE =0V - - 250 VCE = 10V, VGE =0V - - 2,0Zero Gate Voltage Collector Current ICES µA VCE = 1200V, VGE =0V TJ =150˚C - - 5000 Gate-to-Emitter Leakage Current I GES nA V GS = ± 2 0 V ± 1 0 0 SWITCHING CHARACTERISTICS (Tj =25 °C) Parameter Symbol Units Test Conditions Min Typ. Max Total Gate Charge (turn on) Qg - 168 256 Gate-to-Emitter Charge (turn on) Q ge - 22 35 Gate-to-Collector Charge (turn on) Q gc nC VGE = 15V,VCC = 400V, I C =20A - 65 102 Turn-On Delay Time t d(on) - 30 - R i s e T i m e t r - 23 - Turn-Off Delay Time t d(off) - 180 270 Fall Time t f ns - 120 178 Turn-On Switching Loss E on - 1,2 - Turn-Off Switching Loss E off - 2,1 - Total Switching Loss E tS mJ VCC =960V, IC =20A V GE = 15V RG=24 Ω Energy losses include «tail» - 3,2 4,0 Short Circuit Withstand Time tsc µs Vcc=720V, TJ=125 ˚C VGE=15V RG=5,0Ω 10 - - Turn-On Delay Time t d(on) - 32 - R i s e T i m e t r - 27 - Turn-Off Delay Time t d(off) - 370 - Fall Time t f ns - 267 - Total Switching Loss E tS mJ TJ=150˚C VCC =960V, IC =24A V GE = 15V RG=24 Ω Energy losses include «tail» - 7,70 - Input Capacitance C ISS - 2600 - Output Capacitance C OSS - 120 - Reverse Transfer Capacitance C RSS pF VGE = 0V,VCC = 30V, f = 1.0MHz - 45 - Notes: 1 Repetitive rating; VGE =20V, pulse width limited by max junction temperature. 2 VCC=80%(VCES), L= 10 µH, VGE = 15V, RG=5,0 Ω. 3 Pulse width ≤80 µs, duty factor ≤0,1%. 4 Pulse width 5,0µs single short.

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 3 Fig.1 –Typical Load Current vs. Frequency (For square wave, I=IRMS of fundamental; for triangular wave, I=IPK) Fig.2 – Typical Output Characteristics Fig.3 – Typical Transfer Characteristics

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 4 Fig.4 – Maximum Collector Current vs. Case Temperature Fig.5 – Collector-to-Emitter Voltage VS. Junction Temperature Fig.6 – Maximum Effective Transient Thermal Impedance,Junction-to-Case

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 5 Fig.7 – Typical Capacitance vs. Collector-to-Emitter Voltage Fig.8 – Typical Gate Charge vs. Gate-to-Emitter Voltage Fig.9 – Typical Switching Losses vs. Gate Resistance Fig.10 – Typical Switching Losses vs. Junction Temperature

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 6 Fig. 11 – Typical Switching Losses vs. Collector-to-Emitter Current Fig.12-Turn-Off SOA

INSULATED GATE BIPOLAR TRANSISTOR www.artschip.com 7 Fig. 13a – Clamped Inductive Load Test Circuit Fig.13b – Pulsed Collector Current Test Circuit