APM0400-P33_17 ASB | Alldatasheet
Document overview
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Technical content
Features
Note: 1. The number and size of ground via holes in a circuit board is critical for thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins for better RF and thermal performance, as shown in the drawing at the left side.
Description
- S21 = 19.7 dB@380 MHz = 18.3 dB@420 MHz
- NF of 10.0 dB over Frequency
- Unconditionally Stable
- Single 5.4 V Supply
- High OIP3@Low Current Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 More Information Typ.@T = 25 C, Vs = 5.4 V, Freq. = 400 MHz, Zo.sys = 50 ohms Specifications (in Production) APM0400-P33 ASB Inc. Solder Stencil Area Ø 0.3 plated thru holes to ground plane plerow (Top View) (Bottom View) (Side View) 2 x Ø 2.0 plated thru holes to screw on heat sinker (Recommended Footprint) Outline Drawing (Unit: mm) APM0400-P33 is an internally matched amplifier mini - module for such application band in SMD pac kage with the output P1dB of 33 dBm. It is compactly d e- signed for low current consumption and high OIP3. Integrating all the components for biasing and matc h- ing within the module enhances production yield and throughput as well. It passes through the stringent DC, RF, and reliability tests. Not sample test but 100% quality control test is made before packing. 1-stage Single Type
2/4 www.asb.co.kr September 2017 plerowTM APM0400-P33 High OIP3 Medium Power Amplifier Module S-parameters OIP3@380MHz OIP3@400MHz 380~420 MHz +5.4 V S-parameters & K Factor Typical Performance (Measured) Noise Figure
3/4 www.asb.co.kr September 2017 plerowTM APM0400-P33 High OIP3 Medium Power Amplifier Module OIP3@420MHz P1dB
4/4 www.asb.co.kr September 2017 plerowTM APM0400-P33 High OIP3 Medium Power Amplifier Module 1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. The ca- pacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for the best electrical performance. 2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are inclu d- ed inside the APM module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application fr e- quency. Copyright 2009-2017 ASB Inc. All rights reserved. Datasheet subject to change without notice. ASB assumes no re- sponsibility for any errors which may appear in this datasheet. No part of the datasheet may be copied or reproduced in any form or by any means without the prior written consent of ASB. Application Circuit Recommended Soldering Reflow Process 20~40 sec 260 C 200 C 150 C 60~180 sec Ramp-up (3 C/sec) Ramp-down (6 C/sec) + - APM OUT IN C1 C2 VS Tantal or MLC (Multi Layer Ceramic) Capacitor IN OUT Vs Evaluation Board Layout Size 40x40 mm (for APM Series – 13x13 mm)