ALN4500 ASB | Alldatasheet
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Technical content
Features
Specifications (in Production) Note: 1. The number and size of ground via holes in a circuit board is critical for thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins fo r better RF and thermal performance, as shown in the drawing at the left side.
Description
ASB Inc. (Top View) (Bottom View) Solder Stencil Area Ø0.4 plated thru holes to ground plane plerow (Side View) (Recommended Footprint) Typ. @ T = 25°C, Vs = 5 V, Freq. = 4500 MHz, Zo.sys = 50 ohm Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 ASB Inc., 4th Fl. Venture Town Bldg., 367-17 Goijeong-Dong, Seo-Gu, Daejon 302-716, Korea More Information 2-stage Single Type
2/4 www.asb.co.kr December 2008 plerowTM ALN4500 Internally Matched LNA Module S-parameters OIP3 P1dB 4000~5000 +5 V Typical Performance (Measured) S-parameters & K Factor Noise Figure
3/4 www.asb.co.kr December 2008 plerowTM ALN4500 Internally Matched LNA Module 1. S-parameter 2. OIP3, P1dB & NF Note: tested at room temperature. 1. S-parameter 2. OIP3, P1dB & NF Note: tested at V s= 5V.
4000 MHz 4500 MHz 5000 MHz
S21 (dB) S11 (dB) S22 (dB) S21 (dB) G/F (dB) S11 (dB) S22 (dB) S21 (dB) S11 (dB) S22 (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) S21 (dB) S11 (dB) S22 (dB) S21 (dB) G/F (dB) S11 (dB) S22 (dB) S21 (dB) S11 (dB) S22 (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) OIP3 (dBm) P1dB (dBm) NF (dB) RF Performance with Operating Temperature RF Performance with Voltage Change
4/4 www.asb.co.kr December 2008 plerowTM ALN4500 Internally Matched LNA Module 1) The tantal capacitor is optional and for bypa ssing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. 2) So-called DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and bl ocking the DC component in the signal. The DC blocking capacitors are included inside the LNA module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application frequency. Application Circuit Recommended Soldering Reflow Process Evaluation Board Layout + - ALN OUT IN C1 C2 Tantal Capacitor V DC 20~40 sec 260°C 200°C 150°C 60~180 sec Ramp-up (3¢ªC/sec) Ramp-down (6°C/sec) Size 25 x 25mm IN OUT +Vcc (for ALN Series – 13x13mm)