ALN0664 ASB | Alldatasheet
Document overview
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Technical content
Features
Specifications (in Production) Note: 1. The number and size of ground via holes in a circuit board is critical for thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins for better RF and thermal performance, as shown in the drawing at the left side.
Description
ASB Inc. (Top View) (Bottom View) Solder Stencil Area Ø 0.4 plated thru holes to ground plane plerow (Side View) (Recommended Footprint) Typ. @ T = 25C, Vs = 5 V, Freq. = 665 MHz, Zo.sys = 50 ohm Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 More Information 2-stage Single Type
2/3 www.asb.co.kr August 2017 plerowTM ALN0664 Internally Matched LNA Module 470 520 570 620 670 720 770 820 860 Frequency (MHz) -50 -40 -30 -20 -10 S-parameter (dB) S22 S12 S11 S21 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 Frequency (MHz) -50 -40 -30 -20 -10 S-parameter (dB) Stability Factor K S22 S12 S11 S21 K S-parameters Noise Figure OIP3 P1dB 470~860 +5 V Typical Performance (Measured) S-parameters & K Factor
3/3 www.asb.co.kr August 2017 plerowTM ALN0664 Internally Matched LNA Module 1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. The ca- pacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for the best electrical performance. 2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are i nclud- ed inside the ALN module. Therefore, C1 & C2 ca pacitors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application fre- quency. Copyright 2016-2017 ASB Inc. All rights reserved. Datasheet subject to change without notice. ASB assumes no re- sponsibility for any errors which may appear in this datasheet. No part of the datasheet may be copied or reproduced in any form or by any means without the prior written consent of ASB. Application Circuit Recommended Soldering Reflow Process + - ALN OUT IN C1 C2 VS Tantal or MLC (Multi Layer Ceramic) Capacitor 20~40 sec 260 C 200 C 150 C 60~180 sec Ramp-up (6 C/sec) Ramp-down (6 C/sec) IN OUT Vs Size 25x25mm (for ALN Series – 13x13mm) Evaluation Board Layout