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Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 3

Technical content

Features

  • S21 = 35.8 dB@65 MHz = 36.2 dB@75 MHz
  • NF of 0.9 dB over Frequency
  • Unconditionally Stable
  • Single 5 V Supply
  • High OIP3@Low Current Note: 1. The number and size of ground via holes in a circuit board is critical f or thermal RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of all ground pins for better RF and thermal performance, as shown in the drawing at the left side.

Description

ASB Inc. (Top View) (Bottom View) Solder Stencil Area Ø 0.4 plated thru holes to ground plane plerow (Side View) (Recommended Footprint) C o u pl er Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7223 Fax: (82) 42-528-7222 More Information C o u pl er C o u pl er C o u pl er C o u pl er 2-stage Single Type Specifications (in Production) Typ.@T = 25 C, Vs = 5 V, Freq. = 70 MHz, Zo.sys = 50 ohms

2/3 www.asb.co.kr October 2014 plerowTM ALN0070 Internally Matched LNA Module 65 67 69 71 73 75 Frequency (MHz) -60 -50 -40 -30 -20 -10 S-parameters (dB) K-factor S21 S12 S11 S22 K 0 1000 2000 3000 4000 5000 6000 Frequency (MHz) -60 -50 -40 -30 -20 -10 S-parameters (dB) K-factor S21 S12 S11 S22 K S-parameters Noise Figure OIP3 P1dB 65~75 +5 V Typical Performance (Measured) S-parameters & K Factor

3/3 www.asb.co.kr October 2014 plerowTM ALN0070 Internally Matched LNA Module 1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced from the DC supply. The capacitance value may be determined by customer’s DC supply status. The ca- pacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for the best electrical performance. 2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are i nclud- ed inside the ALN module. Therefore, C1 & C2 capa citors may not be necessary, but can be added just in case that the customer wants. The value of C1 & C2 is determined by considering the application fre- quency. Application Circuit Recommended Soldering Reflow Process + - ALN OUT IN C1 C2 VS Tantal or MLC (Multi Layer Ceramic) Capacitor 20~40 sec 260 C 200 C 150 C 60~180 sec Ramp-up (6 C/sec) Ramp-down (6 C/sec) IN OUT Vs Size 25x25mm (for ALN Series – 13x13mm) Evaluation Board Layout