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Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 7

Technical content

Features

  • For Satellite Radio Applications
  • Usable Bandwidth 45 MHz
  • Low Loss
  • Good Selectivity
  • Ceramic Chip Scale Package (CSP)
  • Single-ended Input, 50Ω
  • Balanced Output, 100Ω or 200Ω
  • Hermetic
  • RoHS compliant (2002/95/EC), Pb-free Package Pin Configuration Surface Mount 1.40 x 1.20 x 0.46 mm Bottom View Pin No. Description

1 Input

3,4 Output 2,5 Case ground 0.46 NOM. 0.50 MAX. 0.3251.20 0.25 0.50 1.25 1.40 0.25 0.90 Dimensions shown are nominal in millimeters All tolerances are ±0.10mm Body: Al2O3 ceramic Lid: Kovar or Alloy 42, Au over Ni plated Terminations: Au plating 0.5 - 1.0µm, over a 2 - 6µm Ni plating Pb

2332.5 MHz SAW Filter

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 2 of 7 Target Electrical Specifications (1) Operating Temperature Range: (2) -40 to +85 oC Parameter (3) Minimum Typical Maximum Unit Center Frequency - 2332.5 - MHz Maximum Insertion Loss 2310 - 2355 MHz 1.70 2.0 dB Absolute Attenuation 0880 - 0960 MHz 1710 - 1900 MHz

2106 MHz

2224 MHz

2453 MHz

2570 MHz

0.35 1.0 dB p-p Output Amplitude Balance (|S31/S21|) 2310 - 2355 MHz -1.5 1.5 dB Output Phase Balance [φ(S31)-φ(S21)] 2310 - 2355 MHz -7.5 7.5 degree Source Impedance (single-ended) (4) - 50 - Ω Load Impedance (balanced) (4) - 100 - Ω Notes: 1. All target specifications are bas ed on TriQuint test circuit shown below 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances 4. This is the optimum impedance in order to achieve the performance shown Test Circuit: Actual matching values may vary due to PCB layout and parasitics 50 Ω Single-ended Input 2,5 50Ω 100 Ω 4.7nH 4.7nH 100 Ω Balanced Output PCB: PCB-5BT V-1 Inductor Kit: LQW15AN4N7D10 0402 series inductors Port extension: 58psec (input), 43psec (output+), 43psec (output-)

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 3 of 7 Typical Performance (at +25oC)

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 4 of 7 Target Electrical Specifications (1) Operating Temperature Range: (2) -40 to +85 oC Parameter (3) Minimum Typical Maximum Unit Center Frequency - 2332.5 - MHz Maximum Insertion Loss 2310 - 2355 MHz 1.70 2.0 dB Absolute Attenuation 0880 - 0960 MHz 1710 - 1900 MHz 0.35 1.0 dB p-p Output Amplitude Balance (|S31/S21|) 2310 - 2355 MHz -1.5 1.5 dB Output Phase Balance [φ(S31)-φ(S21)] 2310 - 2355 MHz -7.5 7.5 degree Source Impedance (single-ended) (4) - 50 - Ω Load Impedance (balanced) (4) - 200 - Ω Notes: 1. All target specifications are bas ed on TriQuint test circuit shown below 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances 4. This is the optimum impedance in order to achieve the performance shown Test Circuit: Actual matching values may vary due to PCB layout and parasitics 50 Ω Single-ended Input 2,5 50Ω 200 Ω 3.3nH 3.3nH 18nH 200 Ω Balanced Output PCB: PCB-5BT V-1 Inductor Kit: LQW15AN4N7D10, LQW15AN18NH00 0402 series inductors Port extension: 58ps (input), 43ps (output +), 43ps (output -)

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 5 of 7 Typical Performance (at +25oC)

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 6 of 7 Matching Schematics 50 Ω Single-ended Input 2,5 50Ω 100 Ω 4.7nH 4.7nH 100 Ω Balanced Output 50 Ω Single-ended Input 2,5 50Ω 200 Ω 3.3nH 3.3nH 18nH 200 Ω Balanced Output Marking PCB Footprint Marking code MFG site AD M WWY ID dot Date code 0.15 1.35 0.15 1.00 0.425 0.35 The date code consists of: WW = 2 digit week, Y = last digit of year, M = manufacturing site code This footprint represents a recommendation only Dimensions shown are nominal in millimeters Tape and Reel 1.75 3.5 8.0 A A2.0 4.0 4.0 Ø1.0 Ø1.5 1.73 0.91 0.3 Section A-A 1.47 8.8 ID dot 2.0 Direction of travel Ø330 Ø20.2 Ø13.0 Ø102 2.7 Dimensions shown are nominal in millimeters Packaging quantity: 10,000 units/reel

Subject to change or obsolescence without notice Rev A 06-07 TriQuint Semiconductor, Inc. © Page 7 of 7 Maximum Ratings Parameter Symbol Minimum Maximum Unit Operating Temperature Range T -40 +85 oC Storage Temperature Range T stg -40 +115 oC Important Notes Warnings

  • Electrostatic Sensitive Device (ESD)
  • Avoid ultrasonic exposure RoHS Compliance
  • This product complies with EU directive 2002/95/EC (RoHS) Solderability
  • Compatible with JEDEC J-STD-020C Pb-free process, 260°C peak reflow temperature (see soldering profile) Links to Additional Technical Information PCB Layout Tips Qualification Flowchart Soldering Profile S-Parameters RoHS Information Other Technical Information TriQuint’s liability is limited only to the Surface Acoustic Wave (SAW) component(s) described in this data sheet. TriQuint does not accept any liability for applications, processes, circuits or assemblies, which are implemented using any TriQuint component described in this data sheet. Contact Information PO Box 609501 Orlando, FL 32860-9501 USA Phone: +1 (407) 886-8860 Fax: +1 (407) 886-7061 Email: info-product@tqs.com Web: www.triquint.com Or contact one of our worldwide Network of sales offices, Representatives or distributors Pb