83904A02

ICS83904-02 ICST | Alldatasheet

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Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY

FEATURES

• Four LVCMOS/LVTTL outputs, 19Ω typical output impedance
• Two Crystal oscillator input pairs One LVCMOS/LVTTL clock input
• Crystal input frequencry range: 10MHz - 40MHz
• Output frequency: 200MHz (typical)
• Output Skew: TBD
• Part to Part Skew: TBD
• RMS phase jitter @ 25MHz output, using a 25MHz crystal (100Hz - 1MHz): 0.16ps (typical) @ VDD = VDDO = 3.3V
• RMS phase noise at 25MHz: Offset Noise Power
• Supply Voltage Modes: (Core/Output) 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V
• 0°C to 70°C ambient operating temperature
• Industrial temperature available upon request GENERAL DESCRIPTION The ICS83904-02 is a low skew, high perfor- mance 1-to-4 Crystal Oscillator/Crystal-to- LVCMOS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83904-02 has selectable single ended clock or two crystal-oscillator inputs. There is an output enable to disable the outputs by placing them into a high-impedance state. Guaranteed output and part-to-part skew characteristics make the ICS83904-02 ideal for those applications demanding well defined performance and repeatability. HiPerClockS™ ICS BLOCK DIAGRAM OE CLK_SEL0 CLK_SEL1 CLK OSC OSC 0 0 0 1 1 0 1 1 Pullup ICS83904-02 16-Lead TSSOP 4.4mm x 5.0mm x 0.92mm package body G Package Top View Pulldown Pulldown XTAL_IN0 XTAL_OUT0 XTAL_IN1 XTAL_OUT1 Pulldown

4 LVCMOS Outputs

CLK_SEL0 XTAL_OUT0 XTAL_IN0 VDD XTAL_IN1 XTAL_OUT1 CLK_SEL1 CLK VDDO GND VDDO OE The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. PIN ASSIGNMENT

TABLE 1. PIN DESCRIPTIONS TABLE 2. PIN CHARACTERISTICS TABLE 3. INPUT REFERENCE FUNCTION TABLE

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, θJA 89°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- yond those listed in the DC Characteristics or AC Character- istics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e r o C V V O D D e g a tlo V ylp p u S t u p t u O V I D D t n e rr u C ylp p u S r e w o P A m I O D D t n e rr u C ylp p u S t u p t u O A m TABLE 4D. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 2.5V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e r o C V V O D D e g a tlo V ylp p u S t u p t u O V I D D t n e rr u C ylp p u S r e w o P A m I O D D t n e rr u C ylp p u S t u p t u O A m TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e r o C V V O D D e g a tlo V ylp p u S t u p t u O V I D D t n e rr u C ylp p u S r e w o P A m I O D D t n e rr u C ylp p u S t u p t u O A m TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e r o C V V O D D e g a tlo V ylp p u S t u p t u O V I D D t n e rr u C ylp p u S r e w o P A m I O D D t n e rr u C ylp p u S t u p t u O A m TABLE 4E. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e r o C V V O D D e g a tlo V ylp p u S t u p t u O V I D D t n e rr u C ylp p u S r e w o P A m I O D D t n e rr u C ylp p u S t u p t u O A m

TABLE 5. CRYSTAL CHARACTERISTICS

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY TABLE 6A. AC CHARACTERISTICS, VDD = VDDO = 3.3V ± 5%, TA = 0°C TO 70°C TABLE 6B. AC CHARACTERISTICS, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O L A T X la n r e tx E w z H M K L C la n r e tx E w z H M p t H L h gi H o w o L ale D n oit a g a p o r P E T O N s n t o k s E T O N w e k S t u p t u O D B T s p t p p k s E T O N w e k S tr a P o t-tr a P D B T s p t Ø (tij m o d n a R e ttiJ e s a h P S M R E T O N e g n a R n oit a r g e t n I H M z H M z H s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O t N E E T O N e m i T elb a n E t u p t u O s n t S I D E T O N e m i T elb a si D t u p t u O s n V m o rf d e r u s a e M E T O N D D V o t t u p ni e h t f o O D D u p t u o e h t f o d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N d n a s e g a tlo v ylp p u s e m a s e h t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N V t a d e r u s a e m sit u p t u o e h t e civ e d h c a e n o t u p nif o e p yt e m a s e h t g nis U n oitid n o c d a olla u q e h ti w O D D d e s u e c r u o s t u p ni e h t n o t n e d n e p e d si r e ttij e s a h P E T O N n oitc u d o r p ni d e ts e t t o N n oit a zir e tc a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h T E T O N l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O L A T X la n r e tx E w z H M K L C la n r e tx E w z H M p t H L h gi H o w o L ale D n oit a g a p o r P E T O N s n t o k s E T O N w e k S t u p t u O D B T s p t p p k s E T O N w e k S tr a P o t-tr a P D B T s p t Ø (tij m o d n a R e ttiJ e s a h P S M R E T O N e g n a R n oit a r g e t n I H M z H M z H s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O t N E E T O N e m i T elb a n E t u p t u O s n t S I D E T O N e m i T elb a si D t u p t u O s n V m o rf d e r u s a e M E T O N D D V o t t u p ni e h t f o O D D u p t u o e h t f o d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N d n a s e g a tlo v ylp p u s e m a s e h t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N V t a d e r u s a e m sit u p t u o e h t e civ e d h c a e n o t u p nif o e p yt e m a s e h t g nis U n oitid n o c d a olla u q e h ti w O D D d e s u e c r u o s t u p ni e h t n o t n e d n e p e d si r e ttij e s a h P E T O N n oitc u d o r p ni d e ts e t t o N n oit a zir e tc a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h T E T O N

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY TABLE 6D. AC CHARACTERISTICS, VDD = VDDO = 2.5V ± 5%, TA = 0°C TO 70°C TABLE 6C. AC CHARACTERISTICS, VDD = 3.3V ± 5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O L A T X la n r e tx E w z H M K L C la n r e tx E w z H M p t H L h gi H o w o L ale D n oit a g a p o r P E T O N s n t o k s E T O N w e k S t u p t u O D B T s p t p p k s E T O N w e k S tr a P o t-tr a P D B T s p t Ø (tij m o d n a R e ttiJ e s a h P S M R E T O N e g n a R n oit a r g e t n I H M z H M z H s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O t N E E T O N e m i T elb a n E t u p t u O s n t S I D E T O N e m i T elb a si D t u p t u O s n V m o rf d e r u s a e M E T O N D D V o t t u p ni e h t f o O D D u p t u o e h t f o d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N d n a s e g a tlo v ylp p u s e m a s e h t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N V t a d e r u s a e m sit u p t u o e h t e civ e d h c a e n o t u p nif o e p yt e m a s e h t g nis U n oitid n o c d a olla u q e h ti w O D D d e s u e c r u o s t u p ni e h t n o t n e d n e p e d si r e ttij e s a h P E T O N n oitc u d o r p ni d e ts e t t o N n oit a zir e tc a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h T E T O N l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O L A T X la n r e tx E w z H M K L C la n r e tx E w z H M p t H L h gi H o w o L ale D n oit a g a p o r P E T O N s n t o k s E T O N w e k S t u p t u O D B T s p t p p k s E T O N w e k S tr a P o t-tr a P D B T s p t Ø (tij m o d n a R e ttiJ e s a h P S M R E T O N e g n a R n oit a r g e t n I H M z H M z H s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O t N E E T O N e m i T elb a n E t u p t u O s n t S I D E T O N e m i T elb a si D t u p t u O s n V m o rf d e r u s a e M E T O N D D V o t t u p ni e h t f o O D D u p t u o e h t f o d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N d n a s e g a tlo v ylp p u s e m a s e h t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N V t a d e r u s a e m sit u p t u o e h t e civ e d h c a e n o t u p nif o e p yt e m a s e h t g nis U n oitid n o c d a olla u q e h ti w O D D d e s u e c r u o s t u p ni e h t n o t n e d n e p e d si r e ttij e s a h P E T O N n oitc u d o r p ni d e ts e t t o N n oit a zir e tc a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h T E T O N

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY TABLE 6E. AC CHARACTERISTICS, VDD = 2.5V ± 5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O L A T X la n r e tx E w z H M K L C la n r e tx E w z H M p t H L h gi H o w o L ale D n oit a g a p o r P E T O N s n t o k s E T O N w e k S t u p t u O D B T s p t p p k s E T O N w e k S tr a P o t-tr a P D B T s p t Ø (tij m o d n a R e ttiJ e s a h P S M R E T O N e g n a R n oit a r g e t n I H M z H M z H s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O t N E E T O N e m i T elb a n E t u p t u O s n t S I D E T O N e m i T elb a si D t u p t u O s n V m o rf d e r u s a e M E T O N D D V o t t u p ni e h t f o O D D u p t u o e h t f o d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N d n a s e g a tlo v ylp p u s e m a s e h t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N V t a d e r u s a e m sit u p t u o e h t e civ e d h c a e n o t u p nif o e p yt e m a s e h t g nis U n oitid n o c d a olla u q e h ti w O D D d e s u e c r u o s t u p ni e h t n o t n e d n e p e d si r e ttij e s a h P E T O N n oitc u d o r p ni d e ts e t t o N n oit a zir e tc a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h T E T O N

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY TYPICAL PHASE NOISE AT 25MHZ -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 10k 100k 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.16ps (typical) OFFSET FREQUENCY (HZ) NOISE POWER dBc Hz Raw Phase Noise Data

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY PARAMETER MEASUREMENT INFORMATION SCOPE Qx LVCMOS 3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 2.4V±0.065V VDDO -0.9V±0.1V VDD 0.9V±0.1V SCOPE Qx LVCMOS 2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 2.05V±5% VDDO -1.25V±5% VDD 1.25V±5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE Qx LVCMOS 1.65V±5% -1.65V±5% 3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT 2.5 CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT PART-TO-PART SKEW SCOPE Qx LVCMOS 1.25V±5% -1.25V±5% SCOPE Qx LVCMOS 1.6V±0.025V VDDO -0.9V±0.1V VDD 0.9V±0.1V VDD, VDDO GND VDD, VDDO GND GND GND GND tsk(pp) VDDO VDDO Qy Qx Part 1 Part 2

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY Clock Outputs 20% 80% 80% 20% tR tF tPERIOD tPW tPERIOD odc = VDDO x 100% tPW Q0:Q3 tpLH VDDO VDD CLK Q0:Q3 OUTPUT RISE/FALL TIME PROPAGATION DELAY OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD

Systems, Inc. 83904AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 8, 2005 ICS83904-02 LOW SKEW, 1-TO-4 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PRELIMINARY INPUTS: CRYSTAL INPUT: For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating. Though not required, but for additional protection, a 1kΩ resister can be tied from XTAL_IN to ground. CLK INPUT: For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1kΩ resister can be tied from the CLK input to ground. TEST CLK INPUT: For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1kΩ resister can be tied from the TEST_CLK to ground. CLK/nCLK INPUT: For applications not requiring the use of the differential input, both CLK and nCLK can be left floating. Though not required, but for additional protection, a 1kΩ resister can be tied from CLK to ground. PCLK/nPCLK INPUT: For applications not requiring the use of a differential input, both the PCLK and nPCLK pins can be left floating. Though not required, but for additional protection, a 1kΩ resister can be tied from PCLK to ground. SELECT PINS: All select pins have internal pull-ups and pull-downs; additional resistance is not required but can be added for additional protection. A 1kΩ resister can be used. RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS OUTPUTS: LVCMOS OUTPUT: All unused LVCMOS output can be left floating. We recommend that there is no trace attached. LVPECL OUTPUT All unused LVPECL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. LVHSTL OUTPUT All unused LVHSTL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. LVDS OUTPUT All unused LVDS outputs should be terminated with 100Ω resister between the differential pair. LVDS – Like OUTPUT All unused LVDS outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. HCSL OUTPUT All unused HCSL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. SSTL OUTPUT All unused SSTL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated.

TABLE 7. θJAVS. AIR FLOW TABLE FOR 16 LEAD TSSOP NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

TABLE 8. PACKAGE DIMENSIONS

TABLE 9. ORDERING INFORMATION for use in life support devices or critical medical instruments. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.