7483A FAIRCHILD | Alldatasheet

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2 PINOUT A

0/00 §a/7483A VO force SALS/TALS83A af Fie]es 4-BIT BINARY FULL ADDER (With Fast Carry) ee ES ¥ «Bi [Fajcs 82 [4] [73] Co vec [5] [12] GND s [5] Fae. [7] [70] Ac ac [9]So DESCRIPTION — The '83A high speed 4-bit binary full adders with internal LOGIC SYMBOL carry lookahead accept two 4-bit binary words (Ao — A3, Bo — Bs) anda Carry input (Co). They generate the binary Sum outputs (So—S3) and the Carry output (C4) from the most significant bit. They operate with either HIGH or active LOW operands (positive or negative logic). The '283 is recommended for new designs since it features standard corner power pins. wie 7 sa sae Taos Av BAB? AD Bs ORDERING CODE: See Section 9 n—le cde pin | COMMERCIAL GRADE| MILITARY GRADE | 5.4 esse PKGS Veco = +5.0 V +5%, Voc = +5.0 V +10%, OUT! ta=orctot70°C | Ta=-s5°C to +125°C | TYPE 36245 Plastic DIP iP) TABSAPC, TALSBSAPC | sd | Ceramic | 4 |7483ADC, 74LS83ADC_|5483ADM, 54LS83ADM DIP (D) Veo = Pin 5 Flatpak GND = Pin 12 ne 7483AFC, 74LS83AFC |5483AFM, 54LS83AFM INPUT LOADING/FAN-OUT: See Section 3 for ULL. definitions PIN NAMES DESCRIPTION HGHILOW HIGH/LOW Ao—As A Operand Inputs 1.0/1.0 1.0/0.5 Bo— Bs B Operand Inputs 1.0/1.0 1.0/0.5 Co Carry Input 1.0/1.0 0.5/0.25 So— Ss Sum Outputs 20/10 10/5.0 (2.6) Ca Carry Output 10/5.0 10/5.0 (2.9) 4-98

FUNCTIONAL DESCRIPTION — The'83A adds two 4-bit binary words (A and ) plus the incoming carry. The binary sum appears on the sum outputs (So — Sg) and outgoing carry (C4) outputs. Co + (Ao + Bo) + 2 (Ar + Br) + 4 (Ag + B2) + 8 (Ag + Bg) = So + 281 + 4S2 + BS3 + 16C4 Where: (+ = plus Due to the symmetry of the binary add function the '83A can be used with either all inputs and outputs active HIGH (positive logic) or with all inputs and outputs active LOW (negative logic). Note that with active HiGH inputs, Carry In can not be left open, but must be held LOW when no carry in is intended. interchanging inputs of equal weight does not affect the operation, thus Co, Ag, Bo can be arbitrarily assigned to pins 10, 11, 13, etc. TRUTH TABLE INPUTS OUTPUTS. Co Ao Ar Az As Bo Bi Be B3|So Si So Ss Ca Logiclevels [L [LH L H[H L L HH HL Ln] Active HIGH 0 1 o 41 1 oo 1 1 1 o 0 (10+9=19) Active LOW 1.0 1 ofo 11 ofo 0 1 4 (carry +5 +6 = 12 H= HIGH Voltage Love! C= LOW Voltage Level LOGIC DIAGRAM Co Ao Bo AY By Ae 8B AS Bs ar U 1 Ht | LI uJ | YUU UO Vis) VU a ee ae 8 a ++] PT Te a a 0 A 6 Vr V ' V = V - V i 4) eT ali UUOUU so s: se © cs 4-99

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) los Output Short Circuit +20 -55] -20 -100 Veo = Max Current at Sn -18. -55 | -20 -100 los Output Short Circuit — | xm | -20 -70 [-20 -100[ Veo = Max Current at Ca -18 -70 | -20. -100 [ xm | Veo = Max, lec Power Supply Current |_XM 39) na Inputs = Gnd 'LS83A) 39 Inputs = 4.5 V ('83A) AC CHARACTERISTICS: Vcc = 5.0 V, Ta = 25°C (See Section 3 for waveforms and load configurations) SYMBOL PARAMETER CL =15 pF[C. = 15 pF] UNITS CONDITIONS Ri = 4000 teLH Propagation Delay 21 tPHL Co to Sa 21 Figa. 3-4, 3-20 | teu Propagation Delay 24 tere An or Bn to Sn 24 Figs. 3-1, 3-20 tPLH Propagation Delay 14 17 Figs. 3-1, 3-5 tere Co to Cs 16 17 Ru = 780 9 ('83A) teLH Propagation Delay 7 Figs. 3-1, 3-5 teHL An Or Bn to C4 7 Ru = 780 2 ('83A) 4-100