74393 HARRIS | Alldatasheet

Document overview

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Technical content

Features

  • Fully Static Operation
  • Buffered Inputs
  • Common Reset
  • Negative-Edge Clocking
  • Typical f MAX = 60 MHz at VCC = 5V, CL = 15pF, TA = 25oC
  • Fanout (Over Temperature Range)
  • Wide Operating Temperature Range . . . -55oC to 125oC
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types - 2V to 6V Operation - High Noise Immunity: N IL = 30%, NIH = 30%of VCC at VCC = 5V
  • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, V IL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il≤ 1µA at VOL , VOH

Description

The Harris CD74HC393 and CD74HCT393 are 4-stage ripple-carry binary counters. Al counter stages are master- slave flip-flops. The state of the stage advances one count on the negative transition of each clock pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered. Pinout CD74HC393, CD74HCT393 (PDIP, SOIC) TOP VIEW

Ordering Information

PART NUMBER TEMP. RANGE ( oC) PACKAGE PKG. NO. CD74HC393E -55 to 125 14 Ld PDIP E14.3 CD74HCT393E -55 to 125 14 Ld PDIP E14.3 CD74HC393M -55 to 125 14 Ld SOIC M14.15 CD74HCT393M -55 to 125 14 Ld SOIC M14.15 NOTES: 1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. 2. Wafer or die for this part number is available which meets all elec- trical specifications. Please contact your local sales office or Harris customer service for ordering information. 1CP 1MR 1Q0 1Q1 1Q2 1Q3 GND V CC 2CP 2MR 2Q0 2Q1 2Q2 2Q3 September 1997 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 File Number 1653.1 CD74HC393, CD74HCT393 High Speed CMOS Logic Dual 4 -Stage Binary Counter

GND = 7 VCC = 14 1Q 2 1Q 3 1Q 1 1Q 0 2Q 2 2Q 3 2Q 1 2Q 0 BINARY BINARY 1CP 2CP COUNTER COUNTER 1MR 2MR TRUTH TABLE CP COUNT OUTPUTS Q 0 Q 1 Q 2 Q 3 0LLLL 1HLLL 2LHLL 3HHLL 4LLHL 5HLHL 6LH HL 7HHHL 8LLLH 9HLLH 1 0 LHLH

11 H H L H

12 L L H H

13 H L H H

↑ L No Change ↓ L Count X H L L L L NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, ↑ = Transition from Low to High Level,↓ = Transition from High to Low. CD74HC393, CD74HCT393

1(13) 2(12) Q Q Q 0 Q 1 Q 2 Q 3 R Q Q Q Q Q Q R R R Φ Φ ΦΦΦ Φ Φ Φ CD74HC393, CD74HCT393

Absolute Maximum Ratings Thermal Information DC Input Diode Current, IIK DC Output Diode Current, IOK DC Output Source or Sink Current per Output Pin, IO Operating Conditions Supply Voltage Range, VCC DC Input or Output Voltage, V Input Rise and Fall Time Thermal Resistance (Typical, Note 3) θ JA (oC/W) (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θJA is measured with the component mounted on an evaluation PC board in free air. PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40 oC TO 85oC -55 oC TO 125oC UNITSVI(V) I O (mA) MIN TYP MAX MIN MAX MIN MAX HC TYPES High Level Input Voltage V Low Level Input Voltage High Level Output Voltage CMOS Loads V OH VIH or VIL -0.02 2 1.9 - - 1.9 - 1.9 - V High Level Output Voltage TTL Loads - - --- - - - - V Low Level Output Voltage CMOS Loads V OL VIH or VIL 0.02 2 - - 0.1 - 0.1 - 0.1 V Low Level Output Voltage TTL Loads - - --- - - - - V Input Leakage Current I I VCC or GND Quiescent Device Current ICC VCC or GND 0 6 - - 8 - 80 - 160 µA CD74HC393, CD74HCT393

VIH - - 4.5 to 5.5 2-- 2 - 2 - V Low Level Input Voltage VIL - - 4.5 to 5.5 High Level Output Voltage CMOS Loads V High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads V Low Level Output Voltage TTL Loads Input Leakage Current I I VCC and GND Quiescent Device Current ICC VCC or GND 0 5.5 - - 8 - 80 - 160 µA Additional Quiescent Device Current Per Input Pin: 1 Unit Load ΔI CC VCC -2.1 - 4.5 to 5.5 - 100 360 - 450 - 490 µA NOTE: For dual-supply systems theorectical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA. PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40 oC TO 85oC -55 oC TO 125oC UNITSVI(V) I O (mA) MIN TYP MAX MIN MAX MIN MAX HCT Input Loading Table INPUT UNIT LOADS nCP 0.4 nMR 1 NOTE: Unit Load isΔICC limit specified in DC Electrical Table, e.g., 360µA max at 25oC. Prerequisite for Switching Specifications PARAMETER SYMBOL V CC (V) 25oC -40 oC TO 85oC -55 oC TO 125oC UNITSMIN TYP MAX MIN MAX MIN MAX HC TYPES Maximum Clock Frequency f MAX 2 6--5-4- n s 4.5 30 - - 24 - 20 - ns 6 3 5- -2 8-2 4-n s Clock Pulse Width t W 2 80 - - 100 - 120 - ns 4.5 16 - - 20 - 24 - ns 6 1 4- -1 7-2 0-n s Reset Recovery Time t REC 2 5--5-5- n s 4 . 5 5--5-5- n s 6 5--5-5- n s CD74HC393, CD74HCT393

Reset Pulse Width t W 2 80 - - 100 - 120 - ns 4.5 16 - - 20 - 24 - ns 6 1 4- -1 7-2 0-n s HCT TYPES Maximum Clock Frequency f MAX 4.5 27 - - 22 - 18 - MHz Clock Pulse Width t W 4.5 19 - - 24 - 29 - ns Reset Recovery Time t REC 4 . 5 5--5-5- n s Reset Pulse Width t W 4.5 16 - - 20 - 24 - ns Switching SpecificationsInput tr, tf = 6ns PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40 oC TO 85oC -55 oC TO 125oC UNITSMIN TYP MAX MIN MAX MIN MAX HC TYPES Propagation Delay Time (Figure 1) tPLH, tPHL C L = 50pF 2 - - 45 - 55 - 70 ns Q n to Qn + 1 4.5 - - 9 - 11 - 14 ns C L =15pF 5 - 4 - - - - - ns C L = 50pF 6 - - 8 - 9 - 12 ns nCP to nQ0 tPLH, tPHL C L = 50pF 2 - - 150 - 190 - 225 ns 4.5 - - 30 - 38 - 59 ns C L =15pF 5 - 12 - - - - - ns C L = 50pF 6 - - 26 - 33 - 50 ns nCP to nQ1 tPLH, tPHL C L = 50pF 2 - - 190 - 245 - 295 ns 4.5 - - 38 - 49 - 59 ns 6 - - 33 - 42 - 50 ns nCP to nQ2 tPLH, tPHL C L = 50pF 2 - - 240 - 300 - 360 ns 4.5 - - 48 - 60 - 72 ns 6 - - 41 - 51 - 61 ns nCP to nQ3 tPLH, tPHL C L = 50pF 2 - - 285 - 355 - 430 ns 4.5 - 57 - 71 - 86 ns 6 - - 48 - 60 - 73 ns MR to Qn tPLH, tPHL C L = 50pF 2 - - 135 - 170 - 205 ns 4.5 - - 27 - 34 - 41 ns C L =15pF 5 - 11 - - - - - ns C L = 50pF 6 - - 23 - 29 - 35 ns Output Transition Time (Figure 1) tTLH , tTHL C L = 50pF 2 - - 75 - 95 - 110 ns 4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns Input Capacitance C IN C L = 50pF - - - 10 - 10 - 10 pF Power Dissipation Capacitance (Notes 4, 5) C PD C L =15pF 5 - 20 - - - - - pF Prerequisite for Switching Specifications (Continued) PARAMETER SYMBOL V CC (V) 25oC -40 oC TO 85oC -55 oC TO 125oC UNITSMIN TYP MAX MIN MAX MIN MAX CD74HC393, CD74HCT393