650R-22

ICS650-22 ICST | Alldatasheet

Document overview

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Technical content

Features

• Packaged in 20-pin narrow SSOP (QSOP)
• Available in Pb (lead) free package
• 27 MHz fundamental crystal or clock input
• Zero ppm synthesis error in all clocks
• Low skew 33.33 MHz clock outputs
• Output enable controls all outputs
• Full CMOS output swing with 25 mA output drive capability at TTL levels
• Advanced, low-power, sub-micron CMOS process
• 3.3 V +10% operating voltage Block Diagram Crystal OSC Clock Synthesis and Control Circuitry

66.66 MHz

33.33 MHz

27 MHz

48 MHz

100 MHz

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS650-22 Pin Assignment Pin Descriptions VDD VDD VDD 33M OE 66M 33M GND X1/ICLK VDD 33M 33M GND 100M VDD GND 48M VDD GND 20-pin (150 mil) SSOP Pin Number Pin Name Pin Type Pin Description GND Power Connect to ground. Input Connect to a crystal input or leave open for ICLK. X1/ICLK Input Connect to a crystal or reference clock input. 4, 5 VDD Power Connect to +3.3 V. GND Power Connect to ground. 48M Output 48 MHz clock output. VDD Power Connect to +3.3 V. 66M Output 66 MHz clock output. GND Power Connect to ground. OE Input Output enable active high. Internal pull-up resistor. 12, 13 33M Output 33.33 MHz clock output. GND Power Connect to ground. 15, 16 VDD Power Connect to +3.3 V. 17, 18 33M Output 33.33 MHz clock output. 100M Output 100 MHz clock output. VDD Power Connect to +3.3 V.

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS650-22 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS650-22. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions Unless stated otherwise, VDD = 3.3V ±10%, Ambient Temperature 0 to +70°C Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature -40 to +85°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C Parameter Min. Typ. Max. Units Ambient Operating Temperature +70 Power Supply Voltage (measured in respect to GND) +3.0 +3.3 +3.6 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 3.3 3.6 V Input High Voltage VIH VDD/2+1 VDD/2 V Input Low Voltage VIL VDD/2 VDD/2-1 V Output High Voltage VOH IOH = -25 mA 2.4 V Output Low Voltage VOL IOL = +25 mA 0.5 V Output High Voltage VOL IOH = -8 mA VDD-0.4 V Operating Supply Current IDD No Load, OE=1 mA No Load, OE=0 mA Short Circuit Current IOS Each output ±70 mA Internal Pull-up Resistor RPU Input select 390 kΩ

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS650-22 Unless stated otherwise, VDD = 3.3V ±10%, Ambient Temperature 0 to +70° C Note 1: Measured with a 15 pF load. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency MHz Output Rise Time tOR 0.8 to 2.0 V (note 1) 500 ps Output Fall Time tOF 2.0 to 0.8 V (note 1) 500 ps Output Clock Duty Cycle At VDD/2 (note 1) Frequency Error All clocks ppm Absolute Jitter, short term 33M, 100M clocks (note 1) +100 ps Absolute Jitter, short term 48M clock (note 1) +160 ps Absolute Jitter, short term 66M clock (note 1) +140 ps Output-to-output Skew, 33M only Rising edge at VDD/2 (note 1) 150 ps Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θJA Still air 135 °C/W θJA 1 m/s air flow °C/W θJA 3 m/s air flow °C/W Thermal Resistance Junction to Case θJC °C/W

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS650-22 Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

“LF” denotes Pb (lead) free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature ICS650R-22 650R-22 Tubes 20-pin SSOP 0 to +70°C ICS650R-22T 650R-22 Tape and Reel 20-pin SSOP 0 to +70°C ICS650R-22LF 650R-22L Tubes 20-pin SSOP 0 to +70°C ICS650R-22LFT 650R-22L Tape and Reel 20-pin SSOP 0 to +70°C INDEX AREA 1 2 D E SEATING PLANE A A A e - C - b .10 (.004) C c L Millimeters Inches Symbol Min Max Min Max A 1.35 1.75 .053 .069 0.10 0.25 .0040 .010 1.50 .059 b 0.20 0.30 0.008 0.012 C 0.18 0.25 .007 .010 D 8.55 8.75 .337 .344 E 5.80 6.20 .228 .244 3.80 4.00 .150 .157 e

0.635 Basic

0.025 Basic

L 0.40 1.27 .016 .050 α