601R-25LF

ICS601-25 ICST | Alldatasheet

Document overview

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Technical content

Features

• Packaged in 20-pin SSOP
• Uses fundamental 10 - 27 MHz crystal or clock
• Output clocks up to 156 MHz
• Low phase noise: -132 dBc/Hz at 10 kHz
• Five low skew (<250 ps) outputs
• Low jitter - 18 ps one sigma at 125 MHz
• Full swing CMOS outputs with 25 mA drive capability at TTL levels
• Powerdown mode lowers power consumption
• Advanced, low power, sub-micron CMOS process
• Industrial temperature version available
• Available in Pb (lead) free package
• Operating voltage of 3.3 V Block Diagram CLK1 ROM Based Multipliers VCO Divide X1/ICLK Crystal or clock input Crystal Oscillator Reference Divider Phase Comparator VDD Charge Pump Loop Filter VCO S3:0 PD CLK5 CLK4 CLK3 CLK2 GND

LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER MDS 601-25 C Revision 071505 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS601-25 Pin Assignment Output Select Table Pin Descriptions GND CLK3 GND VDD PD CLK1 VDD CLK5 CLK4

20 Pin (150 mil) SSOP

Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode crystal or clock input. VDD Power Connect to +3.3 V. Input Select pin 0. Internal pull-up. 4, 5 VDD Power Connect to +3.3 V. Input Select pin 1. Internal pull-up. GND Power Connect to ground. Input Select pin 3. Internal pull-down. PD Input Powerdown when held low. Internal pull-up. Input Select pin 2. Internal pull-up. CLK1 Output Clock output. VDD Power Connect to +3.3 V. CLK5 Output Clock output. CLK4 Output Clock output. GND Power Connect to ground. CLK3 Output Clock output. CLK2 Output Clock output. VDD Power Connect to +3.3 V. GND Power Connect to ground. XO Crystal connection. Connect to a 10-27 MHz fundamental parallel mode crystal or leave unconnected for clock input.

LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER MDS 601-25 C Revision 071505 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS601-25 External Components The ICS601-25 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01 µF and 0.1 µF should be connected between VDD and GND, as close to the part as possible. A 33Ω series terminating resistor should be used on each clock output. The crystal must be connected as close to the chip as possible. The crystal should be fundamental mode, parallel resonant. Do not use third overtone. For exact tuning when using a crystal, capacitors should be connected from pins X1 to ground and X2 to ground. In general, the value of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL-5) x 2. So for a crystal with 16 pF load capacitance, two 22 pF caps can be used. For any given board layout, ICS can measure the board capacitance and recommend the exact capacitance value to use. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS601-25. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions VDD=3.3 V ±10%, Ambient temperature -40 to +85°C Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature, Commercial version 0 to +70 °C Ambient Operating Temperature, Industrial version -40 to +85 °C Storage Temperature -65 to +150 °C Junction Temperature 125 °C Soldering Temperature 260 °C Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) +70 Ambient Operating Temperature (industrial) -40 +85 Power Supply Voltage (measured in respect to GND) +2.97 +3.63 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 2.97 3.63 V Input High Voltage VIH X1/ICLK pin only VDD/2+1 V Input Low Voltage VIL X1/ICLK pin only VDD/2-1 V

LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER MDS 601-25 C Revision 071505 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS601-25 VDD = 3.3V ±10%, Ambient Temperature -40 to +85° C Note 1: Measured with 15 pF load Parameter Symbol Conditions Min. Typ. Max. Units Input High Voltage VIH VDD V Input Low Voltage VIL 0.8 V Output High Voltage, CMOS level VOH IOH = -4 mA VDD-0.4 V Output High Voltage VOH IOL = -12 mA 2.4 V Output Low Voltage VOL IOL = 12 mA 0.4 V Operating Supply Current IDD No load, 125 MHz mA Short Circuit Current IOS Each output ± 40 ± 60 mA Input Capacitance Select pins pF Output Impedance ZOUT Ω On Chip Pull-up Resistor RPU S2, S1, S0, PD pins 510 kΩ On Chip Pull-down Resistor RPD S3 pin 240 kΩ Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency MHz Output Frequency At 3.3V 156 MHz Output Rise Time tOR 0.8 to 2.0 V, Note 1 1.5 ns Output Fall Time tOF 0.8 to 2.0 V, Note 1 1.5 ns Output Clock Duty Cycle At VDD/2, Note 1 Maximum Absolute jitter, short term, 125 MHz Note 1 ±50 ±75 ps Maximum jitter, one sigma, 125 MHz (x5) Note 1 ps Phase Noise, relative to carrier,

125 MHz (x5)

100 Hz offset

-90 -95 dBc/Hz Phase Noise, relative to carrier, -115 -120 dBc/Hz Phase Noise, relative to carrier, -118 -123 dBc/Hz Phase Noise, relative to carrier, -115 -120 dBc/Hz Output to Output Skew 25M in, 125M out, Note 1 250 ps

LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER MDS 601-25 C Revision 071505 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS601-25 Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature ICS601R-25 ICS601R-25 Tubes 20-pin SSOP 0 to +70° C ICS601R-25T ICS601R-25 Tape and Reel 20-pin SSOP 0 to +70° C ICS601R-25I ICS601R-25I Tubes 20-pin SSOP -40 to 85° C ICS601R-25IT ICS601R-25I Tape and Reel 20-pin SSOP -40 to 85° C ICS601R-25LF 601R-25LF Tubes 20-pin SSOP 0 to +70° C ICS601R-25LFT 601R-25LF Tape and Reel 20-pin SSOP 0 to +70° C ICS601R-25ILF 601R-25ILF Tubes 20-pin SSOP -40 to 85° C ICS601R-25ILFT 601R-25ILF Tape and Reel 20-pin SSOP -40 to 85° C INDEX AREA 1 2 D E SEATING PLANE A e - C - b aaa C c L *For reference only. Controlling dimensions in mm. Millimeters Inches* Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 0.10 0.25 .0040 0.0098 1.50 .059 b 0.20 0.30 0.008 0.012 C 0.18 0.25 .007 .010 D 8.55 8.75 .337 .344 E 5.80 6.20 .228 .244 3.80 4.00 .1497 .1574 e

0.635 Basic

0.025 Basic

L 0.40 1.27 .016 .050 α aaa 0.10 0.004