ICS85222-01 ICST | Alldatasheet
Document overview
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Technical content
www.icst.com/products/hiperclocks.html REV. A NOVEMBER 15, 2005 Integrated Circuit Systems, Inc. ICS85222-01 DUAL LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR GENERAL DESCRIPTION The ICS85222-01 is a Dual LVCMOS / LVTTL- to-Differential HSTL translator and a member of the HiPerClocks™ family of High Performance Clock Solutions from ICS. The ICS85222-01 has two single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and trans- lates them to HSTL levels. The small outline 8-pin SOIC pack- age makes this device ideal for applications where space, high performance and low power are important.
FEATURES
- Two differential HSTL outputs
- CLK0, CLK1 LVCMOS/LVTTL clock inputs
- CLK0 and CLK1 can accept the following input levels: LVCMOS or LVTTL
- Maximum output frequency: 350MHz
- Part-to-part skew: 375ps (maximum)
- Propagation delay: 1075ps (maximum)
- VOH: 1.4V (maximum)
- Full 3.3V and 2.5V operating supply voltage
- 0°C to 70°C ambient operating temperature
- Industrial temperature information available upon request
- Available in both standard and lead-free RoHS-compliant packages BLOCK DIAGRAM PIN ASSIGNMENT ICS85222-01 8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package Top View nQ0 nQ1 nQ0 nQ1 CLK0 CLK1 HiPerClockS™ ICS VDD CLK0 CLK1 GND
TABLE 1. PIN DESCRIPTIONS TABLE 2. PIN CHARACTERISTICS
www.icst.com/products/hiperclocks.html REV. A NOVEMBER 15, 2005 Integrated Circuit Systems, Inc. ICS85222-01 DUAL LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5% OR VDD = 2.5V±5%, TA = 0°C TO 70°C TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5% OR VDD = 2.5V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S e vitis o P V V D D e g a tlo V ylp p u S e vitis o P V I D D t n e rr u C ylp p u S r e w o P A m l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V H I e g a tlo V h gi H t u p n I K L C K L C V D D V V L I e g a tlo V w o L t u p n I K L C K L C V I H I t n e rr u C h gi H t u p n I K L C K L C V D D V N I V A µ V D D V N I V I L I t n e rr u C w o L t u p n I K L C K L C V D D V N I V A µ V D D V N I V TABLE 3C. HSTL DC CHARACTERISTICS, VDD = 3.3V±5% OR VDD = 2.5V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V H O E T O N e g a tlo V h gi H t u p t u O V V L O E T O N e g a tlo V w o L t u p t u O V D D V V V D D V V V G N I W S g ni w S e g a tlo V t u p t u O k a e P o k a e P V D D V V V D D V V h ti w d e t a ni m r e t st u p t u O E T O N Ω D N G o t ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5V Outputs, IO Continuous Current 50mA Surge Current 100mA Package Thermal Impedance, θJA 112.7°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- yond those listed in the DC Characteristics or AC Character- istics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
www.icst.com/products/hiperclocks.html REV. A NOVEMBER 15, 2005 Integrated Circuit Systems, Inc. ICS85222-01 DUAL LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR TABLE 4A. AC CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O z H M t D P E T O N ale D n oit a g a p o r P s p t p p k s E T O N w e k S tr a P o t-tr a P s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O ƒ ≤ z H M ƒ z H M ƒ z H M V m o rf d e r u s a e M E T O N D D nio p g nis s o r c t u p t u o lait n e r e ffid e h t o t t u p ni e h t f o d a olla u q e h ti w d n a s e g a tlo v ylp p u s e m a s e h t t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N .st nio p s s o r c lait n e r e ffid e h t t a d e r u s a e m e r a st u p t u o e h t e civ e d h c a e n o st u p ni f o e p yt e m a s e h t g nis U n oitid n o c d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N TABLE 4B. AC CHARACTERISTICS, VDD = 2.5V±5%, TA = 0°C TO 70°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U f X A M y c n e u q e r F t u p t u O z H M t D P E T O N ale D n oit a g a p o r P s p t p p k s E T O N w e k S tr a P o t-tr a P s p tR t F e m i T lla F e si R t u p t u O o t s p c d o elc y C yt u D t u p t u O ƒ ≤ z H M ƒ z H M V m o rf d e r u s a e M E T O N D D nio p g nis s o r c t u p t u o lait n e r e ffid e h t o t t u p ni e h t f o d a olla u q e h ti w d n a s e g a tlo v ylp p u s e m a s e h t t a g nit a r e p o s e civ e d t n e r e ffid n o st u p t u o n e e w t e b w e k s s a d e nif e D E T O N .st nio p s s o r c lait n e r e ffid e h t t a d e r u s a e m e r a st u p t u o e h t e civ e d h c a e n o st u p ni f o e p yt e m a s e h t g nis U n oitid n o c d r a d n a t S C E D E J h ti w e c n a d r o c c a ni d e nif e d si r e t e m a r a p sih T E T O N
www.icst.com/products/hiperclocks.html REV. A NOVEMBER 15, 2005 Integrated Circuit Systems, Inc. ICS85222-01 DUAL LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR PARAMETER MEASUREMENT INFORMATION 2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT PROPAGATION DELAY OUTPUT RISE/FALL TIME Clock Outputs 20% 80% 80% 20% tR tF VSWING 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE HSTL Qx nQx tsk(pp) nQx Qx nQy Qy PART 1 PART 2 CLK0, CLK1 nQ0, nQ1 Q0, Q1 tPD VDD VDD 3.3V ± 5% OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD tPW tPERIOD tPW tPERIOD odc = x 100% nQ0, nQ1 Q0, Q1 GND PART-TO-PART SKEW SCOPE HSTL Qx nQx VDD 2.5V ± 5% GND
This section provides information on power dissipation and junction temperature for the ICS85222-01. Equations and example calculations are also provided. The total power dissipation for the ICS85222-01 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 5 below. and the type of board (single layer or multi-layer). NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TABLE 5. THERMAL RESISTANCE θθθθθJA FOR 8-PIN SOIC, FORCED CONVECTION
- Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load. HSTL output driver circuit and termination are shown in Figure 3. To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load. Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. FIGURE 3. HSTL DRIVER CIRCUIT AND TERMINATION
TABLE 6. θJAVS. AIR FLOW TABLE 8 LEAD SOIC NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 7. PACKAGE DIMENSIONS
TABLE 8. ORDERING INFORMATION product for use in life support devices or critical medical instruments. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
www.icst.com/products/hiperclocks.html REV. A NOVEMBER 15, 2005 Integrated Circuit Systems, Inc. ICS85222-01 DUAL LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR T E E H S Y R O T S I H N O I S I V E R v e R e l b a T e g a P e g n a h C f o n o it p ir c s e D e t a D A T d e d n E elg ni S t p e c c A o t t u p n I lait n e r e ffi D e h t g niri W e t o N n oit a cilp p A d e d d A sle v e L e b m u n tr a p e e r F d a e L d e d d a elb a T n oit a m r o f n I g nir e d r O A T ellu b e e rf- d a el d e d d A d e d d A ni P t u p t u O d n a t u p n I d e s u n U r o f s n oit a d n e m m o c e R n oit alu cla c n oit a pis si D r e w o P n oit a r e dis n o C r e w o P d e tc e rr o C e t o n e e rf- d a el d n a ytit n a u q le e r e p a t d e d d a elb a T n oit a m r o f n I g nir e d r O