PE42671 PEREGRINE | Alldatasheet

Document overview

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Technical content

Features

  • 2 TX, 2 TRX, 3 RX ports
  • Three pin CMOS logic control with integral decoder/driver
  • Exceptional harmonic performance: 2fo = -83 dBc and 3fo = -78 dBc
  • Low TX insertion loss: 0.65 dB at 900 MHz, 0.75 dB at 1900 MHz
  • TX – RX Isolation of 47 dB at 900 MHz, 40 dB at 1900 MHz
  • 1500 V HBM ESD tolerance all ports
  • +68 dBm IIP3 @ 50 Ω
  • -111 dBm IMD3
  • No blocking capacitors required * Dimensions shown are drawn die size.

Figure 2. Die Top View*

©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Table 1. Target Electrical Specifications @ 25 °C, VDD = 2.75 V Table 2. Operating Ranges Table 3. Absolute Maximum Ratings ratings may cause permanent damage. Note: 2. Assumes RF input period of 4620 µs and duty cycle of 50%. Note: 3. Assumes RF input period of 4620 µs and duty cycle of 50%.

  1. VDD within operating range specified in Table 2.

Note: 1. Insertion loss specified with optimal impedance matching.

Document No. 70-0196-03 │www.psemi.com ©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Contact sales@psemi.com for full version of datasheet Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Table 5. Truth Table Table 6. Ordering Information Table 4. Pin Descriptions Figure 3. Pad Configuration (Top View) ground plane for best performance.

  1. Blocking capacitors needed only when non-zero DC

Description

RF Common – Antenna Redundant ANT pins for flexible bonding RX16 RF I/O – RX1 GND5 Ground TRX16 RF I/O – TRX1 GND5 Ground ANT RF Common – Antenna Redundant ANT pins for flexible bonding GND5 Ground TX16 RF I/O - TX1 GND5 Ground GND5 Ground VDD Supply Switch control input, CMOS logic level GND5 Ground Switch control input, CMOS logic level Switch control input, CMOS logic level GND5 Ground GND5 Ground TX26 RF I/O – TX2 GND5 Ground TRX26 RF I/O – TRX2 GND5 Ground RX36 RF I/O – RX3 GND5 Ground RX26 RF I/O – RX2 Order Code Wafer (Gross Die / Wafer Quantity) 42671-99 PE42671-DIE-400G Waffle Pack

400 Dice / Waffle Pack

©2005-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0196-03 │ UltraCMOS™ RFIC Solutions Contact sales@psemi.com for full version of datasheet Sales Offices The Americas Peregrine Semiconductor Corporation

9450 Carroll Park Drive

San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Peregrine Semiconductor, Korea #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. South Asia Pacific Peregrine Semiconductor, China Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Space and Defense Products Americas: Tel: 858-731-9453 Europe, Asia Pacific:

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