PE4257 PEREGRINE | Alldatasheet

Document overview

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Technical content

Features

  • 50 Ω characteristic impedance
  • Integrated 50 Ω 0.25 watt terminations
  • High input IP3 > +55 dBm
  • High isolation 64 dB at 1000 MHz
  • Low insertion loss: typically 0.75 dB at 1000 MHz and 0.95 dB at 2000 MHz
  • LV CMOS two-pin control
  • Single +3 volt supply operation
  • Low current consumption: 8 µA Parameter Condition Minimu m Typical Maximum Units Operating Frequency1 DC 3000 MHz Insertion Loss

1000 MHz

2000 MHz

3000 MHz

0.75 0.95 1.2 0.95 1.15 1.4 dB Isolation Input to Output Isolation Output to Output Input IP2 5 MHz - 1000 MHz 80 dBm Input IP3 5 MHz - 1000 MHz 50 55 dBm Input 1dB Compression2 1000 MHz 29 31 dBm Switching Time 50% CTRL to 10 / 90 RF 2 µs Video Feedthrough3 5 MHz - 1000 MHz 15 mV pp Notes: 1. Device linearity will begin to degrade below 5 MHz. 2. Note Absolute Maximum ratings in Table 3. 3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth Figure 2. Package Type Table 1. Electrical Specifications @ +25 °C, VDD = 3.0 V (ZS = ZL = 50 Ω)

Document No. 70-0166-06 │ UltraCMOS™ RFIC Solutions ©2004-2009 Peregrine Semiconductor Corp. All rights reserved.

1 GND RF Ground

2 GND RF Ground

31 RF1 RF I/O

4 GND RF Ground

5 GND RF Ground

6 GND RF Ground

7 GND RF Ground

1 RFC RF Common

9 GND RF Ground

10 GND RF Ground

11 GND RF Ground

12 GND RF Ground

131 RF2 RF I/O

14 GND RF Ground

15 GND RF Ground

162 CTRL2 Control 2

172 CTRL1 Control 1

183 VSS / GND Negative Supply Option

19 GND Digital Ground

20 VDD Supply

Table 2. Pin Descriptions Table 3. Absolute Maximum Ratings devices are immune to latch-up. Table 4. Operating Ranges @ 25 °C

  1. Pins 16 and 17 are the CMOS controls that set the four
  2. Connect pin 18 to GND to enable the negative voltage

Figure 3. Pin Configuration (Top View) maximum for extended periods may reduce reliability. Table 5. Truth Table characterized in the C1=VDD and C2=VDD state.

Document No. 70-0166-06 │ UltraCMOS™ RFIC Solutions ©2004-2009 Peregrine Semiconductor Corp. All rights reserved. ease customer evaluation of the PE4257 SPDT switch. environmental conditions being evaluated. device shown in this datasheet. is removed, the pin is pulled up to VDD for logic high. Figure 8. Evaluation Board Layouts Figure 9. Evaluation Board Schematic

50 OHM T-Line

Figure 10. Package Drawing

Peregrine Semiconductor Corporation

9380 Carroll Park Drive

San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Hi-Rel and Defense Products Americas: Tel: 858-731-9453 Europe, Asia Pacific:

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