DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 8

Technical content

Features

 75 Ω characteristic impedance  Integrated 75 Ω terminations  CTB performance of -90 dBc  High isolation 65 dB at 1000 MHz  Low insertion loss: typically 0.5 dB at 5 MHz, 0.9 dB at 1000 MHz  High input IP3: >50 dBm  CMOS two-pin control  Single +3 volt supply operation  Low current consumption: 8 μA  Unique all off terminated mode  4 x 4 mm QFN package Parameter Condition Minimum Typical Maximum Units Operating Frequency1 5 3000 MHz Insertion Loss 5-250 MHz 250-750 MHz 750-1000 MHz 1000-2200 MHz 0.5 0.8 0.9 1.1 0.6 0.95 1.1 1.3 dB Isolation 5-250 MHz 250-750 MHz 750-1000 MHz 1000-2200 MHz dB Input IP22 5-1000 MHz 80 dBm Input IP32 5-1000 MHz 50 55 dBm Input 1dB Compression2 1000 MHz 29 31 dBm CTB / CSO 77 & 110 channels; Power Out = 44 dBm V -90 dBc Switching Time 50% CTRL to 10/90% RF 2 µs Video Feedthrough3 5-1000 MHz 15 mV pp Notes: 1. Device linearity will begin to degrade below 5 MHz. 2. Measured in a 50 Ω system. 3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth Peregrine Specification 71-0013-01 The PE4256 is an UltraCMOS™ Switch designed for CATV applications, covering a broad frequency range from 5 MHz up to 3 GHz. This single-supply SPDT switch integrates a two-pin CMOS control interface. It also provides low insertion loss with extremely low bias requirements while operating on a single 3- volt supply. In a typical CATV application, the PE4256 provides for a cost effective and manufacturable solution when compared to mechanical relays. The PE4256 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Table 1. Electrical Specifications @ +25 °C, VDD = +3 V (ZS = ZL = 75 Ω)

Table 2. Pin Descriptions Table 3. Absolute Maximum Ratings exceeding the rating specified. Table 4. DC Electrical Specifications @ 25 °C Figure 3. Pin Configuration (Top View)

1 GND Ground

2 GND Ground

31 RF1 RF I/O

44 GND Ground

5 GND Ground

6 GND Ground

4 GND Ground

81 RFC Common

94 GND Ground

10 GND Ground

11 GND Ground

131 RF2 RF I/O

14 GND Ground

15 GND Ground

2 C2 Control 2

172 C1 Control 1

183 VSS/GND Negative Supply Option

19 GND Ground

20 VDD Supply

  1. Pins 16 and 17 are the CMOS controls that set the three operating
  2. Connect pin 18 to GND to enable the on-chip negative voltage
  3. Customer can add external resistance to ground to change or modify

periods may reduce reliability.

Table 5. RF Path Truth Table Table 6. Termination Truth Table C1 = VDD and C2 = VDD state.

  1. "X" denotes termination enabled.

devices are immune to latch-up.

any manner without notice. Preliminary Specification: The datasheet contains preliminary data. liability for the use of this information. Use shall be entirely at the user’s own risk. failure of the Peregrine product could create a situation in which personal injury or death might occur. the use of its products in such applications. DuNE are trademarks of Peregrine Semiconductor Corp. For Sales and contact information please visit www.psemi.com. Table 7. Ordering Information Figure 15. Tape and Reel Drawing