ICS307-03 ICST | Alldatasheet

Document overview

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Technical content

Features

  • Crystal or clock reference input
  • 3.3 V CMOS outputs
  • Three outputs can be individually configured or shut off
  • Small 16-pin TSSOP package
  • Reprogrammable during operation
  • 3-wire SPI serial interface
  • Glitch-free output frequency switching
  • User selectable charge pump current and damping resistor
  • Power-down control via hardware pin or software control bit
  • Programming word can be generated by ICS VersaClock II Software
  • Directly programmable via VersaClock II Software and a Windows PC parallel port
  • Available in Pb (lead) free package Block Diagram REF Divide 1-2055 VCO DIVIDE 12-2055 Resistor (Table 4) Charge Pump (Table 3) (Table 2) (Table 5) CLK1 [Bit 110] [Bit 123] [Bit 124] [Bit 129] [Bit 111] CLK2 CLK3 (Table 7) Divider 2 - 8232 (Table 1) [Bit 122] Divider 2 - 34 Divider 2 - 34 (Table 6) 11pF 300 pF CP Programming Register (132 bits) DIN CS SCLK

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 Pin Assignment Pin Descriptions VDD VDD PD VDD GND CLK3 GND CLK2 GND DIN SCLK GND CS CLK1 16-pin TSSOP ICS307-03 Pin Number Pin Name Pin Type Pin Description XI Connect to input reference clock or crystal. VDD Power Power connection for crystal oscillator. VDD Power Power connection for PLL. VDD Power Power connection for inputs and outputs. GND Power Ground connection for crystal oscillator. GND Power Ground connection for PLL. GND Power Ground connection for inputs and outputs. CLK1 Output Clock 1 output. SCLK Input Programming interface - Serial clock input. Internal pull-up. CS Input Programming interface - LOAD input. Internal pull-down. DIN Input Programming interface - Serial data input. Internal pull-up. CLK2 Output Clock 2 output. GND Power Ground connection. CLK3 Output Clock 3 output. PD Input Crystal, PLL, and outputs are powered-down when low. Internal pull-up. Connect to crystal. Leave open if reference clock input is used.

Table 1. Input Divider Table 2. VCO Divider

Table 3. Charge Pump Current Table 4. Loop Filter Resistor

Table 5. Output Divider for Output 1

Table 6. Output Divider for Output 2 Table 7. Output Divider for Output 3

Table 8. Miscellaneous Control Bits The ICS307-03 requires a minimum number of external components for proper operation. Ohm transmission line without the need for any series resistors. For a single ended clock input, connect it to X1 and leave X2 unconnected with no capacitors on either pin.

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 Initial Output Frequency ICS307-03 on-chip registers are initially configured to provide a 1x output clock on the CLK1 output, and 0.5x clock on CLK2 and CLK3. The output frequency will be the same as the input clock or crystal for input frequencies from 10 - 50 MHz. This is useful when the ICS307-03 needs to provide an initial system clock at power-up. Determining and Controlling the Output Frequency with VersaClockTM II The ICS307-03 is directly supported by the ICS provided software called VersaClock II. Complete programming words for this device can be calculated on any Windows PC by running the VersaClock II software and simple inputting desired input and output frequencies. Once the software generates an appropriate programming word, it may then be either copied to the Windows clipboard or even directly programmed into the ICS307-03 via the host computers parallel port. For more information on VersaClock II, please visit www.icst.com or send an e-mail to ics-mk@icst.com. Manually Determining the Output Frequency The user has full control over the desired output frequency as long as it is operated within the limits shown in the The output of the ICS307-03 can be determined by the following equation: Where: VCO Divider (V) = 12 to 2055 Reference Divider Word (R) = 1 to 2055 Output Divider = values in tables 5, 6, 7 Also, the following operating ranges should be observed. To determine the best combination of VCO, reference, and output dividers, please use the VersaClock II software mentioned above. If more information is needed, please contact ICS by sending an e-mail to ics-mk@icst.com. CLK1Frequency InputFrequency V R OD VCOmin InputFrequency V R---- VCOmaxfreq 20kHz Input Frequency R 100MHz

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 Programming Interface The dynamic register within the ICS307-03 controls the entire device and may be reprogrammed any time after power is properly applied. If V or R values are changed, the frequency will transition smoothly to the new value without glitches or short cycles. However, changing any divider or mux in the output signal path may generate a glitch. The register is 132 bits in length and accepts the MSB first. The SCLK signal latches the current data bit value in the rising edge of It latches the most recently shifted 132 bit values into the control register of device whenever CS is high. Care must be taken to ensure that CS is always low until the system is ready to load in a new register value and that SCLK is never toggled high when CS is high. The register can be programmed any time after power is applied, even while in power-down (pin 15 or bit 112 held low) with the waveform and timing shown below:. Figure 2: ICS307-03 Programming Timing Diagram Table 8: AC Parameters for Programming the ICS307-03 Programming with VersaClock Software The VersaClock II Software not only generates the programming word for the user, it can also be used to program the device via the host computer’s parallel port. Demonstration boards are available from ICS that allows the VersaClock II S/W to directly connect the ICS307-03 to a Windows based PC’s DB-25 parallel port connector and programmed simply by pressing the “Program Part” button. Contact ics-mk@icst.com for more details. Parameter Condition Min. Max. Units tSETUP Setup time 2.5 ns tHOLD Hold time after SCLK 2.5 ns tW Data wait time 2.5 ns tS Strobe pulse width ns SCLK Frequency 200 MHz 128 129 130 131 thold tsetup SCLK CS ts tw DIN

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS307-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operating Conditions VDD=3.3 V ±5% , Ambient temperature 0 to +70°C, unless stated otherwise Item Rating Supply Voltage, VDD 5 V All Inputs and Outputs -0.5 V to VDD+0.5 V Storage Temperature -65 to +150°C Soldering Temperature 260°C Parameter Min. Typ. Max. Units Ambient Operating Temperature +70 Power Supply Voltage (measured in respect to GND) +3.0 +3.6 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.0 3.6 V Input High Voltage VIH V Input Low Voltage VIL 0.8 V Output High Voltage VOH IOH = -4 mA 2.4 V Output Low Voltage VOL IOL = 4 mA 0.4 V Output High Voltage, CMOS level VOH IOH = -6.5 mA VDD-0.4 V Tri-state Output Leakage µA Operating Supply Current IDD

27 MHz crystal

No load, 100 MHz out, all outputs enabled mA Short Circuit Current CLK outputs ±60 mA Input Capacitance CIN pF On-Chip Pull-up Resistor RPU 240 kΩ On-Chip Pull-down Resistor RPD 100 kΩ

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise Note 1: Measured with 15 pF load. Note 2: Jitter performance will change depending on configuration settings. Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency FIN Fundamental crystal MHz Clock 0.1 300 MHz Clock Output Frequency FOUT 5 pF load 0.0002 270 MHz 15 pF load 0.0002 200 MHz Output Clock Rise/Fall Time tR, tF 20 to 80% (5 pF load) 1.5 ns Output Clock Duty Cycle Output Divides <> 3 49-51 Output Divide = 3 Frequency Transition time STROBE high to CLK out ms One Sigma Clock Period Jitter Note 2 ps Maximum Absolute Jitter tja Deviation from mean, Note 2 ±120 ps VCO Frequency VCOF 100 730 MHz Divider 1 Input Output divider 1 = 2 (5 pF load) 540 MHz Output divider 1 = 2 (15 pF load) 400 MHz Output divider 1 = 3 (5 pF load) 720 MHz Output divider 1 = 3 (15 pF load) 600 MHz Output divider 1 = 38 ~ 1029 570 MHz All other Output Divider 1 values 730 MHz Divider 2 and 3 Inputs Output divider 2, 3 = 2 (5 pF load) 540 MHz Output divider 2, 3 = 2 (15 pF load) 400 MHz Output divider 2, 3=12 440 MHz Output divider 2, 3 = 16, 24, 28 and 32 500 MHz All other Output Divider 2 & 3 values 730 MHz

SERIALLY PROGRAMMABLE CLOCK SOURCE MDS 307-03 C Revision 101705 Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS307-03 Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch) Package dimensions are kept current with JEDEC Publication No. 95, MO-153

Ordering Information

Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping packaging Package Temperature ICS307G-03 ICS307G-03 Tubes 16-pin TSSOP 0 to +70° C ICS307G-03T ICS307G-03 Tape and Reel 16-pin TSSOP 0 to +70° C ICS307G-03LF 307G-03LF Tubes 16-pin TSSOP 0 to +70° C ICS307G-03LFT 307G-03LF Tape and Reel 16-pin TSSOP 0 to +70° C INDEX AREA 1 2 D E SEATING PLANE A A A e - C - b aaa C c L Millimeters Inches Symbol Min Max Min Max A 1.20 0.047 0.05 0.15 0.002 0.006 0.80 1.05 0.032 0.041 b 0.19 0.30 0.007 0.012 C 0.09 0.20 0.0035 0.008 D 4.90 5.1 0.193 0.201 E

6.40 BASIC

0.252 BASIC

4.30 4.50 0.169 0.177 e

0.65 Basic

0.0256 Basic

L 0.45 0.75 0.018 0.030 α aaa 0.10 0.004