HVV1012-250 ASI | Alldatasheet
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Technical content
Internal Input and Output Matching Excellent Thermal Stability All Gold Bonding Scheme Pb-free and RoHS Compliant Table 1: Typical RF Performance in broadband text fixture at 25°Ctemperature with RF pulse conditions of pulse width = 10 s and pulse duty cycle = 1%. The high power HVV1012- 50 device is an enhancement mode RF MOSFET power transistor designed for pulsed applications in the L-Band from 1025MHz to 1150MHz. The high voltage MOSFET technology produces over 50W of pulsed output power while offering high gain, high efficiency, and ease of matching with a 50 V supply. The vertical device structure assures high reliability and ruggedness as the device is specified to withstand a 20:1 VSWR at all phase angles under full rated output power. Device Part Number: HVV1012- 50 Evaluation Kit Part Number: HVV1012- 50-EK
ORDERING INFORMATION
DESCRIPTION
FEATURES
REV. A 7525 ETHEL AVENUE NORTH HOLLYWOOD, CA 91605 (818) 982-1200 WWW.ADSEMI.COM Specifications are subject to change without notice. MODE FREQUENCY VDD IDQ Power GAIN EFFICIENCY IRL (MHz) (V) (mA) (W) (dB) (%) (dB) Class AB 1150 50 100 250 19.5 48 20:1 GEPACKAGE
ELECTRICAL CHARACTERISTICS
1NOTE: All parameters measured under pulsed conditions at 250W output power measured at the 10% point of the pulse with pulse width = 10/uni03BCsec, duty cycle = 1% and VDD = 50V, IDQ = 100mA in a broad- band matched test xture. 2NOTE: Amount of gate voltage required to attain nominal quiescent current. Symbol Parameter Conditions Min Typical Max Unit VBR(DSS) Drain-Source Breakdown VGS=0V,ID=5mA 95 102 - V IDSS Drain Leakage Current VGS=0V,VDS=48V - 50 200 A IGSS Gate Leakage Current VGS=5V,VDS=0V - 1 5 A GP1 Power Gain F=1150MHz 17.5 19.5 - dB IRL1 Input Return Loss F=1150MHz - -7 -4 dB D1 F=1150MHz 46 48 - % VGS(Q)2 Gate Quiescent Voltage VDD=50V,IDQ=100mA 1.1 1.45 1.8 V VTH Threshold Voltage VDD=5V, ID=300 A 0.7 1.2 1.7 V Symbol Parameter Conditions Min Typical Max Unit Tr
1 Rise Time F=1150MHz - <40 50 nS
1 Fall Time F=1150MHz - <15 50 nS
PD1 Pulse Droop F=1150MHz - 0.25 0.5 dB >LL'&'(#(+&
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Demonstration Circuit Board Picture Demonstration Board Outline >LL'&'(#(+&
Note: Drawing is not actual size. SOURCE DRAIN GATE ASI PART NUMBER JDATE CODE inches mm ASI Semiconductor, Inc. (ASI) reserves the right to make changes to information published in this document at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Information in this document is believed to be accurate and reliable. However, ASI does not give any representations or warranties, either express or implied, as to the accuracy or completeness of such information and shall have no liability no liability for conse- -quences resulting from the use of such information. No license, either expressed or implied, is conveyed under any ASI intellectual property rights, including any patent rights.