ICS843011 ICST | Alldatasheet
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Technical content
www.icst.com/products/hiperclocks.html REV. B DECEMBER 10, 2004 Integrated Circuit Systems, Inc. ICS843011 FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR GENERAL DESCRIPTION The ICS843011 is a Fibre Channel Clock Generator and a member of the HiPerClocksTM family of high performance devices from ICS. The ICS843011 uses a 26.5625MHz crystal to synthesize 106.25MHz or a 25MHz crystal to synthesize 100MHz. The ICS843011 has excellent <1ps phase jitter performance, over the 637KHz – 10MHz integration range. The ICS843011 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
FEATURES
- 1 differential 3.3V LVPECL output
- Crystal oscillator interface designed for 26.5625MHz 18pF parallel resonant crystal
- Output frequency: 106.25MHz or 100MHz
- VCO range: 560MHz - 680MHz
- RMS phase jitter @ 100MHz, using a 25MHz crystal (637KHz - 10MHz): 0.80ps (typical)
- RMS phase noise at 106.25MHz Phase noise: Offset Noise Power
- 3.3V operating supply
- Lead-Free package fully RoHS compliant
- -40°C to 85°C ambient operating temperature HiPerClockS™ ICS FREQUENCY TABLE z H M l a t s y r C z H M y c n e u q e r F t u p t u O ICS843011 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View VCCA VEE XTAL_OUT XTAL_IN VCC nQ0 nc OSC Phase Detector VCO 637.5MHz w/ 26.5625MHz Ref. M = ÷24 (fixed) BLOCK DIAGRAM PIN ASSIGNMENT nQ0 XTAL_IN XTAL_OUT
TABLE 2. PIN CHARACTERISTICS TABLE 1. PIN DESCRIPTIONS
TABLE 5. AC CHARACTERISTICS, VCC = 3.3V±5%, TA = -40°C TO 85°C TABLE 4. CRYSTAL CHARACTERISTICS conditions for extended periods may affect product reliability.
www.icst.com/products/hiperclocks.html REV. B DECEMBER 10, 2004 Integrated Circuit Systems, Inc. ICS843011 FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR TYPICAL PHASE NOISE AT 100MHZ 100MHz RMS Phase Noise Jitter 637K to 10MHz = 0.80ps (typical) TYPICAL PHASE NOISE AT 106.25MHZ 106.25MHz RMS Phase Noise Jitter 637K to 10MHz = 0.80ps (typical) OFFSET FREQUENCY (HZ) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 10k 100k 10M 100M Phase Noise Result by adding a Filter to raw data Raw Phase Noise Data Filter OFFSET FREQUENCY (HZ) dBc Hz NOISE POWER -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 10k 100k 10M 100M Phase Noise Result by adding Fibre Channel Filter to raw data Raw Phase Noise Data Fibre Channel Filter dBc Hz NOISE POWER
www.icst.com/products/hiperclocks.html REV. B DECEMBER 10, 2004 Integrated Circuit Systems, Inc. ICS843011 FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD OUTPUT RISE/FALL TIME 3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE Qx nQx LVPECL -1.3V ± 0.165V Clock Outputs 20% 80% 80% 20% tR tF VSWING Pulse Width tPERIOD tPW tPERIOD odc = nQ0 VEE VCC RMS PHASE JITTER Phase Noise Mask Offset Frequency Phase Noise Plot RMS Jitter = Area Under the Masked Phase Noise Plot Noise Power
This section provides information on power dissipation and junction temperature for the ICS843011. Equations and example calculations are also provided. The total power dissipation for the ICS843011 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below. and the type of board (single layer or multi-layer). TABLE 6. THERMAL RESISTANCE θθθθθJA FOR 8-PIN TSSOP, FORCED CONVECTION
- Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 4. Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. FIGURE 4. LVPECL DRIVER CIRCUIT AND TERMINATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
TABLE 9. ORDERING INFORMATION for use in life support devices or critical medical instruments. The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
www.icst.com/products/hiperclocks.html REV. B DECEMBER 10, 2004 Integrated Circuit Systems, Inc. ICS843011 FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR T E E H S Y R O T S I H N O I S I V E R v e R e l b a T e g a P e g n a h C f o n o it p ir c s e D e t a D B A I d e d d a elb a T s citsir e tc a r a h C C D ylp p u S r e w o P A C C e p s B T o t m o rf t n u o c d e tc e rr o c elb a T n oit a m r o f n I g nir e d r O B T o t L A m o rf g nik r a m e e r F d a e L d e tc e rr o c elb a T n oit a m r o f n I g nir e d r O L A B o t C o t C m o rf t ellu b e r u t a r e p m e t g nit a r e p o t n eib m a d e g n a h C e e h s a t a d t u o h g u o r h t d n a C o t C p o t p m o rf e ula v C r o tic a p a c d e g n a h c e c a fr e t n I t u p n I la ts y r C e c a fr e t n I t u p n I la ts y r C tc elf e r o t cit a m e h c s d e tc e rr o c cit a m e h c S n oit a cilp p A e g n a h c