ZXLD1360

ZXLD1360 ZETEX | Alldatasheet

Document overview

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Technical content

Features

• Simple low parts count  Internal 30V NDMOS switch  1A output current  Single pin on/off and brightness control using DC voltage or PWM  Internal PWM filter S o f t - s t a r t  High efficiency (up to 95%)  Wide input voltage range: 7V to 30V  40V transient capability  Output shutdown  Up to 1MHz switching frequency  Inherent open-circuit LED protection  Typical 4% output current accuracy

Applications

 Low voltage halogen replacement LEDs  Automotive lighting  Low voltage industrial lighting  LED back-up lighting  Illuminated signs Pin connections Typical application circuit LX TSOT23-5 Top view GND ADJ VIN ISENSE VIN ISENSE LX GND ZXLD1360ADJ VIN (7V - 30V) Rs 0.1/H9024 4.7/H9262FC1 GND N/C D1 47/H9262H L1

Issue 1 - March 2007 2 www.zetex.com © Zetex Semiconductors plc 2007 Absolute maximum ratings (voltages to GND unless otherwise stated) Electrical characteristics (test conditions: VIN=12V, Tamb=25°C unless otherwise stated)(a) NOTES: (a) Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over a -40°C to +105°C temperature range, are guaranteed by design, characterization and process control. (b) 100% brightness corresponds to V ADJ = V ADJ(nom) = V REF. Driving the ADJ pin above V REF will increase the V SENSE. threshold and output current proportionally. Input voltage (VIN) -0.3V to +30V (40V for 0.5 sec) ISENSE voltage (VSENSE) +0.3V to -5V (measured with respect to V IN) LX output voltage (VLX) -0.3V to +30V (40V for 0.5 sec) Adjust pin input voltage (VADJ)- 0 . 3 V t o + 6 V Switch output current (ILX) 1.25A Power dissipation (Ptot) (Refer to package thermal de-rating curve on page 16) Operating temperature (TOP) -40 to 125°C Storage temperature (TST) -55 to 150°C Junction temperature (Tj MAX)1 5 0 ° C These are stress ratings only. Operation outside the absolute maximum ratings may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. Thermal resistance Junction to ambient (R/H9052JA)1 2 5 ° C / W Symbol Parameter Conditions Min. Typ. Max. Unit VIN Input voltage 7 30 V VSU Internal regulator start-up threshold VIN rising 5.65 V VSD Internal regulator shutdown threshold VIN falling 5.55 V IINQoff Quiescent supply current with output off ADJ pin grounded 20 40 /H9262A IINQon Quiescent supply current with output switching ADJ pin floating f = 250kHz 1.8 5.0 mA VSENSE Mean current sense threshold voltage (Defines LED current setting accuracy) Measured on ISENSE pin with respect to VIN VADJ = 1.25V 95 100 105 mV VSENSEHYS Sense threshold hysteresis ±15 % ISENSE ISENSE pin input current V SENSE = VIN -0.1 1.25 10 /H9262A VREF Internal reference voltage Measured on ADJ pin with pin floating 1.25 V /H9004VREF //H9004T Temperature coefficient of VREF 50 ppm/K VADJ External control voltage range on ADJ pin for DC brightness control(b) 0.3 2.5 V VADJoff DC voltage on ADJ pin to switch device from active (on) state to quiescent (off) state V ADJ falling 0.15 0.2 0.25 V VADJon DC voltage on ADJ pin to switch device from quiescent (off) state to active (on) state V ADJ r i s i n g 0 . 20 . 2 50 . 3 V

Issue 1 - March 2007 3 www.zetex.com © Zetex Semiconductors plc 2007 Electrical characteristics (test conditions: VIN=12V, Tamb=25°C unless otherwise stated) (cont.) Symbol Parameter Conditions Min. Typ. Max. Unit RADJ Resistance between ADJ pin and VREF 0< VADJ < VREF VADJ > VREF +100mV 135 13.5 250 k/H9024 ILXmean Continuous LX switch current 1 A RLX LX Switch ‘On’ resistance @ I LX = 1 A 0.5 1.0 /H9024 ILX(leak) LX switch leakage current 5 /H9262A DPWM(LF) Duty cycle range of PWM signal applied to ADJ pin during low frequency PWM dimming mode PWM frequency <500Hz PWM amplitude = VREF Measured on ADJ pin 0.01 1 Brightness control range 100:1 DPWM(HF) Duty cycle range of PWM signal applied to ADJ pin during high frequency PWM dimming mode PWM frequency >10kHz PWM amplitude = V REF Measured on ADJ pin 0.16 1 Brightness control range 5:1 TSS Soft start time Time taken for output current to reach 90% of final value after voltage on ADJ pin has risen above 0.3V 500 /H9262s f LX Operating frequency (See graphs for more detail) ADJ pin floating L = 33/H9262H (0.093/H9024) IOUT = 1A @ VLED = 3.6V Driving 1 LED 280 KHz TONmin Minimum switch ‘ON’ time LX switch ‘ON’ 240 (*) NOTES: (*) Parameters are not tested at production. Parameters are guaranteed by design, characterization and process control. ns TOFFmin Minimum switch ‘OFF’ time LX switch ‘OFF’ 200 (*) ns TONmin_REC Recommended minimum switch 'ON' time LX switch 'ON' 800 ns fLXmax Recommended maximum operating frequency 1M H z DLX Recommended duty cycle range of output switch at fLXmax 0.3 0.7 TPD Internal comparator propagation delay 50 ns

Issue 1 - March 2007 4 www.zetex.com © Zetex Semiconductors plc 2007 Pin description

Ordering information

Name Pin no. Description LX 1 Drain of NDMOS switch GND 2 Ground (0V) ADJ 3 Multi-function On/Off a nd brightness control pin:  Leave floating for normal operation.(V ADJ = VREF = 1.25V giving nominal average output current IOUTnom = 0.1/RS)  Drive to voltage below 0.2V to turn off output current  Drive with DC voltage (0.3V < V ADJ < 2.5V) to adjust output current from 25% to 200% of IOUTnom  Drive with PWM signal from open-collector or open-drain transistor, to adjust output current. Adjustment range 25% to 100% of IOUTnom for f>10kHz and 1% to 100% of IOUTnom for f < 500Hz  Connect a capacitor from this pin to ground to increase soft-start time. (Default soft-start time = 0.5ms. Additional soft-start time is approx.0.5ms/nF) I SENSE 4 Connect resistor R S from this pin to VIN to define nominal average output current IOUTnom = 0.1/RS (Note: RSMIN = 0.1/H9024 with ADJ pin open-circuit) VIN 5 Input voltage (7V to 30V). Decouple to ground with 4.7 /H9262F or higher X7R ceramic capacitor close to device Device Reel size (mm) Reel width (inches) Quantity per reel Device mark ZXLD1360ET5TA 180 8 3,000 1360 LX TSOT23-5 Top view GND ADJ VIN ISENSE

Issue 1 - March 2007 5 www.zetex.com © Zetex Semiconductors plc 2007 Block diagram Low voltage detector Voltage regulator LX MN ISENSE Adj Gnd VIN VIN 200K 20K 1.25V 1.35V 0.2V R4 R5 54 1 RS 4.7/H9262F

Issue 1 - March 2007 6 www.zetex.com © Zetex Semiconductors plc 2007 Device description The device, in conjunction with the co il (L1) and current sense resistor (R S), forms a self- oscillating continuous-mode buck converter. Device operation (Refer to block diagram and Figure 1 - Operating waveforms) Operation can be best understood by assuming that the ADJ pin of the device is unconnected and the voltage on this pin (VADJ) appears directly at the (+) input of the comparator. When input voltage V IN is first applied, the initial current in L1 and R S is zero and there is no output from the current sense circuit. Under this condition, the (-) input to the comparator is at ground and its output is high. This turns MN on and switches the LX pin low, causing current to flow from V IN to ground, via RS, L1 and the LED(s). The current rises at a rate determined by V IN and L1 to produce a voltage ramp (V SENSE) across R S. The supply referred voltage V SENSE is forced across internal resistor R1 by the current sense circuit and produces a proportional current in internal resistors R2 and R3. This produces a ground referred rising voltage at the (-) input of the comparator. When this reaches the threshold voltage (V ADJ), the comparator output switches low and MN turns off. The comparator output also drives another NMOS switch, which bypasses internal resistor R3 to provide a controlled amount of hysteresis. The hysteresis is set by R3 to be nominally 15% of V ADJ. When MN is off, the current in L1 continues to flow via D1 and the LED(s) back to VIN. The current decays at a rate determined by the LED(s) and diode forward voltages to produce a falling voltage at the input of the comparator. When this voltage returns to V ADJ, the comparator output switches high again. This cycle of events repeats, with the comparator input ramping between limits of VADJ ± 15%. Switching thresholds With VADJ = VREF, the ratios of R1, R2 and R3 define an average V SENSE switching threshold of 100mV (measured on the I SENSE pin with respect to V IN). The average output current I OUTnom is then defined by this voltage and RS according to: IOUTnom = 100mV/RS Nominal ripple current is ±15mV/RS Adjusting output current The device contains a low pass filter between the ADJ pin and the threshold comparator and an internal current limiting resistor (200k /H9024 nom) between ADJ and the internal reference voltage. This allows the ADJ pin to be overdriven with either DC or pulse signals to change the V SENSE switching threshold and adjust the output current. The filter is third order, comprising three sections, each with a cut-off frequency of nominally 4kHz. Details of the different modes of adjusting output current are given in the applications section. Output shutdown The output of the low pass filter drives the shutdown circuit. When the input voltage to this circuit falls below the threshold (0.2V nom.), the internal regulator and the output switch are turned off. The voltage reference remains powered during shutdown to provide the bias current for the shutdown circuit. Quiescent supply cu rrent during shutdown is nominally 20 /H9262A and switch leakage is below 5/H9262A.

Issue 1 - March 2007 7 www.zetex.com © Zetex Semiconductors plc 2007 Figure 1 - Operating waveforms VIN 100mV115mV SENSE voltage VSENSE+ VSENSE- Toff Ton 85mV VIN 0.15VADJ 0.15VADJ IOUTnom IOUTnom +15% IOUTnom -15% VADJ LX voltage Coil current Comparator input voltage Comparator output

Issue 1 - March 2007 8 www.zetex.com © Zetex Semiconductors plc 2007 Actual operating waveforms [VIN=15V, RS=0.1/H9024, L=33µH] Normal operation. Output current (Ch1) and LX voltage (Ch2) Actual operating waveforms [VIN=30V, RS=0.1/H9024, L=33µH] Normal operation. Output current (Ch1) and LX voltage (Ch2)

Issue 1 - March 2007 9 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions Efficiency 1,3 and 7 LEDs L = 33/H9262H 100 01 0 2 0 3 0 4 0 Supply Voltage V IN (V) Efficiency (%)

1 Led

3 Led

7 Led

Output current variation with Supply Voltage L = 33/H9262H -10 51 0 1 5 2 0 2 5 3 0 Supply Voltage V IN (V) Deviation from nominal set current (%) Operating Frequency vs Input Voltage L = 33/H9262H 100 200 300 400 500 600 51 0 1 5 2 0 2 5 3 0 Supply Voltage VIN (V) Freq (kHz) Duty Cycle % vs Input Voltage L = 33/H9262H 100 05 1 0 1 5 2 0 2 5 3 0 3 5 Supply Voltage V IN (V) Duty (%)

Issue 1 - March 2007 10 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions ZXLD1360 Output Current L=33μH 900 920 940 960 980 1000 1020 1040 1060 0 5 10 15 20 25 30 35 Supply Voltage V (V)IN Output Current (mA) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Output Current L=33μH -10.0% -8.0% -6.0% -4.0% -2.0% 0.0% 2.0% 4.0% 6.0% 8.0% 10.0% 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Output Current Deviation (%) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Switching Frequency L=33μH 100 200 300 400 500 600 0 5 10 15 20 25 30 35 Supply Voltage VIN(V) Switching Frequency (kHz)

1 LED 2 LED 3 LED 4 LED 5 LED 6 LED 7 LED 8 LED

L=33μH 100 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Duty Cycle (%)

Issue 1 - March 2007 11 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions ZXLD1360 Output Current L=47μH 900 920 940 960 980 1000 1020 1040 1060 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Output Current (mA) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Output Current L=47μH -10.0% -8.0% -6.0% -4.0% -2.0% 0.0% 2.0% 4.0% 6.0% 8.0% 10.0% 0 5 10 15 20 25 30 35 Supply VoltageVIN (V) Output Current Deviation (%) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Switching Frequency L=47μH 100 200 300 400 500 600 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Switching Frequency (kHz) L=47μH 100 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Duty Cycle (%)

Issue 1 - March 2007 12 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions ZXLD1360 Output Current L=100μH 900 920 940 960 980 1000 1020 1040 1060 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Output Current (mA) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Output Current L=100μH -10.0% -8.0% -6.0% -4.0% -2.0% 0.0% 2.0% 4.0% 6.0% 8.0% 10.0% 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Output Current Deviation (%) 1LED 2LED 3LED 4LED 5LED 6LED 7LED 8LED ZXLD1360 Switching Frequency L=100μH 100 200 300 400 500 600 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Switching Frequency (kHz) L=100μH 100 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Duty Cycle (%)

Issue 1 - March 2007 13 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions Vref vs Supply Voltage 0.2 0.4 0.6 0.8 1.2 1.4 012345678 Supply Voltage V IN (V) Vref (V) Vref vs Supply Voltage 1.2364 1.2365 1.2366 1.2367 1.2368 1.2369 1.237 1.2371 1.2372 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Vref (V) Vref (V) Supply Current vs Supply Voltage 100 200 300 400 500 600 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Iin (µA) Shutdown Current vs Supply Voltage 0 5 10 15 20 25 30 35 Supply Voltage VIN (V) Iin (µA) LED Current vs Vadj 200 400 600 800 1000 1200 0123 ADJ Pin Voltage (V) LED Current (mA) R=100mΩ R=150mΩ R=330mΩ

Issue 1 - March 2007 14 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions ZXLD1360 Response Time vs Temperature Typical minimum LX 'on' and 'off' time 100 150 200 250 300 350 -55 -35 -15 5 25 45 65 85 105 125 Ambient Temperature (°C) Response Time (ns) Min LX on Min LX off Lx Switch "On" Resistance vs Temperature 0.20 0.30 0.40 0.50 0.60 0.70 0.80 -50 0 50 100 150 200 Ambient Temperature ( o C ) "On" Resistance ( Ω ) Vadj vs Temperature L = 470uH, Rs = 0.33 Ohms 1.21 1.215 1.22 1.225 1.23 1.235 1.24 -55 -35 -15 5 25 45 65 85 105 125 Ambient Temperature ( oC ) Vadj (V) 12V, single LED 12V, three LED 24V, single LED 24V, three LED Voltage across Rsense (0.333 Ohm) vs Temperature 98.4 98.6 98.8 99.2 99.4 99.6 99.8 100 100.2 100.4 -55 -35 -15 5 25 45 65 85 105 125 Ambient Temperature ( oC ) Vsense (V ) 12V, three LED 24V, single LED 12V, single LED 24V, three LED Output current change vs Temperature VIN = 12V, L= 470uH, Rs = 0.33 Ohms -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 -55 -35 -15 5 25 45 65 85 105 125 Ambient Temperature ( oC ) Deviation from nominal set value (%) 12V, single LED 12V, three LED Output current change vs Temperature VIN = 24V, L= 470uH, Rs = 0.33 Ohms -0.8 -0.6 -0.4 -0.2 0.2 0.4 -55 -35 -15 5 25 45 65 85 105 125 Ambient Temperature ( o C ) Deviation from nominal set value (%) 24V, single LED 24V, three LED

Issue 1 - March 2007 15 www.zetex.com © Zetex Semiconductors plc 2007 Application notes Setting nominal average output current with external resistor RS The nominal average output current in the LED(s) is determined by the value of the external current sense resistor (RS) connected between VIN and ISENSE and is given by: IOUTnom = 0.1/RS [for RS /H11350 0.1/H9024] The table below gives values of nominal average output current for several preferred values of current setting resistor (RS) in the typical application circuit shown on page 1: The above values assume that the ADJ pin is floating and at a nominal voltage of V REF (=1.25V). Note that R S = 0.1/H9024 is the minimum allowed value of se nse resistor under these conditions to maintain switch current below the specified maximum value. It is possible to use different values of R S if the ADJ pin is driven from an external voltage. (See next section). Output current adjustment by external DC control voltage The ADJ pin can be driven by an external dc voltage (VADJ), as shown, to adjust the output current to a value above or below the nominal average value defined by RS. The nominal average output current in this case is given by: IOUTdc = (VADJ /1.25) x 100mV x RS [for 0.3< VADJ <2.5V] Note that 100% brightness setting corresponds to V ADJ = VREF. When driving the ADJ pin above 1.25V, RS must be increased in proportion to prevent IOUTdc exceeding 1A maximum. The input impedance of the ADJ pin is 200k /H9024 ±25% for voltages below V REF and 20k/H9024 ±25% for voltages above VREF +100mV. RS (/H9024) Nominal average output current (mA) 0.1 1000 0.13 760 0.15 667 GND ZXLD1360ADJ GND DC

Issue 1 - March 2007 16 www.zetex.com © Zetex Semiconductors plc 2007 Output current adjustment by PWM control Directly driving ADJ input A Pulse Width Modulated (PWM) signal with duty cycle DPWM can be applied to the ADJ pin, as shown below, to adjust the output current to a value above or below the nominal average value set by resistor R Driving the ADJ input via open collector transistor The recommended method of driving the ADJ pin and controlling the amplitude of the PWM waveform is to use a small NPN switching transistor as shown below: This scheme uses the 200k resistor between the ADJ pin and the internal voltage reference as a pull-up resistor for the external transistor. Driving the ADJ input from a microcontroller Another possibility is to drive the device from the open drain output of a microcontroller. The diagram below shows one method of doing this: If the NMOS transistor within the microcontroller has high Drain / Source capacitance , this arrangement can inject a negative spike into ADJ input of the 1360 and cause erratic operation but the addition of a Schottky cl amp diode (cathode to ADJ) to ground and inclusion of a series resistor (10K) will prevent this. See the section on PWM dimming for more details of the various modes of control using high frequency and low frequency PWM signals. PWM GND VADJ GND ZXLD1360ADJ PWM GND ZXLD1360ADJ GND GND ZXLD1360ADJ MCU 10k

Issue 1 - March 2007 17 www.zetex.com © Zetex Semiconductors plc 2007 Shutdown mode Taking the ADJ pin to a voltage below 0.2V for more than approximately 100µs, will turn off the output and supply current will fall to a low standby level of 20µA nominal. Note that the ADJ pin is not a logic input. Taking the ADJ pin to a voltage above VREF will increase output current above the 100% nominal average value. (See graphs for details). Soft-start The device has inbuilt soft-start action due to the delay through the PWM filter. An external capacitor from the ADJ pin to ground will provide additional soft-start delay, by increasing the time taken for the voltage on this pin to rise to the turn-on threshold and by slowing down the rate of rise of the control voltage at the input of the comparator. With no external capacitor, the time taken for the output to reach 90% of its final value is approximately 500µs. Adding capacitance increases this delay by approximately 0.5ms/nF. The graph below shows the variation of soft-start time for different values of capacitor. Actual operating waveforms [V IN=15V, RS=0.1/H9024, L=33µH, 0nF on ADJ] Soft-start operation. Output current (Ch2) and LX voltage (Ch1) The trace above shows the typical soft startup time (Tss) of 500 /H9262Sec with no additional capacitance added to the ADJ pin. dnuorG ot nip JDA morf ecnaticapaC sv emiT tratS tfoS 5202510150 )Fn( ecnaticapaC Soft Start time (ms)

Issue 1 - March 2007 18 www.zetex.com © Zetex Semiconductors plc 2007 This time has been extended on the trace below by adding a 100nF ceramic capacitor which gives a soft start time of 40 milliseconds approximately. Actual operating waveforms [VIN=15V, RS=0.1/H9024, L=33µH ,100nF on ADJ] Soft-start operation. Output current (Ch2) and LX voltage (Ch1) Inherent open-circuit LED protection If the connection to the LED(s) is open-circuited, the coil is isolated from the LX pin of the chip, so the device will not be damaged, unlike in ma ny boost converters, where the back EMF may damage the internal switch by forcing the drain above its breakdown voltage. Capacitor selection A low ESR capacitor should be used for input decoupling, as the ESR of this capacitor appears in series with the supply source impedance and lo wers overall efficiency . This capacitor has to supply the relatively high peak current to the coil and smooth the current ripple on the input supply. A minimum value of 4.7 /H9262F is acceptable if the input s ource is close to the device, but higher values will improve performance at lowe r input voltages, especially when the source impedance is high. The input capacitor should be placed as close as possible to the IC. For maximum stability over temperature and voltage, capacitors with X7R, X5R, or better dielectric are recommended. Capacitors with Y5V dielectric are not suitable for decoupling in this application and should NOT be used. A suitable Murata capacitor would be GRM42-2X7R475K-50. The following web sites are useful when finding alternatives: www.murata.com www.t-yuden.com www.kemet.com www.avxcorp.com

Issue 1 - March 2007 19 www.zetex.com © Zetex Semiconductors plc 2007 Inductor selection Recommended inductor values for the ZXLD1360 are in the range 33/H9262H to 100/H9262H. Higher values of inductance are recommended at hi gher supply voltages in order to minimize errors due to switching delays, which result in increased ripple and lower efficiency. Higher values of inductance also result in a smaller change in output current over the supply voltage range. (See graphs). The inductor should be mounted as close to the device as possible with low resistance connections to the LX and V IN pins. The chosen coil should have a saturation current higher than the peak output current and a continuous current rating above the required mean output current. Suitable coils for use with the ZXLD1360 are listed in the table below: The inductor value should be chosen to maintain operating duty cycle and switch 'on'/'off' times within the specified limits over the supply voltage and load current range. The following equations can be used as a guide, with reference to Figure 1 - Operating waveforms. LX Switch 'On' time Note: TONmin>240ns LX Switch 'Off' time Note: TOFFmin>200ns Where: L is the coil inductance (H) rL is the coil resistance (/H9024) RS is the current sense resistance Iavg is the required LED current (A) /H9004I is the coil peak-peak ripple current (A) {Internally set to 0.3 x Iavg} VIN is the supply voltage (V) VLED is the total LED forward voltage (V) RLX is the switch resistance (/H9024) {=0.5/H9024 nominal} VD is the diode forward voltage at the required load current (V) Part no. L (/H9262H) DCR (/H9024) ISAT (A) Manufacturer NPIS64D330MTRF 33 0.124 1.1 NIC www.niccomp.com TON L/H9004I TOFF L/H9004I

Issue 1 - March 2007 20 www.zetex.com © Zetex Semiconductors plc 2007 Example: This gives an operating frequency of 280kHz and a duty cycle of 0.35. These and other equations are available as a spreadsheet calculator from the Zetex website at www.zetex.com/zxld1360 Note that, in practice, the duty cycle and operating frequency will deviate from the calculated values due to dynamic switching delays, switch rise/fall times and losses in the external components. Optimum performance will be achieved by sett ing the duty cycle close to 0.5 at the nominal supply voltage. This helps to equalize the unde rshoot and overshoot and improves temperature stability of the output current. Diode selection For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode with low reverse leakage at the maximum operating voltage and temperature. They also provide better efficiency than silicon diodes, due to a combination of lower forward voltage and reduced recovery time. It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher than the maximum output load current. It is very important to consider the reverse leakage of the diode when operating above 85°C. Excess leakage will increase the power dissipation in the device and if close to the load may create a thermal runaway condition. The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the LX output. If a silicon diode is used, care should be taken to ensure that the total voltage appearing on the LX pin including supply ripple, does not exceed the specified maximum value.

Issue 1 - March 2007 21 www.zetex.com © Zetex Semiconductors plc 2007 Reducing output ripple Peak to peak ripple current in the LED(s) can be reduced, if required, by shunting a capacitor Cled across the LED(s) as shown below: A value of 1 /H9262F will reduce the supply ripple current by a factor three (approx.). Proportionally lower ripple can be achieved with higher capacito r values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up delay, by reducing the rate of rise of LED voltage. By adding this capacitor the current waveform through the LED(s) changes from a triangular ramp to a more sinusoidal version without altering the mean current value . Operation at low supply voltage The internal regulator disables the drive to the switch until the supply has risen above the start- up threshold (V SU). Above this threshold, the device will start to operate. However, with the supply voltage below the specified minimum value , the switch duty cycle will be high and the device power dissipation will be at a maximum. Care should be taken to avoid operating the device under such conditions in th e application, in order to minimize the risk of exceeding the maximum allowed die temperature. (See next se ction on thermal considerations). The drive to the switch is turned off when the supply voltage falls below the under-voltage threshold (V SD). This prevents the switch working with excessive 'on' resistance under conditions where the duty cycle is high. Note that when driving loads of two or more LE Ds, the forward drop will normally be sufficient to prevent the device from switching below approximately 6V. This will minimize the risk of damage to the device. Thermal considerations When operating the device at high ambient te mperatures, or when driving maximum load current, care must be taken to avoid exceeding the package power dissipation limits. The graph below gives details for power derating. This assumes the device to be mounted on a 25mm

2 PCB

with 1oz copper standing in still air. VIN VIN ISENSE LX ZXLD1360 Rs CledLED

Issue 1 - March 2007 22 www.zetex.com © Zetex Semiconductors plc 2007 Note that the device power dissipation will most often be a maximum at minimum supply voltage. It will also increase if the efficiency of the circuit is low. This may result from the use of unsuitable coils, or excessive parasitic output capacitance on the switch output. Thermal compensation of output current High luminance LEDs often need to be supplied with a temperature compensated current in order to maintain stable and reliable operation at all drive levels. The LEDs are usually mounted remotely from the device so, for this reason, the temperature coefficients of the internal circuits for the ZXLD1360 have been optimized to minimize the change in output current when no compensation is employed. If output current compen sation is required, it is possible to use an external temperature sensing network - normally using Negative Temperature Coefficient (NTC) thermistors and/or diodes, mounted very close to the LED(s). The output of the sensing network can be used to drive the ADJ pin in order to reduce output current with increasing temperature. Maximum Power Dissipation 100 200 300 400 500 600 700 800 900 1000 1100 -50 -30 -10 10 30 50 70 90 110 130 150 Ambient Temperature (Deg C) Power (mW)

Issue 1 - March 2007 23 www.zetex.com © Zetex Semiconductors plc 2007 Layout considerations LX pin The LX pin of the device is a fast switching node, so PCB tracks should be kept as short as possible. To minimize ground 'bounce', the ground pin of the device should be soldered directly to the ground plane. Coil and decoupling capacitors and current sense resistor It is particularly important to mount the coil a nd the input decoupling capa citor as close to the device pins as possible to minimize parasiti c resistance and inductance, which will degrade efficiency. It is also important to minimize any track resistance in series with current sense resistor RS. Its best to connect VIN directly to one end of RS and Isense directly to the opposite end of RS with no other currents flowing in these tracks. It is important that the cathode current of the Schottky diode does not flow in a track between R S and VIN as this may give an apparent higher measure of current than is actual because of track resistance. ADJ pin The ADJ pin is a high impedance input for voltages up to 1.35V so, when left floating, PCB tracks to this pin should be as short as possible to reduce noise pickup. A 100nF capacitor from the ADJ pin to ground will reduce frequency modulation of the output under these conditions. An additional series 10k/H9024 resistor can also be used when driving the ADJ pin from an external circuit (see below). This resistor will provide filter ing for low frequency noise and provide protection against high voltage transients. High voltage tracks Avoid running any high voltage tracks close to the ADJ pin, to reduce the risk of leakage currents due to board contamination. The ADJ pin is soft-clamped for voltages above 1.35V to desensitize it to leakage that might raise the ADJ pin voltage and cause excessive output current. However, a ground ring placed around the ADJ pin is recommended to minimize changes in output current under these conditions. Evaluation PCB The ZXLD1360EV1, 2 or 3 evaluation boards are available on request. These boards contain a Lumileds K2 or multiple Ostar LEW type LEDs to allow quick testing of the 1360 device. Additional terminals allow for interfacing to customers own LED products. GND ZXLD1360ADJ 10k 100nF GND

Issue 1 - March 2007 24 www.zetex.com © Zetex Semiconductors plc 2007 Dimming output current using PWM Low frequency PWM mode When the ADJ pin is driven with a low frequency PWM signal (eg 100Hz), with a high level voltage VADJ and a low level of zero, the output of the internal low pass filter will swing between 0V and VADJ, causing the input to the shutdown circuit to fall below its turn-off threshold (200mV nom) when the ADJ pin is low. This will cause the output current to be switched on and off at the PWM frequency, resulting in an average output curre nt IOUTavg proportional to the PWM duty cycle. (See Figure 2 - Low frequency PWM operating waveforms). Figure 2 Low frequency PWM operating waveforms The average value of output current in this mode is given by: IOUTavg 0.1DPWM/RS [for DPWM >0.01] This mode is preferable if optimum LED 'whitene ss' is required. It will also provide the widest possible dimming range (approx. 100:1) and higher efficiency at the expense of greater output ripple. Note that the low pass filter introduces a small error in the output duty cycle due to the difference between the start-up and shut-down times. This time difference is a result of the 200mV shutdown threshold and the rise and fall times at the output of the filter. To minimize this error, the PWM frequency should be as low as possible consistent with avoiding flicker in the LED(s). VADJ VADJ PWM Voltage Ton IOUTavg Filter Output Toff 0.1/RsIOUTnom 200mV 300mV Output Current

Issue 1 - March 2007 25 www.zetex.com © Zetex Semiconductors plc 2007 High frequency PWM mode At PWM frequencies above 10kHz and for duty cycles above 0.16, the output of the internal low pass filter will contain a DC component that is always above the shutdown threshold. This will maintain continuous device operation and the nominal average output current will be proportional to the average voltage at the output of the filter, which is directly proportional to the duty cycle. (See Figure 3 - High frequency PWM operating waveforms). For best results, the PWM frequency should be maintained above the mini mum specified value of 10kHz, in order to minimize ripple at the output of the filter. The shutdown comparator has approximately 50mV of hysteresis, to minimize erratic switching due to this ripple. An upper PWM frequency limit of approximately one tenth of the operating frequency is recommended, to avoid excessive output modulation and to avoid injecting excessive noise into the internal reference. Figure 3 High frequency PWM operating waveforms The nominal average value of output current in this mode is given by: I OUTnom ≈0.1DPWM/RS [for DPWM >0.16] This mode will give minimum out put ripple and reduced radiated emission, but with a reduced dimming range (approx.5:1). The restricted dimming range is a result of the device being turned off when the dc component on the filter output falls below 200mV. PWM voltage VADJ Ton VADJ Toff 200mV Output current 0.1/RS IOUTnom Filter output

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Issue 1 - March 2007 27 www.zetex.com © Zetex Semiconductors plc 2007 Note: Controlling dimensions are in millimeters. Approximate dimensions are provided in inches DIM Millimeters Inches Min. Max. Min. Max. A - 1.00 - 0.0393 A1 0.01 0.10 0.0003 0.0039 A2 0.84 0.90 0.0330 0.0354 b 0.30 0.45 0.0118 0.0177 c 0.12 0.20 0.0047 0.0078 D 2.90 BSC 0.114 BSC E 2.80 BSC 0.110 BSC E1 1.60 BSC 0.062 BSC e 0.95 BSC 0.0374 BSC e1 1.90 BSC 0.0748 BSC L 0.30 0.50 0.0118 0.0196 L2 0.25 BSC 0.010 BSC a° 4° 12° 4° 12°

Issue 1 - March 2007 28 www.zetex.com © Zetex Semiconductors plc 2007 Zetex sales offices Europe Zetex GmbH Kustermann-park Balanstraße 59 D-81541 München Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 europe.sales@zetex.com Americas Zetex Inc

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