ZXLD1350

ZXLD1350_07 ZETEX | Alldatasheet

Document overview

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Technical content

Features

• Simple low parts count  Internal 30V NDMOS switch  350mA output current  Single pin on/off and brightness control using DC voltage or PWM  Internal PWM filter S o f t - s t a r t  High efficiency (up to 95% (*))  Wide input voltage range: 7V to 30V  40V transient capability  Output shutdown  Up to 1MHz switching frequency  Inherent open-circuit LED protection  Typical 4% output current accuracy

Applications

 Low voltage halogen replacement LEDs  Automotive lighting  Low voltage industrial lighting  LED back-up lighting  Illuminated signs (*) Using standard external components as specified under elec trical characteristics. Efficiency is dependent upon the number of LEDs driven and on external component types and values. Pin connections Typical application circuit LX TSOT23-5 Top view GND ADJ VIN ISENSE VIN ISENSE LX GND ZXLD1350ADJ VIN (12V - 30V) Rs 0.33 1/H9262FC1 GND N/C ZLLS1000 47/H9262HL1

Issue 6 - April 2007 2 www.zetex.com © Zetex Semiconductors plc 2007 Absolute maximum ratings (voltages to GND unless otherwise stated) Input voltage (VIN) -0.3V to +30V (40V for 0.5 sec) ISENSE voltage (VSENSE) +0.3V to -5V (measured with respect to V IN) LX output voltage (VLX) -0.3V to +30V (40V for 0.5 sec) Adjust pin input voltage (VADJ) -0.3V to +6V Switch output current (ILX) 500mA Power dissipation (Ptot) (Refer to package thermal de-rating curve on page 18) 450mW Operating temperature (TOP) -40 to 105°C Storage temperature (TST) -55 to 150°C Junction temperature (Tj MAX) 150°C These are stress ratings only. Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. Thermal resistance Junction to ambient (R/H9052JA) 200°C/W Electrical characteristics (test conditions: VIN=12V, Tamb=25°C unless otherwise stated) (*) Symbol Parameter Conditions Min. Typ. Max. Unit VIN Input voltage 73 0 V VSU Internal regulator start-up threshold V IN rising 4.8 V IINQoff Quiescent supply current with output off ADJ pin grounded 15 20 µA IINQon Quiescent supply current with output switching ADJ pin floating f=250kHz 250 500 µA VSENSE Mean current sense threshold voltage (defines LED current setting accuracy) Measured on ISENSE pin with respect to VIN VADJ =1.25V 95 100 105 mV VSENSEHYS Sense threshold hysteresis ±15 % ISENSE ISENSE pin input current V SENSE =VIN -0.1 1.25 10 µA VREF Internal reference voltage Measured on ADJ pin with pin floating 1.21 1.25 1.29 V /H9004VREF //H9004T Temperature coefficient of V REF 50 ppm/°C VADJ External control voltage range on ADJ pin for dc brightness control (†) 0.3 2.5 V VADJoff DC voltage on ADJ pin to switch device from active (on) state to quiescent (off) state V ADJ falling 0.15 0.2 0.25 V VADJon DC voltage on ADJ pin to switch device from quiescent (off) state to active (on) state V ADJ rising 0 . 20 . 2 50 . 3 V RADJ Resistance between ADJ pin and VREF 135 250 k/H9024 ILXmean Continuous LX switch current 0.37 A RLX LX Switch ‘On’ resistance 1.5 2 /H9024 ILX(leak) LX switch leakage current 1 µA

Issue 6 - April 2007 3 www.zetex.com © Zetex Semiconductors plc 2007 Pin description

Ordering information

DPWM(LF) Duty cycle range of PWM signal applied to ADJ pin during low frequency PWM dimming mode PWM frequency <500Hz PWM amplitude= V REF Measured on ADJ pin 0.01 1 Brightness control range 100:1 DPWM(HF) Duty cycle range of PWM signal applied to ADJ pin during high frequency PWM dimming mode PWM frequency >10kHz PWM amplitude= VREF Measured on ADJ pin 0.16 1 Brightness control range 5:1 TSS Soft start time Time taken for output current to reach 90% of final value after voltage on ADJ pin has risen above 0.3V 500 µs f LX Operating frequency (See graphs for more detail) ADJ pin floating L=100µH (0.82/H9024) IOUT=350mA @ VLED=3.4V Driving 1 LED 250 KHz TONmin Minimum switch ‘ON’ time LX switch ‘ON’ 200 ns TOFFmin Minimum switch ‘OFF’ time LX switch ‘OFF’ 200 ns fLXmax Recommended maximum operating frequency 1M H z DLX Recommended duty cycle range of output switch at fLXmax 0.3 0.7 TPD Internal comparator propagation delay 50 ns NOTES: (*) Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over a -40°C to +105°C temperature range, are guaranteed by design, characterization and process control. (†) 100% brightness corresponds to V ADJ = VADJ(nom) = VREF. Driving the ADJ pin above V REF will increase the V SENSE threshold and output current proportionally. Name Pin No. Description LX 1 Drain of NDMOS switch GND 2 Ground (0V) ADJ 3 Multi-function On/Off and brightness control pin:  Leave floating for normal operation.(V ADJ= VREF =1.25V giving nominal average output current IOUTnom=0.1/RS)  Drive to voltage below 0.2V to turn off output current  Drive with DC voltage (0.3V<V ADJ<2.5V) to adjust output current from 25% to 200%(†) of IOUTnom  Drive with PWM signal from open-collector or open-drain transistor, to adjust output current. Adjustment range 25% to 100% of IOUTnom for f>10kHz and 1% to 100% of IOUTnom for f<500Hz  Connect a capacitor from this pin to ground to increase soft-start time. (Default soft-start time=0.5ms. Additional soft-start time is approx.0.5ms/nF) ISENSE 4 Connect resistor RS from this pin to VIN to define nominal average output current IOUTnom=0.1/RS (Note: RSMIN=0.27/H9024 with ADJ pin open-circuit) VIN 5 Input voltage (7V to 30V). Decouple to ground with 1µF or higher X7R ceramic capacitor close to device Device Reel size (mm) Reel width (mm) Quantity per reel Device mark ZXLD1350ET5TA 180 8 3,000 1350 Electrical characteristics (test conditions: VIN=12V, Tamb=25°C unless otherwise stated) (*) (continued) Symbol Parameter Conditions Min. Typ. Max. Unit

Issue 6 - April 2007 4 www.zetex.com © Zetex Semiconductors plc 2007 Block diagram MN VIN Comparator GND LXVIN ISENSE Current sense circuit VIN ADJ RS 5V Voltage regulator Shutdown circuit Vref 200k 1.25V 4KHz

Issue 6 - April 2007 5 www.zetex.com © Zetex Semiconductors plc 2007 Device description The device, in conjunction with the co il (L1) and curren t sense resistor (R S), forms a self-oscillating continuous-mode buck converter. Device operation (Refer to block diagram and Figure 1 - Operating waveforms) Operation can be best understood by assuming that the ADJ pin of the device is unconnected and the voltage on this pin (VADJ) appears directly at the (+) input of the comparator. When input voltage V IN is first applied, the initial current in L1 and R S is zero and there is no output from the current sense circuit. Under this condition, the (-) input to the comparator is at ground and its output is high. This turns MN on and switches the LX pin low, causing current to flow from V IN to ground, via RS, L1 and the LED(s). The current rises at a rate determined by V IN and L1 to produce a voltage ramp (V SENSE) across R S. The supply referred voltage V SENSE is forced across internal resistor R1 by the current sense circuit and produces a proportional current in internal resistors R2 and R3. This produces a ground referred rising voltage at the (-) input of the comparator. When this reaches the threshold voltage (V ADJ), the comparator output switches low and MN turns off. The comparator output also drives another NMOS switch, which bypasses internal resistor R3 to provide a controlled amount of hysteresis. The hysteresis is set by R3 to be nominally 15% of V ADJ. When MN is off, the current in L1 continues to flow via D1 and the LED(s) back to VIN. The current decays at a rate determined by the LED and diode forward voltages to produce a falling voltage at the input of the comparator. When this voltage returns to V ADJ, the comparator output switches high again. This cycle of events repeats, with the comparator input ramping between limits of VADJ ± 15%. Switching thresholds With VADJ =VREF, the ratios of R1, R2 and R3, define an average V SENSE switching threshold of 100mV (measured on the I SENSE pin with respect to V IN). The average output current I OUTnom is then defined by this voltage and Rs according to: IOUTnom=100mV/RS Nominal ripple current is ±15mV/RS Adjusting output current The device contains a low pass filter between the ADJ pin and the threshold comparator and an internal current limiting resistor (200k nom) between ADJ and the internal reference voltage. This allows the ADJ pin to be overdriven with ei ther DC or pulse signals to change the V SENSE switching threshold and adjust the output current. The filter is third order, comprising three sections, each with a cut-off frequency of nominally 4kHz. Details of the different modes of adjusting output current are given in the applications section. Output shutdown The output of the low pass filter drives the shutdown circuit. When the input voltage to this circuit falls below the threshold (0.2V nom), the internal regulator and the output switch are turned off. The voltage reference remains powered during shutdown to provide the bias current for the shutdown circuit. Quiescent supply cu rrent during shutdown is nominally 15 /H9262A and switch leakage is below 1/H9262A.

Issue 6 - April 2007 6 www.zetex.com © Zetex Semiconductors plc 2007 Figure 1 Operating waveforms VIN 100mV115mV SENSE voltage VSENSE+ VSENSE- Toff Ton 85mV VIN 0.15VADJ 0.15VADJ IOUTnom IOUTnom +15% IOUTnom -15% VADJ LX voltage Coil current Comparator input voltage Comparator output

Issue 6 - April 2007 7 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating waveforms [VIN=12V, RS=0.3/H9024, L=100µH] Normal operation. Output current (Ch3) and LX voltage (Ch1) Start-up waveforms. Output current (Ch3), LX voltage (Ch1) and VADJ (Ch2)

Issue 6 - April 2007 8 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions For typical application circuit driving 1W Luxeon® white LED(s) at VIN =12V and Tamb=25°C unless otherwise stated. sDEL fo .oN sv ycneiciffE smhO 33.0=sR ,Hu001=L 001 03520251015 )V( NIV Efficiency (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV tupnI sv elcyC ytuD smhO 33.0=sR ,Hu001=L 2.0 4.0 6.0 8.0 2.1 03520251015 )V( NIV Duty Cycle DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV tupnI sv ycneuqerF gnitarepO smhO 33.0=sR ,Hu001=L 001 002 003 004 005 006 03520251015 )V( NIV Frequency (kHz) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV ylppuS htiw noitairav tnerruc tuptuO smhO 33.0=sR ,Hu001=L 03520251015 )V( NIV Deviation from nominal set current (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7

Issue 6 - April 2007 9 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions (continued) sDEL fo .oN sv ycneiciffE smhO 33.0=sR ,Hu74=L 001 03520251015 )V( NIV Efficiency (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 egatloV tupnI sv elcyC ytuD smhO 33.0=sR ,Hu74=L 2.0 4.0 6.0 8.0 03520251015 )V( NIV Duty Cycle DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 egatloV tupnI sv ycneuqerF gnitarepO smhO 33.0=sR ,Hu74=L 001 002 003 004 005 006 007 008 03520251015 )V( NIV Frequency (kHz) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 egatloV ylppuS sv noitairaV tnerruC tuptuO smhO 33.0=sR ,Hu74=L 51- 01- 03520251015 )V( NIV Deviation from nominal set current (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7

Issue 6 - April 2007 10 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions (continued) sDEL fo .oN sv ycneiciffE smhO 33.0=sR ,Hu022=L 001 03520251015 )V( NIV Efficiency (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV tupnI sv elcyC ytuD smhO 33.0=sR ,Hu022=L 2.0 4.0 6.0 8.0 03520251015 )V( NIV Duty Cycle DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV tupnI sv ycneuqerF gnitarepO smhO 33.0=sR ,Hu022=L 001 051 002 052 003 053 03520251015 )V( NIV Frequency (kHz) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8 egatloV tupnI sv noitairaV tnerruC tuptuO smhO 33.0=sR ,Hu022=L 03520251015 )V( NIV Deviation from nominal set current (%) DEL 1 DEL 2 DEL 3 DEL 4 DEL 5 DEL 6 DEL 7 DEL 8

Issue 6 - April 2007 11 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions (continued) Vref vs Vin at low supply voltage 0.2 0.4 0.6 0.8 1.2 1.4 0123456789 1 0 Vin (V) )V( ferV egnaregatlovylppuslanimonrevoniVsvferV 5142.1 242.1 5242.1 03520251015 )V(niV )V( ferV JDAVsvtnerruCtuptuO 001 051 002 052 003 053 35.225.115.00 )V(JDAV )Am( naem tuoI mhO65.0=sR mhO3.0=sR mhO1=sR )gnitarepO(niVsvtnerruCylppuS 001 002 003 004 005 035202510150 )V(niV )Au( niI )tnecseiuQ(niVsvtnerruCylppuS 035202510150 )V(niV )Au( niI

Issue 6 - April 2007 12 www.zetex.com © Zetex Semiconductors plc 2007 Typical operating conditions (continued) erutarepmeT sv JDAV smhO 33.0=sR ,Hu001=L 532.1 42.1 542.1 52.1 552.1 05100105005- )C geD( erutarepmeT Vadj (V) V7 = niV V9 = niV V21 = niV V03 = niV erutarepmeT sv egnahC tnerruC tuptuO smhO 33.0=sR ,Hu001=L ,V7=NIV 04102100108060402002-04-06- )C geD( erutarepmeT Deviation from nominal set value (%) erutarepmeT sv egnahC tnerruC tuptuO smhO 33.0=sR ,Hu001=L ,V21=NIV 5.0- 52.0- 52.0 5.0 04102100108060402002-04-06- )C geD( erutarepmeT Deviation from nominal set value (%) erutarepmeT sv egnahC tnerruC tuptuO smhO 33.0=sR ,Hu001=L ,V03=NIV 04102100108060402002-04-06- )C geD( erutarepmeT Deviation from nominal set value (%) erutarepmeT sv ecnatsiseR 'nO' hctiwS XL 2.1 4.1 6.1 8.1 2.2 4.2 6.2 06104102100108060402002-04-06- )C geD( erutarepmeT Ohms

Issue 6 - April 2007 13 www.zetex.com © Zetex Semiconductors plc 2007 Application notes Setting nominal average output current with external resistor RS The nominal average output current in the LED(s) is determined by the value of the external current sense resistor (RS) connected between VIN and ISENSE and is given by: IOUTnom = 0.1/RS [for RS>0.27/H9024] The table below gives values of nominal average output current for several preferred values of current setting resistor (RS) in the typical application circuit shown on page 1: The above values assume that the ADJ pin is floating and at a nominal voltage of V REF (=1.25V). Note that R S=0.27/H9024 is the minimum allowed value of se nse resistor under these conditions to maintain switch current below the specified maximum value. It is possible to use different values of R S if the ADJ pin is driven from an external voltage. (See next section). Output current adjustment by external DC control voltage The ADJ pin can be driven by an external dc voltage (V ADJ), as shown, to adjust the output current to a value above or below the nominal average value defined by RS. The nominal average output current in this case is given by: IOUTdc = 0.08*VADJ/RS [for 0.3< VADJ <2.5V] Note that 100% brightness setting corresponds to V ADJ = VREF. When driving the ADJ pin above 1.25V, RS must be increased in proportion to prevent IOUTdc exceeding 370mA maximum. The input impedance of the ADJ pin is 200k/H9024 ±25%. RS (/H9024) Nominal average output current (mA) 0.27 370 0.3 333 0.33 300 0.39 256 GND ZXLD1350ADJ GND DC

Issue 6 - April 2007 14 www.zetex.com © Zetex Semiconductors plc 2007 Output current adjustment by PWM control Directly driving ADJ input A Pulse Width Modulated (PWM) signal with duty cycle D PWM can be applied to the ADJ pin, as shown below, to adjust the output current to a value above or below the nominal average value set by resistor R Driving the ADJ input via open collector transistor The recommended method of driving the ADJ pin and controlling the amplitude of the PWM waveform is to use a small NPN switching transistor as shown below: This scheme uses the 200k resistor between the ADJ pin and the internal voltage reference as a pull-up resistor for the external transistor. Driving the ADJ input from a microcontroller Another possibility is to drive the device from the open drain output of a microcontroller. The diagram below shows one method of doing this: The diode and resistor suppress possible high amplitude negative spikes on the ADJ input resulting from the drain-source capacitance of the FET. Negative spikes at the input to the device should be avoided as they may cause errors in output current, or erratic device operation. See the section on PWM dimming for more detail s of the various modes of control using high frequency and low frequency PWM signals. PWM GND VADJ GND ZXLD1350ADJ PWM GND ZXLD1350ADJ GND GND ZXLD1350ADJ MCU 10k

Issue 6 - April 2007 15 www.zetex.com © Zetex Semiconductors plc 2007 Shutdown mode Taking the ADJ pin to a voltage below 0.2V for more than approximately 100µs, will turn off the output and supply current will fall to a low standby level of 15µA nominal. Note that the ADJ pin is not a logic input. Taking the ADJ pin to a voltage above VREF will increase output current above the 100% nominal average value. (See graphs for details). Soft-start The device has inbuilt soft-start action due to the delay through the PWM filter. An external capacitor from the ADJ pin to ground will provide additional soft-start delay, by increasing the time taken for the voltage on this pin to rise to the turn-on threshold and by slowing down the rate of rise of the control voltage at the input of the comparator. With no external capacitor, the time taken for the output to reach 90% of its final value is approximately 500µs. Adding capacitance increases this delay by approximately 0.5ms/nF. The graph below shows the variation of soft-start time for different values of capacitor. Inherent open-circuit LED protection If the connection to the LED(s) is open-circuited, the coil is isolated from the LX pin of the chip, so the device will not be damaged, unlike in ma ny boost converters, where the back EMF may damage the internal switch by forcing the drain above its breakdown voltage. Capacitor selection A low ESR capacitor should be used for input decoupling, as the ESR of this capacitor appears in series with the supply source impedance and lo wers overall efficiency . This capacitor has to supply the relatively high peak current to the coil and smooth the current ripple on the input supply. A minimum value of 1/H9262F is acceptable if the input source is close to the device, but higher values will improve performance at lower input voltages, especially when the source impedance is high. The input capacitor should be placed as close as possible to the IC. For maximum stability over temperature and voltage, capacitors with X7R, X5R, or better dielectric are recommended. Capacitors with Y5V dielectric are not suitable for decoupling in this application and should NOT be used. A table of recommended manufacturers is provided below: Manufacturer Website Murata www.murata.com Taiyo Yuden www.t-yuden.com Kemet www.kemet.com AVX www.avxcorp.com dnuorG ot nip JDA morf ecnaticapaC sv emiT tratS tfoS 5202510150 )Fn( ecnaticapaC Soft Start time (ms)

Issue 6 - April 2007 16 www.zetex.com © Zetex Semiconductors plc 2007 Inductor selection Recommended inductor values for the ZXLD1350 are in the range 47/H9262H to 220/H9262H. Higher values of inductance are recommended at hi gher supply voltages in order to minimize errors due to switching delays, which result in increased ripple and lower efficiency. Higher values of inductance also result in a smaller change in output current over the supply voltage range. (See graphs). The inductor should be mounted as close to the device as possible with low resistance connections to the LX and V IN pins. The chosen coil should have a saturation current higher than the peak output current and a continuous current rating above the required mean output current. Suitable coils for use with the ZXLD1350 are listed in the table below: The inductor value should be chosen to maintain operating duty cycle and switch 'on'/'off' times within the specified limits over the supply voltage and load current range. The following equations can be used as a guide, with reference to Figure 1 - Operating waveforms. LX Switch 'On' time Note: TONmin>200ns LX Switch 'Off' time Note: TOFFmin>200ns Where: L is the coil inductance (H) rL is the coil resistance (/H9024) Iavg is the required LED current (A) /H9004I is the coil peak-peak ripple current (A) {Internally set to 0.3 x Iavg} VIN is the supply voltage (V) VLED is the total LED forward voltage (V) RLX is the switch resistance (/H9024) VD is the diode forward voltage at the required load current (V) Part No. L (/H9262H) DCR (/H9024) ISAT (A) Manufacturer DO1608C 47 0.64 0.5 CoilCraftMSS6132ML 47 0.38 0.56 68 0.58 0.47 100 0.82 0.39 CD104-MC 220 0.55 0.53 Sumida NP04SB470M 47 0.27 0.38 Taiyo Yuden TON LΔI TOFF LΔI

Issue 6 - April 2007 17 www.zetex.com © Zetex Semiconductors plc 2007 Example: For VIN =12V, L=47/H9262H, rL=0.64/H9024, VLED=3.4V, Iavg =350mA and VD =0.36V This gives an operating frequency of 546kHz and a duty cycle of 0.34. These and other equations are available as a spreadsheet calculator from the Zetex website. Go to www.zetex.com/zxld1350 Note that in practice, the duty cycle and opera ting frequency will deviate from the calculated values due to dynamic switching delays, switch rise/fall times and losses in the external components. Optimum performance will be achieved by sett ing the duty cycle close to 0.5 at the nominal supply voltage. This helps to equalize the unde rshoot and overshoot and improves temperature stability of the output current. Diode selection For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode with low reverse leakage at the maximum operating voltage and temperature. The recommended diode for use with this part is the ZLLS1000. This has approximately ten times lower leakage than standard Schottky diodes, which are unsuitable for use above 85°C. It also provides better efficiency than silicon diodes, due to a combination of lower forward voltage and reduced recovery time. The table below gives the typical characteristics for the ZLLS1000: If alternative diodes are used, it is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher than the maximum output load current. It is very important to consider the reverse leakage of the diode when operating above 85°C. Excess leakage will increase the power dissipation in the device. The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the LX output. If a silicon diode is used, care should be taken to ensure that the total voltage appearing on the LX pin including supply ripple, does not exceed the specified maximum value. Diode Forward voltage at 100mA (mV) Continuous current (mA) Reverse Leakage At 30V 85°C (/H9262A) Package Manufacturer ZLLS1000 310 1000 300 TSOT23 Zetex

Issue 6 - April 2007 18 www.zetex.com © Zetex Semiconductors plc 2007 Reducing output ripple Peak to peak ripple current in the LED can be reduced, if required, by shunting a capacitor C led across the LED(s) as shown below: A value of 1/H9262F will reduce nominal ripple current by a factor three (approx.). Proportionally lower ripple can be achieved with higher capacitor values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up delay, by reducing the rate of rise of LED voltage. Operation at low supply voltage The internal regulator disables the drive to the switch until the supply has risen above the start- up threshold (V SU). Above this threshold, the device will start to operate. However, with the supply voltage below the specified minimum value , the switch duty cycle will be high and the device power dissipation will be at a maximum. Care should be taken to avoid operating the device under such conditions in th e application, in order to minimize the risk of exceeding the maximum allowed die temperature. (See next section on thermal considerations). Note that when driving loads of two or more LE Ds, the forward drop will normally be sufficient to prevent the device from switching below approximately 6V. This will minimize the risk of damage to the device. Thermal considerations When operating the device at high ambient te mperatures, or when driving maximum load current, care must be taken to avoid exceeding the package power dissipation limits. The graph below gives details for power derating. This assumes the device to be mounted on a 25mm

2 PCB

with 1oz copper standing in still air. VIN VIN ISENSE LX ZXLD1350 Rs CledLED noitapissiD rewoP mumixaM 001 002 003 004 005 031011090705030101-03-05- )C geD( erutarepmeT tneibmA Power (mW)

Issue 6 - April 2007 19 www.zetex.com © Zetex Semiconductors plc 2007 Note that the device power dissipation will most often be a maximum at minimum supply voltage. It will also increase if the efficiency of the circuit is low. This may result from the use of unsuitable coils, or excessive parasitic output capacitance on the switch output. Thermal compensation of output current High luminance LEDs often need to be supplied with a temperature compensated current in order to maintain stable and reliable operation at all drive levels. The LEDs are usually mounted remotely from the device, so for this reason, the temperature coefficients of the internal circuits for the ZXLD1350 have been optimized to minimize the change in output current when no compensation is employed. If output current compen sation is required, it is possible to use an external temperature sensing network - normally using Negative Temperature Coefficient (NTC) thermistors and/or diodes, mounted very close to the LED(s). The output of the sensing network can be used to drive the ADJ pin in order to reduce output current with increasing temperature. Layout considerations LX pin The LX pin of the device is a fast switching node, so PCB tracks should be kept as short as possible. To minimize ground 'bounce', the ground pin of the device should be soldered directly to the ground plane. Coil and decoupling capacitors It is particularly important to mount the coil and the input decoupling capacitor close to the device to minimize parasitic resistance and inductance, which will degrade efficiency. It is also important to take account of any track resistance in series with current sense resistor R ADJ pin The ADJ pin is a high impedance input, so when left floating, PCB tracks to this pin should be as short as possible to reduce noise pickup. A 10 0nF capacitor from the ADJ pin to ground will reduce frequency modulation of the output under these conditions. An additional series 10k /H9024 resistor can also be used when driving the AD J pin from an external circuit (see below). This resistor will provide filtering for low frequency noise and provide protection against high voltage transients. High voltage tracks Avoid running any high voltage tracks close to th e ADJ pin, to reduce the risk of leakage due to board contamination. Any such leakage may raise the ADJ pin voltage and cause excessive output current. A ground ring placed around the ADJ pin will minimize changes in output current under these conditions. GND ZXLD1350ADJ 10k 100nF GND

Issue 6 - April 2007 20 www.zetex.com © Zetex Semiconductors plc 2007 Evaluation PCB The picture below shows the top copper layout of the 3 LED ZXLD1350EV2 evaluation board. This board and other evaluation boards for the ZXLD1350 are available upon request. RS +VIN GND AD J LED LED ZXLD1350EV2 Bare board: ZDB308R2 SD1 JP2 Copyright Zetex Plc 2006 EVALUATION BOARD a k a k a k JP3 JP1 k a

Issue 6 - April 2007 21 www.zetex.com © Zetex Semiconductors plc 2007 Dimming output current using PWM Low frequency PWM mode When the ADJ pin is driven with a low frequency PWM signal (eg 100Hz), with a high level voltage VADJ and a low level of zero, the output of the internal low pass filter will swing between 0V and VADJ, causing the input to the shutdown circuit to fall below its turn-off threshold (200mV nom) when the ADJ pin is low. This will cause the output current to be switched on and off at the PWM frequency, resulting in an average output current I OUTavg proportional to the PWM duty cycle. (See Figure 2 - Low frequency PWM operating waveforms). Figure 2 Low frequency PWM operating waveforms The average value of output current in this mode is given by: I OUTavg 0.1DPWM/RS [for DPWM >0 01] This mode is preferable if optimum LED 'whitene ss' is required. It will also provide the widest possible dimming range (approx. 100:1) and higher efficiency at the expense of greater output ripple. Note that the low pass filter introduces a small error in the output duty cycle due to the difference between the start-up and shut-down times. This time difference is a result of the 200mV shutdown threshold and the rise and fall times at the output of the filter. To minimize this error, the PWM duty cycle should be as low as possible consistent with avoiding flicker in the LED. VADJ VADJ PWM Voltage Ton IOUTavg Filter Output Toff 0.1/RsIOUTnom 200mV 300mV Output Current

Issue 6 - April 2007 22 www.zetex.com © Zetex Semiconductors plc 2007 High frequency PWM mode At PWM frequencies above 10kHz and for duty cycles above 0.16, the output of the internal low pass filter will contain a DC component that is always above the shutdown threshold. This will maintain continuous device operation and the nominal average output current will be proportional to the average voltage at the output of the filter, which is directly proportional to the duty cycle. (See Figure 3 - High frequency PWM operating waveforms). For best results, the PWM frequency should be maintained above the mini mum specified value of 10kHz, in order to minimize ripple at the output of the filter. The shutdown comparator has approximately 50mV of hysteresis, to minimize erratic switching due to this ripple. An upper PWM frequency limit of approximately one tenth of the operating frequency is recommended, to avoid excessive output modulation and to avoid injecting excessive noise into the internal reference. Figure 3 High frequency PWM operating waveforms The nominal average value of output current in this mode is given by: I OUTnom ≈0.1DPWM/RS [for DPWM >0.16] This mode will give minimum out put ripple and reduced radiated emission, but with a reduced dimming range (approx.5:1). The restricted dimming range is a result of the device being turned off when the dc component on the filter output falls below 200mV. PWM voltage VADJ Ton VADJ Toff 200mV Output current 0.1/RS IOUTnom Filter output

Issue 6 - April 2007 23 www.zetex.com © Zetex Semiconductors plc 2007 Note: Controlling dimensions are in millimeters. Approximate dimensions are provided in inches DIM Millimeters Inches Min. Max. Min. Max. A - 1.00 - 0.0393 A1 0.01 0.10 0.0003 0.0039 A2 0.84 0.90 0.0330 0.0354 b 0.30 0.45 0.0118 0.0177 c 0.12 0.20 0.0047 0.0078 D 2.90 BSC 0.114 BSC E 2.80 BSC 0.110 BSC E1 1.60 BSC 0.062 BSC e 0.95 BSC 0.0374 BSC e1 1.90 BSC 0.0748 BSC L 0.30 0.50 0.0118 0.0196 L2 0.25 BSC 0.010 BSC a° 4° 12° 4° 12°

Issue 6 - April 2007 24 www.zetex.com © Zetex Semiconductors plc 2007 Definitions Product change Zetex Semiconductors reserves the right to alter, without notice, specifications, design, price or conditions of supply of any product or service. Customers are solely responsible for obtaining the latest relevant information before placing orders. Applications disclaimer The circuits in this design/application note are offered as desi gn ideas. It is the responsibility of the user to ensure that t he circuit is fit for the user’s application and meets with the user’s requirements. No representation or warranty is given and no liability whatsoev er is assumed by Zetex with respect to the accuracy or use of such in formation, or infringement of patents or other intellectual prop erty rights arising from such use or otherwise. Zetex does not assume any le gal responsibility or will not be held legally liable (whether in contract, tort (including negligence), breach of statutory duty, restricti on or otherwise) for any damages, loss of profit, business, con tract, opportunity or consequential loss in the use of these circuit applications, under any circumstances. Life support Zetex products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Zetex Semiconductors plc. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body or 2. support or sustain life and whose failure to perform when proper ly used in accordance with instructions for use provided in the labelling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support devi ce or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Reproduction The product specifications contained in this publication are issu ed to provide outline information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. Terms and Conditions All products are sold subjects to Zetex’ terms and conditions of sale, and this disclaimer (save in the event of a conflict bet ween the two when the terms of the contract shall prevail) according to region, supplied at the time of order acknowledgement. For the latest information on technology, delivery terms and conditions and prices, please contact your nearest Zetex sales office. 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Samples may be available “Active” Product status recommended for new designs “Last time buy (LTB)” Device will be discontinued and last time buy period and delivery is in effect “Not recommended for new designs” Device is still in production to support existing designs and production “Obsolete” Production ha s been discontinued Datasheet status key: “Draft version” This term denotes a very early datasheet ver sion and contains highly provisional information, which may change in any manner without notice. “Provisional version” This term denotes a pre-release datasheet. It provides a clear indication of anticipated performance. However, changes to the test conditions and specifications may occur, at any time and without notice. “Issue” This term denotes an issued datasheet cont aining finalized specifications. However, changes to specifications may occur, at any time and without notice. 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