ZXCT1032 ZETEX | Alldatasheet
Document overview
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Technical content
Features
Accurate high-side current sensing User defined and dynamically adjustable trip current Load switch control Fault flag logic output User defined ramp and inhibit timers SO8 package Temperature range -40 to 85°C
Applications
Electronic fuse Short circuit protected supply feed H o t s w a p Power over twisted pair Order code Pack Part mark Reel size Tape width Quantity per reel ZXCT1032N8TA SO8 1032 7” 12mm 500
Issue 3 - April 2007 2 www.zetex.com © Zetex Semiconductors plc 2007 Pin description Typical application circuit Pinout connections Pin Name Description 1 GND Ground reference for I SET and Flag pins. Most negative terminal of the device. No other pin should go below this voltage. 2C T An external capacitor is connected to this pin and is used to determine the period for constant-current mode and the timeout before restarting. To reduce excessive heating during the soft start mode capacitors less than 220nF are reocmmended. 3 ISET Determines the load current trip level or constant current level. This can be driven via a DC voltage or via a µC PWM output. V SENSE = (VISET-150mV)/10 An input <100mV will disable the high-side switch (i.e. set IOUT = 0) If left open-circuit, an accurate internal DC reference of 2.1V and source impedance of 50k/H9024 is used to set the voltage on this pin. (External drivers must take this reference into account.)
4 Flag This is an active low open collector output that goes low whenever the
current limit set by the choice of RSENSE and ISET is reached or in the event of a shorted load.
5 Drive This is the output drive pin to th e external high side referred switch on
the ZXCT1032, capable of driving PMOS and PNP transistors. 6 IN- The load referred input to the current monitor control loop.
7 N/C Not connected
8 IN+ Acts as both the supply pin to the ZXCT1032 and the supply referred
sense input to the current monitor control loop. VIN Load ZXCT 1032 IN+ ISET GND IN- 8 6 Drive CTGND CT Flag µC RSENSE GND- CT ISET Flag IN+1 N/C IN- Drive Top view SO8
Issue 3 - April 2007 3 www.zetex.com © Zetex Semiconductors plc 2007 Absolute maximum ratings Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. NOTES: (a) Up to a maximum of 24 hours Recommended operating conditions
Electrical characteristics
Test conditions Tamb = 25°C, VIN+ = 20V. Unless otherwise stated. Symbol Parameter Min. Max. Units VIN+ Supply range 9.5 21 V TA Ambient temperature range -40 85 °C VFLAG Flag voltage range 0 V IN+ V VISET Voltage on ISET pin 1 2.5 V Symbol Parameter Conditions Min. Typ. Max. Units IQ Quiescent current VSENSE1 = 0V, V_ISET = 2.1V 1.6 2.5 mA VSTRIP (*) NOTES: (*) VSENSE = VIN+ - VIN-. VSTRIP is the sense voltage at which the device trips into over-current protection. Flag trip threshold voltage VISET =1.1V 95 mV VISET =2.1V 185 195 205 VISET ISET open voltage I ISET = 0 2.0 2.1 2.2 V IISET ISET output current V ISET =0V 30 45 60 /H9262A VDRIVEH Drive high output voltage VISET = 2.1V, VSENSE > 205mV, IDRIVE = 0, VIN- – 0.4 VIN- – 0.2 V VDRIVEL Drive low output voltage VISET = 2.1V, VSENSE < 185mV, IDRIVE = 0, VIN- - 7 VIN- - 5.5 VIN- - V RDRIVEL Drive low output resistance V ISET = 2.1V, VSENSE < 185mV 9k /H9024 VFLAGL Flag Low output Voltage VISET = 2.1V, VSENSE > 205mV IFLAG = 100µA 0.2 0.4 V IFLAGZ Flag open circuit leakage current VISET = 2.1V, VSENSE < 185mV, VFLAG = 5V 12 0 0 n A IIN- IN- bias current V ISET = 0V 100 200 nA VSTRIP-TC Temperature coefficient of trip voltage See footnote (†) (†) Temperature dependent measurements are extracted from characterization and simulation results. 95 ppm/°C ICT-CHG Capacitor CT charging current FLAG = Open 130 200 270 /H9262A ICT-DIS Capacitor CT discharging current FLAG = Low 1.8 3.3 5.4 /H9262A
Issue 3 - April 2007 4 www.zetex.com © Zetex Semiconductors plc 2007 Typical characteristics (TA = 25°C and VIN+ = 20V unless otherwise stated) Quiescent current vs temperature 0.00 0.30 0.60 0.90 -40 -15 10 35 60 85 Temperature (C) IQ (mA) IQ (mA) Quiescent current vs input voltage 0.77 0.78 0.79 0.80 9 11 13 15 17 19 21 Input voltage VISET vs temperature 2.00 2.05 2.10 2.15 2.20 -40 -15 10 35 60 85 Temperature (°C) VIN+ = 9.5 to 21V VISET vs input voltage 2.099 2.100 2.101 9 10 11 12 13 14 15 16 17 18 19 20 21 Input voltage (V) VISET (V) VISET (V) T A = 25°C IIN- vs input voltage 9 11 13 15 17 19 21 Input voltage (V) T A = 25°C IIN- vs temperature -40 -15 10 35 60 85 Temperature (°C) IIN- (nA) IIN- (nA) VIN+=9.5V VIN+=20V VIN+=21V VIN+ = 9.5 to 21V
Issue 3 - April 2007 5 www.zetex.com © Zetex Semiconductors plc 2007 Typical characteristics (TA = 25°C and VIN+ = 20V unless otherwise stated) ICT-CHG vs temperature -250 -225 -200 -175 -150 -125 -100 -75 -50 -25 -40 -15 10 35 60 85 Temperature (°C) VIN+ = 9.5 to 21V ICT-DIS vs temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -40 -15 10 35 60 85 Temperature (C) IC-DIS (uA) IC-DIS (uA) VIN+ = 9.5 to 21V ICT-DIS vs input voltage 3.70 3.71 3.72 3.73 3.74 3.75 9 1 11 31 51 71 92 1 Input voltage (V) TA=25°C ICT-CHG vs input voltage -208 -207.5 -207 -206.5 91 1 1 3 1 5 1 7 1 9 2 1 Input voltage (V) IC-CHG (uA) IC-CHG (uA) TA = 25°C
Issue 3 - April 2007 6 www.zetex.com © Zetex Semiconductors plc 2007
Application information
ZXCT1032 block diagram and description Operation of the ZXCT1032 1 After power-up, the timing capacitor (C T) is charged up by a 200µA current source. This causes the output amplifier's drive pin to fall in voltage, progressively turning on the PMOS transistor. The load current is monitored by the current monitor and the amplifier control loop controls the load current allowing it to increase gradually (soft-start mode) as the voltage on C T increases. During the soft-start phase the load cu rrent will start to build up while there is a large voltage across the pass MOSFET; this ca n lead to large power dissipation if large capacitive loads are driven and/or large CT is used. ZXCT1032 Load Flag Drive IN+ IN- CT CT GND ISET 200/H9262A 3.3/H9262A 2.1V 80mV (1) (2) (3) (4) (5) (6)(8) RSENSE ICT-CHG ICT DIS 50k/H9024 NC ZXCT1032 Start up characteristic 0.5 1.5 2.5 0 0.5 1 1.5 2 2.5 time - ms Voltages - V 0.2 0.4 0.6 0.8 1.2 Load current - A VISET VCT 10*VSENSE ILOAD VIN+ = 18V RSENSE = 0.2/H9024 CT = 220nF VISET = 2.1V Trip current = 1A
Issue 3 - April 2007 7 www.zetex.com © Zetex Semiconductors plc 2007
2 The output voltage also increases due to the load current powering up the load and charging
any capacitance. After the initial soft start (load current stabilizing) the timing capacitor charges up to 4V and the device enters its normal mode of operation. The external MOSFET will be now fully enhanced minimizing any serial voltage drop. The ZXCT1032 has now entered its over-current detector mode; it is effectively “transparent” to the load until the current monitor output exceeds the trip point.
3 Fuse operation is provided by the trip comp arator whose threshold voltage is set by V
(internally nominally 2.1V, although this threshold can easily be overdriven). As the load current increases, so does the monitor voltage. When the current monitor output voltage exceeds V ISET, the trip comparator output goes high and sets the latch with the following results: a The output drive is disabled. b The open collector Flag output goes low to indicate a fault condition. c The 200 /H9262A current source is turned off and C T starts to discharge slowly via a 3.3/H9262A current source. ZXCT1032 Normal Operation 0 5 10 15 20 Time ms Timing capacitor voltage - V 0.2 0.4 0.6 0.8 Load Current - A VCT ILOAD VIN+ = 18V RSENSE = 0.2Ω CT = 220nF VISET = 2.1V Trip current = 1A 10*VSENSE VISET VLOAD ZXCT1032 Timing in over-current condition 0.5 1.5 2.5
051001050 Time (ms)
0.5 1.5 2.5 Load Current - A VIN+ = 18 V RSENSE = 0.2 ? ILOAD > 1 A CT = 220 nF VISET = 2.1 V Trip current = 1 A VISET VCT ILOAD
Issue 3 - April 2007 8 www.zetex.com © Zetex Semiconductors plc 2007 4W h e n CT has discharged to "zero" (< 80mV) the latch is reset which re-enables the output drive and allows the device to re-enter soft-start mode.
5 In the event of an overload or short circuit, stages 3 and 4 repeat indefinitely until the fault is
removed. In the case of a permanent fault damage to the PMOS transistor should not occur because it is only on for a short part of the overall cycle. 6 The current monitor has an intentional output offset of +150mV. If VISET is held at 0V, the output of the trip comparator will be permanently high and the output will be completely disabled.
Issue 3 - April 2007 9 www.zetex.com © Zetex Semiconductors plc 2007 Note: Controlling dimensions are in inches. Approximate dimensions are provided in millimeters DIM Inches Millimeters DIM Inches Millimeters H 0.228 0.244 5.80 6.20 /H90520° 8° 0° 8°
Issue 3 - April 2007 10 www.zetex.com © Zetex Semiconductors plc 2007 Zetex sales offices Europe Zetex GmbH Kustermann-park Balanstraße 59 D-81541 München Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 europe.sales@zetex.com Americas Zetex Inc
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